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[PATCH v3 2/4] usb: dwc2: Define Active Clock Gating support bit in GHWCFG4

Started byRazmik Karapetyan <Razmik.Karapetyan@synopsys.com>
First post2017-05-10 14:30 +0200
Last post2017-05-10 14:30 +0200
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  [PATCH v3 2/4] usb: dwc2: Define Active Clock Gating support bit in GHWCFG4 Razmik Karapetyan <Razmik.Karapetyan@synopsys.com> - 2017-05-10 14:30 +0200

#1638770 — [PATCH v3 2/4] usb: dwc2: Define Active Clock Gating support bit in GHWCFG4

FromRazmik Karapetyan <Razmik.Karapetyan@synopsys.com>
Date2017-05-10 14:30 +0200
Subject[PATCH v3 2/4] usb: dwc2: Define Active Clock Gating support bit in GHWCFG4
Message-ID<tFyUG-Ht-11@gated-at.bofh.it>
The previously reserved 12th bit in GHWCFG4 now indicates that the
controller supports the Dynamic Power Reduction (Active Clock Gating)
during no traffic scenarios such as L0, idle, resume and suspend
states.

Signed-off-by: Razmik Karapetyan <razmik@synopsys.com>
---
 drivers/usb/dwc2/hw.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/usb/dwc2/hw.h b/drivers/usb/dwc2/hw.h
index b726701191f3..0f7806c23d8e 100644
--- a/drivers/usb/dwc2/hw.h
+++ b/drivers/usb/dwc2/hw.h
@@ -308,6 +308,7 @@
 #define GHWCFG4_NUM_DEV_MODE_CTRL_EP_SHIFT	16
 #define GHWCFG4_UTMI_PHY_DATA_WIDTH_MASK	(0x3 << 14)
 #define GHWCFG4_UTMI_PHY_DATA_WIDTH_SHIFT	14
+#define GHWCFG4_ACG_SUPPORTED			BIT(12)
 #define GHWCFG4_UTMI_PHY_DATA_WIDTH_8		0
 #define GHWCFG4_UTMI_PHY_DATA_WIDTH_16		1
 #define GHWCFG4_UTMI_PHY_DATA_WIDTH_8_OR_16	2
-- 
2.11.0

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