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Re: [PATCH] mtd: nand: gpio: make nCE GPIO optional

Started byBrian Norris <computersforpeace@gmail.com>
First post2017-05-01 23:50 +0200
Last post2017-05-02 18:20 +0200
Articles 4 — 3 participants

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  Re: [PATCH] mtd: nand: gpio: make nCE GPIO optional Brian Norris <computersforpeace@gmail.com> - 2017-05-01 23:50 +0200
    Re: [PATCH] mtd: nand: gpio: make nCE GPIO optional Christophe LEROY <christophe.leroy@c-s.fr> - 2017-05-02 07:50 +0200
      Re: [PATCH] mtd: nand: gpio: make nCE GPIO optional Boris Brezillon <boris.brezillon@free-electrons.com> - 2017-05-02 11:10 +0200
        Re: [PATCH] mtd: nand: gpio: make nCE GPIO optional Brian Norris <computersforpeace@gmail.com> - 2017-05-02 18:20 +0200

#1633952 — Re: [PATCH] mtd: nand: gpio: make nCE GPIO optional

FromBrian Norris <computersforpeace@gmail.com>
Date2017-05-01 23:50 +0200
SubjectRe: [PATCH] mtd: nand: gpio: make nCE GPIO optional
Message-ID<tCrmH-5Yj-55@gated-at.bofh.it>
On Fri, Feb 10, 2017 at 03:01:10PM +0100, Christophe Leroy wrote:
> On some hardware, the nCE signal is wired to the ChipSelect associated
> to bus address of the NAND, so it is automatically driven during the
> memory access and it is not managed by a GPIO.
> 
> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>

Not really a problem with this patch exactly, but FYI you're only making
this optional for the non-DT case. For device tree, this is kinda hard
to do, since the current binding suggests we retrieve the GPIOs based on
index position, not by name. So if you leave one off...I guess we well
just be off-by-1 on the indeces until we hit a non-optional one...which
I guess is "CLE".

If we wanted this to work for DT, we'd need to extend this driver (and
binding doc) to support requesting GPIOs by name.

Brian

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#1634146

FromChristophe LEROY <christophe.leroy@c-s.fr>
Date2017-05-02 07:50 +0200
Message-ID<tCyRb-2bw-9@gated-at.bofh.it>
In reply to#1633952

Le 01/05/2017 à 23:46, Brian Norris a écrit :
> On Fri, Feb 10, 2017 at 03:01:10PM +0100, Christophe Leroy wrote:
>> On some hardware, the nCE signal is wired to the ChipSelect associated
>> to bus address of the NAND, so it is automatically driven during the
>> memory access and it is not managed by a GPIO.
>>
>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>
> Not really a problem with this patch exactly, but FYI you're only making
> this optional for the non-DT case. For device tree, this is kinda hard
> to do, since the current binding suggests we retrieve the GPIOs based on
> index position, not by name. So if you leave one off...I guess we well
> just be off-by-1 on the indeces until we hit a non-optional one...which
> I guess is "CLE".
>
> If we wanted this to work for DT, we'd need to extend this driver (and
> binding doc) to support requesting GPIOs by name.
>

It works for me with devicetree.

I have the following definition in my DT:

		nand@1,0 {
			compatible = "gpio-control-nand";
			reg = <1 0x0 0x01>;
			#address-cells = <1>;
			#size-cells = <1>;
			gpios = <&qe_pio_c 24 1 	// RDY
				 0			// nCE
				 &qe_pio_c 26 1		// ALE
				 &qe_pio_c 25 1		// CLE
				 0>;			// nwp
		};

Christophe

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#1634269

FromBoris Brezillon <boris.brezillon@free-electrons.com>
Date2017-05-02 11:10 +0200
Message-ID<tCBYJ-4BJ-1@gated-at.bofh.it>
In reply to#1634146
On Tue, 2 May 2017 07:47:40 +0200
Christophe LEROY <christophe.leroy@c-s.fr> wrote:

> Le 01/05/2017 à 23:46, Brian Norris a écrit :
> > On Fri, Feb 10, 2017 at 03:01:10PM +0100, Christophe Leroy wrote:  
> >> On some hardware, the nCE signal is wired to the ChipSelect associated
> >> to bus address of the NAND, so it is automatically driven during the
> >> memory access and it is not managed by a GPIO.
> >>
> >> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>  
> >
> > Not really a problem with this patch exactly, but FYI you're only making
> > this optional for the non-DT case. For device tree, this is kinda hard
> > to do, since the current binding suggests we retrieve the GPIOs based on
> > index position, not by name. So if you leave one off...I guess we well
> > just be off-by-1 on the indeces until we hit a non-optional one...which
> > I guess is "CLE".
> >
> > If we wanted this to work for DT, we'd need to extend this driver (and
> > binding doc) to support requesting GPIOs by name.
> >  
> 
> It works for me with devicetree.
> 
> I have the following definition in my DT:
> 
> 		nand@1,0 {
> 			compatible = "gpio-control-nand";
> 			reg = <1 0x0 0x01>;
> 			#address-cells = <1>;
> 			#size-cells = <1>;
> 			gpios = <&qe_pio_c 24 1 	// RDY
> 				 0			// nCE
> 				 &qe_pio_c 26 1		// ALE
> 				 &qe_pio_c 25 1		// CLE
> 				 0>;			// nwp  
> 		};
> 

Yep, it's perfectly fine to have 'empty' gpio entries (entries with
phandle set to 0/NULL), we're using this trick in the atmel_nand
driver as well.

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#1634502

FromBrian Norris <computersforpeace@gmail.com>
Date2017-05-02 18:20 +0200
Message-ID<tCIGR-AC-9@gated-at.bofh.it>
In reply to#1634269
Hi Christophe, Boris,

On Tue, May 02, 2017 at 11:03:34AM +0200, Boris Brezillon wrote:
> On Tue, 2 May 2017 07:47:40 +0200
> Christophe LEROY <christophe.leroy@c-s.fr> wrote:
> 
> > Le 01/05/2017 à 23:46, Brian Norris a écrit :
> > > On Fri, Feb 10, 2017 at 03:01:10PM +0100, Christophe Leroy wrote:  
> > >> On some hardware, the nCE signal is wired to the ChipSelect associated
> > >> to bus address of the NAND, so it is automatically driven during the
> > >> memory access and it is not managed by a GPIO.
> > >>
> > >> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>  
> > >
> > > Not really a problem with this patch exactly, but FYI you're only making
> > > this optional for the non-DT case. For device tree, this is kinda hard
> > > to do, since the current binding suggests we retrieve the GPIOs based on
> > > index position, not by name. So if you leave one off...I guess we well
> > > just be off-by-1 on the indeces until we hit a non-optional one...which
> > > I guess is "CLE".
> > >
> > > If we wanted this to work for DT, we'd need to extend this driver (and
> > > binding doc) to support requesting GPIOs by name.
> > >  
> > 
> > It works for me with devicetree.
> > 
> > I have the following definition in my DT:
> > 
> > 		nand@1,0 {
> > 			compatible = "gpio-control-nand";
> > 			reg = <1 0x0 0x01>;
> > 			#address-cells = <1>;
> > 			#size-cells = <1>;
> > 			gpios = <&qe_pio_c 24 1 	// RDY
> > 				 0			// nCE
> > 				 &qe_pio_c 26 1		// ALE
> > 				 &qe_pio_c 25 1		// CLE
> > 				 0>;			// nwp  
> > 		};
> > 
> 
> Yep, it's perfectly fine to have 'empty' gpio entries (entries with
> phandle set to 0/NULL), we're using this trick in the atmel_nand
> driver as well.

I wasn't aware. In that case, you need to change the binding doc to
note that nCE is optional now.

Brian

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