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[PATCH v5 00/10] Renesas RZ/A1 pin and gpio controller

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  [PATCH v5 00/10] Renesas RZ/A1 pin and gpio controller Jacopo Mondi <jacopo+renesas@jmondi.org> - 2017-04-27 10:30 +0200
    [PATCH v5 05/10] arm: dts: dt-bindings: Add Renesas RZ/A1 pinctrl header Jacopo Mondi <jacopo+renesas@jmondi.org> - 2017-04-27 10:30 +0200
      Re: [PATCH v5 05/10] arm: dts: dt-bindings: Add Renesas RZ/A1 pinctrl header Geert Uytterhoeven <geert@linux-m68k.org> - 2017-04-27 10:40 +0200
        Re: [PATCH v5 05/10] arm: dts: dt-bindings: Add Renesas RZ/A1  pinctrl header Simon Horman <horms@verge.net.au> - 2017-04-28 07:20 +0200
    [PATCH v5 07/10] arm: dts: genmai: Add SCIF2 pin group Jacopo Mondi <jacopo+renesas@jmondi.org> - 2017-04-27 10:30 +0200
      Re: [PATCH v5 07/10] arm: dts: genmai: Add SCIF2 pin group Simon Horman <horms@verge.net.au> - 2017-04-28 07:30 +0200
    [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group Jacopo Mondi <jacopo+renesas@jmondi.org> - 2017-04-27 10:30 +0200
      Re: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group Geert Uytterhoeven <geert@linux-m68k.org> - 2017-04-27 12:00 +0200
        RE: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group Chris Brandt <Chris.Brandt@renesas.com> - 2017-04-27 12:50 +0200
          Re: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group Simon Horman <horms@verge.net.au> - 2017-04-28 07:30 +0200
          Re: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group Geert Uytterhoeven <geert@linux-m68k.org> - 2017-04-28 09:20 +0200
            RE: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group Chris Brandt <Chris.Brandt@renesas.com> - 2017-04-28 16:50 +0200
              Re: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group Linus Walleij <linus.walleij@linaro.org> - 2017-05-05 14:10 +0200
                Re: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group Geert Uytterhoeven <geert@linux-m68k.org> - 2017-05-05 14:30 +0200
                RE: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group Chris Brandt <Chris.Brandt@renesas.com> - 2017-05-05 14:50 +0200
                  Re: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group Linus Walleij <linus.walleij@linaro.org> - 2017-05-11 15:50 +0200
      Re: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group Linus Walleij <linus.walleij@linaro.org> - 2017-04-28 11:00 +0200
        RE: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group Chris Brandt <Chris.Brandt@renesas.com> - 2017-04-28 16:00 +0200
    [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable Jacopo Mondi <jacopo+renesas@jmondi.org> - 2017-04-27 10:30 +0200
      Re: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-04-27 17:00 +0200
        Re: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable Linus Walleij <linus.walleij@linaro.org> - 2017-04-28 10:40 +0200
          Re: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable Geert Uytterhoeven <geert@linux-m68k.org> - 2017-04-28 12:20 +0200
            Re: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable Linus Walleij <linus.walleij@linaro.org> - 2017-05-07 23:50 +0200
          RE: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and  output-enable Chris Brandt <Chris.Brandt@renesas.com> - 2017-04-28 14:10 +0200
            Re: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-04-28 14:20 +0200
              RE: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and  output-enable Chris Brandt <Chris.Brandt@renesas.com> - 2017-04-28 15:20 +0200
                Re: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-04-28 17:00 +0200
                  RE: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and  output-enable Chris Brandt <Chris.Brandt@renesas.com> - 2017-04-28 17:20 +0200
                    Re: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-04-28 17:40 +0200
                      RE: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and  output-enable Chris Brandt <Chris.Brandt@renesas.com> - 2017-04-28 18:50 +0200
                  Re: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable Linus Walleij <linus.walleij@linaro.org> - 2017-05-08 01:30 +0200
                    Re: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and  output-enable jmondi <jacopo@jmondi.org> - 2017-05-08 18:10 +0200
                      Re: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-05-08 18:20 +0200
                        RE: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and  output-enable Chris Brandt <Chris.Brandt@renesas.com> - 2017-05-08 19:10 +0200
                          Re: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-05-08 20:30 +0200
                            RE: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and  output-enable Chris Brandt <Chris.Brandt@renesas.com> - 2017-05-08 22:10 +0200
                        Re: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and  output-enable jmondi <jacopo@jmondi.org> - 2017-05-08 19:30 +0200
                          Re: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-05-08 19:50 +0200
                            Re: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and  output-enable jmondi <jacopo@jmondi.org> - 2017-05-09 12:00 +0200
                          Re: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable Linus Walleij <linus.walleij@linaro.org> - 2017-05-08 23:20 +0200
                            Re: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable Geert Uytterhoeven <geert@linux-m68k.org> - 2017-05-09 13:00 +0200
    [PATCH v5 02/10] pinctrl: generic: Add macros to unpack properties Jacopo Mondi <jacopo+renesas@jmondi.org> - 2017-04-27 10:30 +0200
      Re: [PATCH v5 02/10] pinctrl: generic: Add macros to unpack properties Geert Uytterhoeven <geert@linux-m68k.org> - 2017-04-27 10:40 +0200
      Re: [PATCH v5 02/10] pinctrl: generic: Add macros to unpack properties Linus Walleij <linus.walleij@linaro.org> - 2017-04-28 10:20 +0200
        Re: [PATCH v5 02/10] pinctrl: generic: Add macros to unpack properties Geert Uytterhoeven <geert@linux-m68k.org> - 2017-04-28 12:10 +0200
        Re: [PATCH v5 02/10] pinctrl: generic: Add macros to unpack  properties jmondi <jacopo@jmondi.org> - 2017-04-28 14:50 +0200
        Re: [PATCH v5 02/10] pinctrl: generic: Add macros to unpack properties Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-04-28 18:30 +0200
    [PATCH v5 04/10] dt-bindings: pinctrl: Add RZ/A1 bindings doc Jacopo Mondi <jacopo+renesas@jmondi.org> - 2017-04-27 10:30 +0200
      Re: [PATCH v5 04/10] dt-bindings: pinctrl: Add RZ/A1 bindings doc Geert Uytterhoeven <geert@linux-m68k.org> - 2017-04-27 10:40 +0200
      Re: [PATCH v5 04/10] dt-bindings: pinctrl: Add RZ/A1 bindings doc Rob Herring <robh@kernel.org> - 2017-04-28 23:10 +0200
    [PATCH v5 06/10] arm: dts: r7s72100: Add pin controller node Jacopo Mondi <jacopo+renesas@jmondi.org> - 2017-04-27 10:30 +0200
    [PATCH v5 09/10] arm: dts: genmai: Add user led device nodes Jacopo Mondi <jacopo+renesas@jmondi.org> - 2017-04-27 10:30 +0200
    [PATCH v5 08/10] arm: dts: genmai: Add RIIC2 pin group Jacopo Mondi <jacopo+renesas@jmondi.org> - 2017-04-27 10:30 +0200
    Re: [PATCH v5 00/10] Renesas RZ/A1 pin and gpio controller Geert Uytterhoeven <geert@linux-m68k.org> - 2017-04-27 10:50 +0200
      Re: [PATCH v5 00/10] Renesas RZ/A1 pin and gpio controller Simon Horman <horms@verge.net.au> - 2017-04-28 07:30 +0200
      Re: [PATCH v5 00/10] Renesas RZ/A1 pin and gpio controller jmondi <jacopo@jmondi.org> - 2017-04-28 09:30 +0200
        Re: [PATCH v5 00/10] Renesas RZ/A1 pin and gpio controller Simon Horman <horms@verge.net.au> - 2017-04-28 09:40 +0200
        Re: [PATCH v5 00/10] Renesas RZ/A1 pin and gpio controller Geert Uytterhoeven <geert@linux-m68k.org> - 2017-04-28 09:40 +0200

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#1631950 — [PATCH v5 00/10] Renesas RZ/A1 pin and gpio controller

Hi Geert,
   this is 5th round of gpio/pincontroller for RZ/A1 devices.

I have updated the pin controller driver to use the newly introduced
"pinctrl_enable()" function.
This is required since v4.11-rc7 as otherwise, as reported by Chris Brandt,
the pin controller does not start.

I have incorporated your comments on the device tree bindings documentation,
and added to pinctrl-generic.h header file two macros to unpack generic
properties and their arguments.

Tested with SCIF, RIIC, ETHER and gpio-leds on Genmai board.

Thanks
   j

v1 -> v2:
- change pin configuration flags as suggested by Chris
- gpio set direction function fixed as suggested by Chris
- add some more example on pin configuration flag usage to dt-binding doc
- fix gpio-controller names to remove unit address as suggested by Geert
- some comments chopped here and there to make the driver less verbose

v2 -> v3:
- fix grammar and syntax in comment and documentation
- fix code style (reverse xmas tree ordering in variable declaration)
- use irqsave/irqrestore in spinlock lock/unlock
- use devm_ version of kasprintf (memory returned was not properly free)
- use bitops.h operation ffs and fls to make sure a single bit is set in pmx
  mask
- Add Geert's reviewed-by to DTS patches

v3 -> v4:
- use "pinmux" property in pmx sub-nodes in place of "renesas,pins"
- use pinconf standard properties to set pin mux additional flags
- add "bi-directional" and "output-enable" to pinconf generic properties
- perform pmx function parsing at dt_node_to_map() time
- change DT bindings to use GENERIC_PINCONF
- change DT bindings to allow sub-nodes to have "pinmux" property specified
- several renames (register names, DT parse functions, set_mux() function)

v4 -> v5:
- use pinctrl_enable() function in pin controller registration function
- update bindings documentation to incorporate Geert's comments
- add generic properties unpack macros

Jacopo Mondi (10):
  pinctrl: generic: Add bi-directional and output-enable
  pinctrl: generic: Add macros to unpack properties
  pinctrl: Renesas RZ/A1 pin and gpio controller
  dt-bindings: pinctrl: Add RZ/A1 bindings doc
  arm: dts: dt-bindings: Add Renesas RZ/A1 pinctrl header
  arm: dts: r7s72100: Add pin controller node
  arm: dts: genmai: Add SCIF2 pin group
  arm: dts: genmai: Add RIIC2 pin group
  arm: dts: genmai: Add user led device nodes
  arm: dts: genmai: Add ethernet pin group

 .../bindings/pinctrl/pinctrl-bindings.txt          |   2 +
 .../bindings/pinctrl/renesas,rza1-pinctrl.txt      | 219 +++++
 arch/arm/boot/dts/r7s72100-genmai.dts              |  76 ++
 arch/arm/boot/dts/r7s72100.dtsi                    |  78 ++
 drivers/pinctrl/Kconfig                            |  11 +
 drivers/pinctrl/Makefile                           |   1 +
 drivers/pinctrl/pinconf-generic.c                  |   3 +
 drivers/pinctrl/pinctrl-rza1.c                     | 995 +++++++++++++++++++++
 include/dt-bindings/pinctrl/r7s72100-pinctrl.h     |  16 +
 include/linux/pinctrl/pinconf-generic.h            |   7 +-
 10 files changed, 1407 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt
 create mode 100644 drivers/pinctrl/pinctrl-rza1.c
 create mode 100644 include/dt-bindings/pinctrl/r7s72100-pinctrl.h

--
2.7.4

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#1631951 — [PATCH v5 05/10] arm: dts: dt-bindings: Add Renesas RZ/A1 pinctrl header

Add dt-bindings for Renesas r7s72100 pin controller header file.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
 include/dt-bindings/pinctrl/r7s72100-pinctrl.h | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100644 include/dt-bindings/pinctrl/r7s72100-pinctrl.h

diff --git a/include/dt-bindings/pinctrl/r7s72100-pinctrl.h b/include/dt-bindings/pinctrl/r7s72100-pinctrl.h
new file mode 100644
index 0000000..6b609fe
--- /dev/null
+++ b/include/dt-bindings/pinctrl/r7s72100-pinctrl.h
@@ -0,0 +1,16 @@
+/*
+ * Defines macros and constants for Renesas RZ/A1 pin controller pin
+ * muxing functions.
+ */
+#ifndef __DT_BINDINGS_PINCTRL_RENESAS_RZA1_H
+#define __DT_BINDINGS_PINCTRL_RENESAS_RZA1_H
+
+#define RZA1_PINS_PER_PORT	16
+
+/*
+ * Create the pin index from its bank and position numbers and store in
+ * the upper 16 bits the alternate function identifier
+ */
+#define RZA1_PINMUX(b, p, f)	((b) * RZA1_PINS_PER_PORT + (p) | (f << 16))
+
+#endif /* __DT_BINDINGS_PINCTRL_RENESAS_RZA1_H */
-- 
2.7.4

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#1631965 — Re: [PATCH v5 05/10] arm: dts: dt-bindings: Add Renesas RZ/A1 pinctrl header

On Thu, Apr 27, 2017 at 10:19 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> Add dt-bindings for Renesas r7s72100 pin controller header file.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

> --- /dev/null
> +++ b/include/dt-bindings/pinctrl/r7s72100-pinctrl.h
> @@ -0,0 +1,16 @@

> +#define RZA1_PINMUX(b, p, f)   ((b) * RZA1_PINS_PER_PORT + (p) | (f << 16))

... | (f) << 16)

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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#1632527 — Re: [PATCH v5 05/10] arm: dts: dt-bindings: Add Renesas RZ/A1 pinctrl header

On Thu, Apr 27, 2017 at 10:38:39AM +0200, Geert Uytterhoeven wrote:
> On Thu, Apr 27, 2017 at 10:19 AM, Jacopo Mondi
> <jacopo+renesas@jmondi.org> wrote:
> > Add dt-bindings for Renesas r7s72100 pin controller header file.
> >
> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thanks, I have queued this up.

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#1631952 — [PATCH v5 07/10] arm: dts: genmai: Add SCIF2 pin group

Add pin configuration subnode for SCIF2 serial debug interface.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm/boot/dts/r7s72100-genmai.dts | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts b/arch/arm/boot/dts/r7s72100-genmai.dts
index 118a8e2..c28d74b 100644
--- a/arch/arm/boot/dts/r7s72100-genmai.dts
+++ b/arch/arm/boot/dts/r7s72100-genmai.dts
@@ -11,6 +11,7 @@
 
 /dts-v1/;
 #include "r7s72100.dtsi"
+#include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
 
 / {
 	model = "Genmai";
@@ -36,6 +37,14 @@
 	};
 };
 
+&pinctrl {
+
+	scif2_pins: serial2 {
+		/* P3_0 as TxD2; P3_2 as RxD2 */
+		pinmux = <RZA1_PINMUX(3, 0, 6)>, <RZA1_PINMUX(3, 2, 4)>;
+	};
+};
+
 &extal_clk {
 	clock-frequency = <13330000>;
 };
@@ -60,6 +69,9 @@
 };
 
 &scif2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&scif2_pins>;
+
 	status = "okay";
 };
 
-- 
2.7.4

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#1632535 — Re: [PATCH v5 07/10] arm: dts: genmai: Add SCIF2 pin group

On Thu, Apr 27, 2017 at 10:19:51AM +0200, Jacopo Mondi wrote:
> Add pin configuration subnode for SCIF2 serial debug interface.
> 
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

As the dt-bindings (documentation) has been acked by Geert I'd be happy
to queue up this and other "arm: dts: genmai" DT patches in this series
which do not have any outstanding review comments. Is it safe to do so
without the PFC driver patches in place?

> ---
>  arch/arm/boot/dts/r7s72100-genmai.dts | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts b/arch/arm/boot/dts/r7s72100-genmai.dts
> index 118a8e2..c28d74b 100644
> --- a/arch/arm/boot/dts/r7s72100-genmai.dts
> +++ b/arch/arm/boot/dts/r7s72100-genmai.dts
> @@ -11,6 +11,7 @@
>  
>  /dts-v1/;
>  #include "r7s72100.dtsi"
> +#include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
>  
>  / {
>  	model = "Genmai";
> @@ -36,6 +37,14 @@
>  	};
>  };
>  
> +&pinctrl {
> +
> +	scif2_pins: serial2 {
> +		/* P3_0 as TxD2; P3_2 as RxD2 */
> +		pinmux = <RZA1_PINMUX(3, 0, 6)>, <RZA1_PINMUX(3, 2, 4)>;
> +	};
> +};
> +
>  &extal_clk {
>  	clock-frequency = <13330000>;
>  };
> @@ -60,6 +69,9 @@
>  };
>  
>  &scif2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&scif2_pins>;
> +
>  	status = "okay";
>  };
>  
> -- 
> 2.7.4
> 

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#1631953 — [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group

Add pin configuration subnode for ETHER ethernet controller.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
 arch/arm/boot/dts/r7s72100-genmai.dts | 41 +++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts b/arch/arm/boot/dts/r7s72100-genmai.dts
index f7c512e..328f4c9 100644
--- a/arch/arm/boot/dts/r7s72100-genmai.dts
+++ b/arch/arm/boot/dts/r7s72100-genmai.dts
@@ -63,6 +63,34 @@
 		pinmux = <RZA1_PINMUX(1, 4, 1)>, <RZA1_PINMUX(1, 5, 1)>;
 		bi-directional;
 	};
+
+	ether_pins: ether {
+		pins {
+			/* Ethernet on Ports 1,2,3,5 */
+			pinmux = <RZA1_PINMUX(1, 14, 4)>,/* P1_14 = ET_COL  */
+				 <RZA1_PINMUX(5, 9, 2)>, /* P5_9 = ET_MDC   */
+				 <RZA1_PINMUX(3, 4, 2)>, /* P3_4 = ET_RXCLK */
+				 <RZA1_PINMUX(3, 5, 2)>, /* P3_5 = ET_RXER  */
+				 <RZA1_PINMUX(3, 6, 2)>, /* P3_6 = ET_RXDV  */
+				 <RZA1_PINMUX(2, 0, 2)>, /* P2_0 = ET_TXCLK */
+				 <RZA1_PINMUX(2, 1, 2)>, /* P2_1 = ET_TXER  */
+				 <RZA1_PINMUX(2, 2, 2)>, /* P2_2 = ET_TXEN  */
+				 <RZA1_PINMUX(2, 3, 2)>, /* P2_3 = ET_CRS   */
+				 <RZA1_PINMUX(2, 4, 2)>, /* P2_4 = ET_TXD0  */
+				 <RZA1_PINMUX(2, 5, 2)>, /* P2_5 = ET_TXD1  */
+				 <RZA1_PINMUX(2, 6, 2)>, /* P2_6 = ET_TXD2  */
+				 <RZA1_PINMUX(2, 7, 2)>, /* P2_7 = ET_TXD3  */
+				 <RZA1_PINMUX(2, 8, 2)>, /* P2_8 = ET_RXD0  */
+				 <RZA1_PINMUX(2, 9, 2)>, /* P2_9 = ET_RXD1  */
+				 <RZA1_PINMUX(2, 10, 2)>,/* P2_10 = ET_RXD2 */
+				 <RZA1_PINMUX(2, 11, 2)>;/* P2_11 = ET_RXD3 */
+		};
+
+		pins_bidir {
+			pinmux = <RZA1_PINMUX(3, 3, 2)>;/* P3_3 = ET_MDIO  */
+			bi-directional;
+		};
+	};
 };
 
 &extal_clk {
@@ -77,6 +105,19 @@
 	status = "okay";
 };
 
+&ether {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ether_pins>;
+
+	status = "okay";
+
+	renesas,no-ether-link;
+	phy-handle = <&phy0>;
+	phy0: ethernet-phy@0 {
+		reg = <0>;
+	};
+};
+
 &i2c2 {
 	status = "okay";
 	clock-frequency = <400000>;
-- 
2.7.4

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#1632010 — Re: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group

Hi Jacopo,

On Thu, Apr 27, 2017 at 10:19 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> Add pin configuration subnode for ETHER ethernet controller.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

> --- a/arch/arm/boot/dts/r7s72100-genmai.dts
> +++ b/arch/arm/boot/dts/r7s72100-genmai.dts

> @@ -77,6 +105,19 @@
>         status = "okay";
>  };
>
> +&ether {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&ether_pins>;
> +
> +       status = "okay";
> +
> +       renesas,no-ether-link;
> +       phy-handle = <&phy0>;
> +       phy0: ethernet-phy@0 {
> +               reg = <0>;

Shouldn't the interrupt (connected to P1_15) be described?

> +       };
> +};

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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#1632025 — RE: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group

Hi Geert,

On Thursday, April 27, 2017, Geert Uytterhoeven wrote:
> > +&ether {
> > +       pinctrl-names = "default";
> > +       pinctrl-0 = <&ether_pins>;
> > +
> > +       status = "okay";
> > +
> > +       renesas,no-ether-link;
> > +       phy-handle = <&phy0>;
> > +       phy0: ethernet-phy@0 {
> > +               reg = <0>;
> 
> Shouldn't the interrupt (connected to P1_15) be described?


That interrupt pin from the PHY is not used. It did not need to be connected.


Chris

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#1632533 — Re: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group

On Thu, Apr 27, 2017 at 10:48:45AM +0000, Chris Brandt wrote:
> Hi Geert,
> 
> On Thursday, April 27, 2017, Geert Uytterhoeven wrote:
> > > +&ether {
> > > +       pinctrl-names = "default";
> > > +       pinctrl-0 = <&ether_pins>;
> > > +
> > > +       status = "okay";
> > > +
> > > +       renesas,no-ether-link;
> > > +       phy-handle = <&phy0>;
> > > +       phy0: ethernet-phy@0 {
> > > +               reg = <0>;
> > 
> > Shouldn't the interrupt (connected to P1_15) be described?
> 
> 
> That interrupt pin from the PHY is not used. It did not need to be connected.

So things are fine as above or should I expect to see v6?

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#1632573 — Re: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group

Hi Chris,

On Thu, Apr 27, 2017 at 12:48 PM, Chris Brandt <Chris.Brandt@renesas.com> wrote:
> On Thursday, April 27, 2017, Geert Uytterhoeven wrote:
>> > +&ether {
>> > +       pinctrl-names = "default";
>> > +       pinctrl-0 = <&ether_pins>;
>> > +
>> > +       status = "okay";
>> > +
>> > +       renesas,no-ether-link;
>> > +       phy-handle = <&phy0>;
>> > +       phy0: ethernet-phy@0 {
>> > +               reg = <0>;
>>
>> Shouldn't the interrupt (connected to P1_15) be described?
>
> That interrupt pin from the PHY is not used. It did not need to be connected.

But it is connected, according to the schematics.

DT describes hardware, not software limitations.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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#1632948 — RE: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group

Hi Geert,

On Friday, April 28, 2017, Geert Uytterhoeven wrote:
> >> Shouldn't the interrupt (connected to P1_15) be described?
> >
> > That interrupt pin from the PHY is not used. It did not need to be
> connected.
> 
> But it is connected, according to the schematics.

P1_15 can be configured as:
 * GPIO_IN
 * AN7
 * AVB_CAPTURE

So...I guess you would 'describe' it as an GPIO-input.


> DT describes hardware, not software limitations.

Describing things is fine, but the kernel code takes the DT and then start configuring things based on it.

For example, on the RSK board, that line is connected to P4_14. P4_14 can be configured as IRQ6...but IRQ6 comes out in 8 different pin choices, and I might want to use one of those other choices, so I don't want to describe P4_14 as an interrupt.

If it was just describing that "pin 15 of the PHY chip is tied to pin Y19 of the RZ/A1H", that's fine because it's hardware connection that's not going to change.
But...the DT also defines the pin muxing...which is a software decision (do I want to get interrupt or just manually poll or simple ignore it).
This is the part of the whole "DT is for hardware description only" that doesn't really make sense to me.


Chris

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#1636337 — Re: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group

On Fri, Apr 28, 2017 at 4:48 PM, Chris Brandt <Chris.Brandt@renesas.com> wrote:

I think this was written by me, not Geert...

>> DT describes hardware, not software limitations.
>
> Describing things is fine, but the kernel code takes the DT and then start configuring things based on it.
>
> For example, on the RSK board, that line is connected to P4_14. P4_14 can be configured as IRQ6...but IRQ6 comes out in 8 different pin choices, and I might want to use one of those other choices, so I don't want to describe P4_14 as an interrupt.
>
> If it was just describing that "pin 15 of the PHY chip is tied to pin Y19 of the RZ/A1H", that's fine because it's hardware connection that's not going to change.
> But...the DT also defines the pin muxing...which is a software decision (do I want to get interrupt or just manually poll or simple ignore it).
> This is the part of the whole "DT is for hardware description only" that doesn't really make sense to me.

OK yeah we do hardware description AND configuration.

And we never do interpreted languages.

And then there is a bunch of grayzone things. For example we have
a linux,input binding for connecting keypresses to certain Linux input
codes. That is really grayzone, but very useful.

Yours,
Linus Walleij

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#1636347 — Re: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group

Hi Linus,

On Fri, May 5, 2017 at 2:06 PM, Linus Walleij <linus.walleij@linaro.org> wrote:
> On Fri, Apr 28, 2017 at 4:48 PM, Chris Brandt <Chris.Brandt@renesas.com> wrote:
>
> I think this was written by me, not Geert...
>
>>> DT describes hardware, not software limitations.

Na, I did write it.

I can understand you sometimes mix up things, esp. when you're
enjoying LLC ;-)

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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#1636358 — RE: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group

On Friday, May 05, 2017, Linus Walleij wrote:
> > This is the part of the whole "DT is for hardware description only" that
> doesn't really make sense to me.
> 
> OK yeah we do hardware description AND configuration.
> 
> And we never do interpreted languages.
> 
> And then there is a bunch of grayzone things. For example we have a
> linux,input binding for connecting keypresses to certain Linux input codes.
> That is really grayzone, but very useful.

Ah....

	compatible = "linux,grayzone";


Thanks for the reply. I'll stop ranting now.
Of course, I'll still probably screw it up again on a future patch somehow...

Cheers

Chris

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#1639452 — Re: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group

On Fri, May 5, 2017 at 2:45 PM, Chris Brandt <Chris.Brandt@renesas.com> wrote:
> On Friday, May 05, 2017, Linus Walleij wrote:
>> > This is the part of the whole "DT is for hardware description only" that
>> doesn't really make sense to me.
>>
>> OK yeah we do hardware description AND configuration.
>>
>> And we never do interpreted languages.
>>
>> And then there is a bunch of grayzone things. For example we have a
>> linux,input binding for connecting keypresses to certain Linux input codes.
>> That is really grayzone, but very useful.
>
> Ah....
>
>         compatible = "linux,grayzone";
>
> Thanks for the reply. I'll stop ranting now.
> Of course, I'll still probably screw it up again on a future patch somehow...

For this driver I remarked in some other thread that we may
end up with some

"renesas,bidirectional"

or so. But yeah, it's kinda grayzone too.

Yours,
Linus Walleij

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#1632697 — Re: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group

On Thu, Apr 27, 2017 at 10:19 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:

> Add pin configuration subnode for ETHER ethernet controller.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
(...)
> +               pins_bidir {
> +                       pinmux = <RZA1_PINMUX(3, 3, 2)>;/* P3_3 = ET_MDIO  */
> +                       bi-directional;
> +               };

So I'm against merging this until someone explains what "bi-directional"
actually means, electrically speaking. What happens physically on this pin?

I think this just means open drain.

It is dangerous to merge things we don't understand.

Surely someone inside Renesas can answer this question.

Yours,
Linus Walleij

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#1632909 — RE: [PATCH v5 10/10] arm: dts: genmai: Add ethernet pin group

On Friday, April 28, 2017, Linus Walleij wrote:
> > Add pin configuration subnode for ETHER ethernet controller.
> >
> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> (...)
> > +               pins_bidir {
> > +                       pinmux = <RZA1_PINMUX(3, 3, 2)>;/* P3_3 =
> ET_MDIO  */
> > +                       bi-directional;
> > +               };
> 
> So I'm against merging this until someone explains what "bi-directional"
> actually means, electrically speaking. What happens physically on this
> pin?
> 
> I think this just means open drain.
> 
> It is dangerous to merge things we don't understand.
> 
> Surely someone inside Renesas can answer this question.

I don't think this has anything to do with open drain because you need it for any pin that the peripheral IP block needs to transmit and receive over the same line, regardless of if it's a SDHI, I2C, Ethernet MDIO, etc...
It's more about of allowing the internal IP block signals to get hooked up to the IO pad signals.

Chris

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#1631955 — [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable

Add bi-directional and output-enable pin configuration properties.

bi-directional allows to specify when a pin shall operate in input and
output mode at the same time. This is particularly useful in platforms
where input and output buffers have to be manually enabled.

output-enable is just syntactic sugar to specify that a pin shall
operate in output mode, ignoring the provided argument.
This pairs with input-enable pin configuration option.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
 Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt | 2 ++
 drivers/pinctrl/pinconf-generic.c                              | 3 +++
 include/linux/pinctrl/pinconf-generic.h                        | 3 +++
 3 files changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
index bf3f7b0..f2ed458 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
@@ -222,6 +222,7 @@ bias-bus-hold		- latch weakly
 bias-pull-up		- pull up the pin
 bias-pull-down		- pull down the pin
 bias-pull-pin-default	- use pin-default pull state
+bi-directional		- pin supports simultaneous input/output operations
 drive-push-pull		- drive actively high and low
 drive-open-drain	- drive with open drain
 drive-open-source	- drive with open source
@@ -234,6 +235,7 @@ input-debounce		- debounce mode with debound time X
 power-source		- select between different power supplies
 low-power-enable	- enable low power mode
 low-power-disable	- disable low power mode
+output-enable		- enable output on pin regardless of output value
 output-low		- set the pin to output mode with low level
 output-high		- set the pin to output mode with high level
 slew-rate		- set the slew rate
diff --git a/drivers/pinctrl/pinconf-generic.c b/drivers/pinctrl/pinconf-generic.c
index ce3335a..03e6808 100644
--- a/drivers/pinctrl/pinconf-generic.c
+++ b/drivers/pinctrl/pinconf-generic.c
@@ -35,6 +35,7 @@ static const struct pin_config_item conf_items[] = {
 	PCONFDUMP(PIN_CONFIG_BIAS_PULL_PIN_DEFAULT,
 				"input bias pull to pin specific state", NULL, false),
 	PCONFDUMP(PIN_CONFIG_BIAS_PULL_UP, "input bias pull up", NULL, false),
+	PCONFDUMP(PIN_CONFIG_BIDIRECTIONAL, "bi-directional pin operations", NULL, false),
 	PCONFDUMP(PIN_CONFIG_DRIVE_OPEN_DRAIN, "output drive open drain", NULL, false),
 	PCONFDUMP(PIN_CONFIG_DRIVE_OPEN_SOURCE, "output drive open source", NULL, false),
 	PCONFDUMP(PIN_CONFIG_DRIVE_PUSH_PULL, "output drive push pull", NULL, false),
@@ -160,6 +161,7 @@ static const struct pinconf_generic_params dt_params[] = {
 	{ "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
 	{ "bias-pull-pin-default", PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, 1 },
 	{ "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
+	{ "bi-directional", PIN_CONFIG_BIDIRECTIONAL, 1 },
 	{ "drive-open-drain", PIN_CONFIG_DRIVE_OPEN_DRAIN, 0 },
 	{ "drive-open-source", PIN_CONFIG_DRIVE_OPEN_SOURCE, 0 },
 	{ "drive-push-pull", PIN_CONFIG_DRIVE_PUSH_PULL, 0 },
@@ -172,6 +174,7 @@ static const struct pinconf_generic_params dt_params[] = {
 	{ "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
 	{ "low-power-disable", PIN_CONFIG_LOW_POWER_MODE, 0 },
 	{ "low-power-enable", PIN_CONFIG_LOW_POWER_MODE, 1 },
+	{ "output-enable", PIN_CONFIG_OUTPUT, 1, },
 	{ "output-high", PIN_CONFIG_OUTPUT, 1, },
 	{ "output-low", PIN_CONFIG_OUTPUT, 0, },
 	{ "power-source", PIN_CONFIG_POWER_SOURCE, 0 },
diff --git a/include/linux/pinctrl/pinconf-generic.h b/include/linux/pinctrl/pinconf-generic.h
index 7620eb1..279e3c5 100644
--- a/include/linux/pinctrl/pinconf-generic.h
+++ b/include/linux/pinctrl/pinconf-generic.h
@@ -42,6 +42,8 @@
  * @PIN_CONFIG_BIAS_PULL_UP: the pin will be pulled up (usually with high
  *	impedance to VDD). If the argument is != 0 pull-up is enabled,
  *	if it is 0, pull-up is total, i.e. the pin is connected to VDD.
+ * @PIN_CONFIG_BIDIRECTIONAL: the pin will be configured to allow simultaneous
+ *	input and output operations.
  * @PIN_CONFIG_DRIVE_OPEN_DRAIN: the pin will be driven with open drain (open
  *	collector) which means it is usually wired with other output ports
  *	which are then pulled up with an external resistor. Setting this
@@ -96,6 +98,7 @@ enum pin_config_param {
 	PIN_CONFIG_BIAS_PULL_DOWN,
 	PIN_CONFIG_BIAS_PULL_PIN_DEFAULT,
 	PIN_CONFIG_BIAS_PULL_UP,
+	PIN_CONFIG_BIDIRECTIONAL,
 	PIN_CONFIG_DRIVE_OPEN_DRAIN,
 	PIN_CONFIG_DRIVE_OPEN_SOURCE,
 	PIN_CONFIG_DRIVE_PUSH_PULL,
-- 
2.7.4

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#1632156 — Re: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable

On Thu, Apr 27, 2017 at 11:19 AM, Jacopo Mondi
<jacopo+renesas@jmondi.org> wrote:
> Add bi-directional and output-enable pin configuration properties.
>
> bi-directional allows to specify when a pin shall operate in input and
> output mode at the same time. This is particularly useful in platforms
> where input and output buffers have to be manually enabled.
>
> output-enable is just syntactic sugar to specify that a pin shall
> operate in output mode, ignoring the provided argument.
> This pairs with input-enable pin configuration option.

For me it looks like you are trying to alias open-drain + bias or
alike. Don't actually see the benefit of it.

> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> ---
>  Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt | 2 ++
>  drivers/pinctrl/pinconf-generic.c                              | 3 +++
>  include/linux/pinctrl/pinconf-generic.h                        | 3 +++
>  3 files changed, 8 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
> index bf3f7b0..f2ed458 100644
> --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
> +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
> @@ -222,6 +222,7 @@ bias-bus-hold               - latch weakly
>  bias-pull-up           - pull up the pin
>  bias-pull-down         - pull down the pin
>  bias-pull-pin-default  - use pin-default pull state
> +bi-directional         - pin supports simultaneous input/output operations
>  drive-push-pull                - drive actively high and low
>  drive-open-drain       - drive with open drain
>  drive-open-source      - drive with open source
> @@ -234,6 +235,7 @@ input-debounce              - debounce mode with debound time X
>  power-source           - select between different power supplies
>  low-power-enable       - enable low power mode
>  low-power-disable      - disable low power mode
> +output-enable          - enable output on pin regardless of output value
>  output-low             - set the pin to output mode with low level
>  output-high            - set the pin to output mode with high level
>  slew-rate              - set the slew rate
> diff --git a/drivers/pinctrl/pinconf-generic.c b/drivers/pinctrl/pinconf-generic.c
> index ce3335a..03e6808 100644
> --- a/drivers/pinctrl/pinconf-generic.c
> +++ b/drivers/pinctrl/pinconf-generic.c
> @@ -35,6 +35,7 @@ static const struct pin_config_item conf_items[] = {
>         PCONFDUMP(PIN_CONFIG_BIAS_PULL_PIN_DEFAULT,
>                                 "input bias pull to pin specific state", NULL, false),
>         PCONFDUMP(PIN_CONFIG_BIAS_PULL_UP, "input bias pull up", NULL, false),
> +       PCONFDUMP(PIN_CONFIG_BIDIRECTIONAL, "bi-directional pin operations", NULL, false),
>         PCONFDUMP(PIN_CONFIG_DRIVE_OPEN_DRAIN, "output drive open drain", NULL, false),
>         PCONFDUMP(PIN_CONFIG_DRIVE_OPEN_SOURCE, "output drive open source", NULL, false),
>         PCONFDUMP(PIN_CONFIG_DRIVE_PUSH_PULL, "output drive push pull", NULL, false),
> @@ -160,6 +161,7 @@ static const struct pinconf_generic_params dt_params[] = {
>         { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
>         { "bias-pull-pin-default", PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, 1 },
>         { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
> +       { "bi-directional", PIN_CONFIG_BIDIRECTIONAL, 1 },
>         { "drive-open-drain", PIN_CONFIG_DRIVE_OPEN_DRAIN, 0 },
>         { "drive-open-source", PIN_CONFIG_DRIVE_OPEN_SOURCE, 0 },
>         { "drive-push-pull", PIN_CONFIG_DRIVE_PUSH_PULL, 0 },
> @@ -172,6 +174,7 @@ static const struct pinconf_generic_params dt_params[] = {
>         { "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
>         { "low-power-disable", PIN_CONFIG_LOW_POWER_MODE, 0 },
>         { "low-power-enable", PIN_CONFIG_LOW_POWER_MODE, 1 },
> +       { "output-enable", PIN_CONFIG_OUTPUT, 1, },
>         { "output-high", PIN_CONFIG_OUTPUT, 1, },
>         { "output-low", PIN_CONFIG_OUTPUT, 0, },
>         { "power-source", PIN_CONFIG_POWER_SOURCE, 0 },
> diff --git a/include/linux/pinctrl/pinconf-generic.h b/include/linux/pinctrl/pinconf-generic.h
> index 7620eb1..279e3c5 100644
> --- a/include/linux/pinctrl/pinconf-generic.h
> +++ b/include/linux/pinctrl/pinconf-generic.h
> @@ -42,6 +42,8 @@
>   * @PIN_CONFIG_BIAS_PULL_UP: the pin will be pulled up (usually with high
>   *     impedance to VDD). If the argument is != 0 pull-up is enabled,
>   *     if it is 0, pull-up is total, i.e. the pin is connected to VDD.
> + * @PIN_CONFIG_BIDIRECTIONAL: the pin will be configured to allow simultaneous
> + *     input and output operations.
>   * @PIN_CONFIG_DRIVE_OPEN_DRAIN: the pin will be driven with open drain (open
>   *     collector) which means it is usually wired with other output ports
>   *     which are then pulled up with an external resistor. Setting this
> @@ -96,6 +98,7 @@ enum pin_config_param {
>         PIN_CONFIG_BIAS_PULL_DOWN,
>         PIN_CONFIG_BIAS_PULL_PIN_DEFAULT,
>         PIN_CONFIG_BIAS_PULL_UP,
> +       PIN_CONFIG_BIDIRECTIONAL,
>         PIN_CONFIG_DRIVE_OPEN_DRAIN,
>         PIN_CONFIG_DRIVE_OPEN_SOURCE,
>         PIN_CONFIG_DRIVE_PUSH_PULL,
> --
> 2.7.4
>



-- 
With Best Regards,
Andy Shevchenko

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