Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1632087 > unrolled thread
| Started by | "Jayachandran C." <c.jayachandran@gmail.com> |
|---|---|
| First post | 2017-04-27 15:10 +0200 |
| Last post | 2017-04-27 15:10 +0200 |
| Articles | 1 — 1 participant |
Back to article view | Back to linux.kernel
This discussion starts older than the indexed window; earlier articles aren't shown. The article labeled Started by
below is the oldest one visible, not the original post.
Re: [PATCH 1/3] arm64: Add MIDR values for Cavium cn99xx SoCs "Jayachandran C." <c.jayachandran@gmail.com> - 2017-04-27 15:10 +0200
| From | "Jayachandran C." <c.jayachandran@gmail.com> |
|---|---|
| Date | 2017-04-27 15:10 +0200 |
| Subject | Re: [PATCH 1/3] arm64: Add MIDR values for Cavium cn99xx SoCs |
| Message-ID | <tARlf-13j-1@gated-at.bofh.it> |
On Thu, Apr 27, 2017 at 5:16 PM, Geetha sowjanya <gakula@caviumnetworks.com> wrote: > From: Geetha <gakula@cavium.com> > > Add MIDR values for Cavium cn99xx SoCs > > Signed-off-by: Geetha <gakula@cavium.com> > --- > arch/arm64/include/asm/cputype.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h > index fc50271..066fad0 100644 > --- a/arch/arm64/include/asm/cputype.h > +++ b/arch/arm64/include/asm/cputype.h > @@ -85,6 +85,7 @@ > > #define CAVIUM_CPU_PART_THUNDERX 0x0A1 > #define CAVIUM_CPU_PART_THUNDERX_81XX 0x0A2 > +#define CAVIUM_CPU_PART_THUNDERX_99XX 0x0AF Can you please use the name CAVIUM_CPU_PART_THUNDERX2? We have used ThunderX2 consistently for this platform, having THUNDERX here would be confusing. > #define BRCM_CPU_PART_VULCAN 0x516 > > @@ -94,6 +95,8 @@ > #define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57) > #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX) > #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX) > +#define MIDR_THUNDERX_99XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_99XX) > +#define MIDR_BRCM_VULCAN MIDR_CPU_MODEL(ARM_CPU_IMP_BRCM, BRCM_CPU_PART_VULCAN) > #define MIDR_QCOM_FALKOR_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR_V1) > > #ifndef __ASSEMBLY__ Thanks, JC.
Back to top | Article view | linux.kernel
csiph-web