Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1631780 > unrolled thread
| Started by | "Rafael J. Wysocki" <rjw@rjwysocki.net> |
|---|---|
| First post | 2017-04-27 00:50 +0200 |
| Last post | 2017-05-05 01:40 +0200 |
| Articles | 2 — 2 participants |
Back to article view | Back to linux.kernel
This discussion starts older than the indexed window; earlier articles aren't shown. The article labeled Started by
below is the oldest one visible, not the original post.
Re: [PATCH] x86/intel_idle: add GLK support "Rafael J. Wysocki" <rjw@rjwysocki.net> - 2017-04-27 00:50 +0200
Re: [PATCH] x86/intel_idle: add GLK support Jacob Pan <jacob.jun.pan@linux.intel.com> - 2017-05-05 01:40 +0200
| From | "Rafael J. Wysocki" <rjw@rjwysocki.net> |
|---|---|
| Date | 2017-04-27 00:50 +0200 |
| Subject | Re: [PATCH] x86/intel_idle: add GLK support |
| Message-ID | <tADV0-jp-19@gated-at.bofh.it> |
On Saturday, April 22, 2017 11:06:25 PM David E. Box wrote:
> From: "Box, David E" <david.e.box@intel.com>
>
> Gemini Lake uses the same C-states as Broxton and also uses the
> IRTL MSR's to determine maximum C-state latency.
>
> Signed-off-by: David E. Box <david.e.box@linux.intel.com>
You could use the code names consistently in your subjects (but I can fix this up).
Jacob, any concerns?
> ---
> drivers/idle/intel_idle.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
> index e045a5c..778af71 100644
> --- a/drivers/idle/intel_idle.c
> +++ b/drivers/idle/intel_idle.c
> @@ -1097,6 +1097,7 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
> ICPU(INTEL_FAM6_XEON_PHI_KNL, idle_cpu_knl),
> ICPU(INTEL_FAM6_XEON_PHI_KNM, idle_cpu_knl),
> ICPU(INTEL_FAM6_ATOM_GOLDMONT, idle_cpu_bxt),
> + ICPU(INTEL_FAM6_ATOM_GEMINI_LAKE, idle_cpu_bxt),
> ICPU(INTEL_FAM6_ATOM_DENVERTON, idle_cpu_dnv),
> {}
> };
> @@ -1309,6 +1310,7 @@ static void intel_idle_state_table_update(void)
> ivt_idle_state_table_update();
> break;
> case INTEL_FAM6_ATOM_GOLDMONT:
> + case INTEL_FAM6_ATOM_GEMINI_LAKE:
> bxt_idle_state_table_update();
> break;
> case INTEL_FAM6_SKYLAKE_DESKTOP:
>
[toc] | [next] | [standalone]
| From | Jacob Pan <jacob.jun.pan@linux.intel.com> |
|---|---|
| Date | 2017-05-05 01:40 +0200 |
| Message-ID | <tDyvL-1QX-7@gated-at.bofh.it> |
| In reply to | #1631780 |
On Thu, 27 Apr 2017 00:36:42 +0200 "Rafael J. Wysocki" <rjw@rjwysocki.net> wrote: > > From: "Box, David E" <david.e.box@intel.com> > > > > Gemini Lake uses the same C-states as Broxton and also uses the > > IRTL MSR's to determine maximum C-state latency. > > > > Signed-off-by: David E. Box <david.e.box@linux.intel.com> > > You could use the code names consistently in your subjects (but I can > fix this up). > > Jacob, any concerns? No. Sorry for the delay. Acked-by: Pan, Jacob jun <jacob.jun.pan@intel.com>
[toc] | [prev] | [standalone]
Back to top | Article view | linux.kernel
csiph-web