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Re: [Intel-gfx] [PATCH v2] drm/i915: Flush untouched framebuffers before display on !llc

Started byDaniel Vetter <daniel@ffwll.ch>
First post2017-02-01 11:30 +0100
Last post2017-02-01 11:50 +0100
Articles 2 — 2 participants

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  Re: [Intel-gfx] [PATCH v2] drm/i915: Flush untouched framebuffers  before display on !llc Daniel Vetter <daniel@ffwll.ch> - 2017-02-01 11:30 +0100
    Re: [Intel-gfx] [PATCH v2] drm/i915: Flush untouched framebuffers  before display on !llc Chris Wilson <chris@chris-wilson.co.uk> - 2017-02-01 11:50 +0100

#1571465 — Re: [Intel-gfx] [PATCH v2] drm/i915: Flush untouched framebuffers before display on !llc

FromDaniel Vetter <daniel@ffwll.ch>
Date2017-02-01 11:30 +0100
SubjectRe: [Intel-gfx] [PATCH v2] drm/i915: Flush untouched framebuffers before display on !llc
Message-ID<t60kO-4Hi-11@gated-at.bofh.it>
On Mon, Jan 09, 2017 at 11:19:32AM +0000, Chris Wilson wrote:
> On a non-llc system, the objects are created with .cache_level =
> CACHE_NONE and so the transition to uncached for scanout is a no-op.
> However, if the object was never written to, it will still be in the CPU
> domain (having been zeroed out by shmemfs). Those cachelines need to be
> flushed prior to display.
> 
> Reported-by: Vito Caputo
> Fixes: a6a7cc4b7db6 ("drm/i915: Always flush the dirty CPU cache when pinning the scanout")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: <drm-intel-fixes@lists.freedesktop.org> # v4.10-rc1+
> ---
>  drivers/gpu/drm/i915/i915_gem.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 76689b59fc90..bdb113ef8cfe 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3514,7 +3514,7 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
>  	vma->display_alignment = max_t(u64, vma->display_alignment, alignment);
>  
>  	/* Treat this as an end-of-frame, like intel_user_framebuffer_dirty() */
> -	if (obj->cache_dirty) {
> +	if (obj->cache_dirty || obj->base.write_domain == I915_GEM_DOMAIN_CPU) {

Alternatively, should we set cache_dirty when initially allocating an
object? Ofc only if cpu_cache_is_coherent, like we do in other places.

Anyway, up to you which one you like more I'd say, this one looks correct
too.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>

>  		i915_gem_clflush_object(obj, true);
>  		intel_fb_obj_flush(obj, false, ORIGIN_DIRTYFB);
>  	}
> -- 
> 2.11.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch

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#1571472

FromChris Wilson <chris@chris-wilson.co.uk>
Date2017-02-01 11:50 +0100
Message-ID<t60E9-4NV-9@gated-at.bofh.it>
In reply to#1571465
On Wed, Feb 01, 2017 at 11:24:32AM +0100, Daniel Vetter wrote:
> On Mon, Jan 09, 2017 at 11:19:32AM +0000, Chris Wilson wrote:
> > On a non-llc system, the objects are created with .cache_level =
> > CACHE_NONE and so the transition to uncached for scanout is a no-op.
> > However, if the object was never written to, it will still be in the CPU
> > domain (having been zeroed out by shmemfs). Those cachelines need to be
> > flushed prior to display.
> > 
> > Reported-by: Vito Caputo
> > Fixes: a6a7cc4b7db6 ("drm/i915: Always flush the dirty CPU cache when pinning the scanout")
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: <drm-intel-fixes@lists.freedesktop.org> # v4.10-rc1+
> > ---
> >  drivers/gpu/drm/i915/i915_gem.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> > index 76689b59fc90..bdb113ef8cfe 100644
> > --- a/drivers/gpu/drm/i915/i915_gem.c
> > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > @@ -3514,7 +3514,7 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
> >  	vma->display_alignment = max_t(u64, vma->display_alignment, alignment);
> >  
> >  	/* Treat this as an end-of-frame, like intel_user_framebuffer_dirty() */
> > -	if (obj->cache_dirty) {
> > +	if (obj->cache_dirty || obj->base.write_domain == I915_GEM_DOMAIN_CPU) {
> 
> Alternatively, should we set cache_dirty when initially allocating an
> object? Ofc only if cpu_cache_is_coherent, like we do in other places.

I thought about it and didn't come to any firm conclusion. Currently
"cache_dirty" means omission of clflush, and that's been a source of
confusion ever since. I've a patch/plan to do async clflushing which
similarly impacts upon the meaning of obj->cache_dirty and interation
with frontbuffer tracking, so that seems a reasonable point to which to
defer further thought.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

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