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Groups > linux.kernel > #1569958 > unrolled thread

[PATCH 1/2] iommu/vt-d: Fix some macros that are incorrectly specified in intel-iommu

Started byAshok Raj <ashok.raj@intel.com>
First post2017-01-30 18:50 +0100
Last post2017-01-31 13:00 +0100
Articles 2 — 2 participants

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  [PATCH 1/2] iommu/vt-d: Fix some macros that are incorrectly specified in intel-iommu Ashok Raj <ashok.raj@intel.com> - 2017-01-30 18:50 +0100
    Re: [PATCH 1/2] iommu/vt-d: Fix some macros that are incorrectly  specified in intel-iommu Joerg Roedel <joro@8bytes.org> - 2017-01-31 13:00 +0100

#1569958 — [PATCH 1/2] iommu/vt-d: Fix some macros that are incorrectly specified in intel-iommu

FromAshok Raj <ashok.raj@intel.com>
Date2017-01-30 18:50 +0100
Subject[PATCH 1/2] iommu/vt-d: Fix some macros that are incorrectly specified in intel-iommu
Message-ID<t5ofw-6PP-15@gated-at.bofh.it>
From: CQ Tang <cq.tang@intel.com>

Some of the macros are incorrect with wrong bit-shifts resulting in picking
the incorrect invalidation granularity. Incorrect Source-ID in extended
devtlb invalidation caused device side errors.

To: Joerg Roedel <joro@8bytes.org>
To: David Woodhouse <dwmw2@infradead.org>
Cc: iommu@lists.linux-foundation.org
Cc: linux-kernel@vger.kernel.org
Cc: stable@vger.kernel.org
Cc: CQ Tang <cq.tang@intel.com>
Cc: Ashok Raj <ashok.raj@intel.com>

Fixes: 2f26e0a9 ("iommu/vt-d: Add basic SVM PASID support")
Signed-off-by: CQ Tang <cq.tang@intel.com>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Tested-by: CQ Tang <cq.tang@intel.com>
---
 include/linux/intel-iommu.h | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index d49e26c..23e129e 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -153,8 +153,8 @@ static inline void dmar_writeq(void __iomem *addr, u64 val)
 #define DMA_TLB_GLOBAL_FLUSH (((u64)1) << 60)
 #define DMA_TLB_DSI_FLUSH (((u64)2) << 60)
 #define DMA_TLB_PSI_FLUSH (((u64)3) << 60)
-#define DMA_TLB_IIRG(type) ((type >> 60) & 7)
-#define DMA_TLB_IAIG(val) (((val) >> 57) & 7)
+#define DMA_TLB_IIRG(type) ((type >> 60) & 3)
+#define DMA_TLB_IAIG(val) (((val) >> 57) & 3)
 #define DMA_TLB_READ_DRAIN (((u64)1) << 49)
 #define DMA_TLB_WRITE_DRAIN (((u64)1) << 48)
 #define DMA_TLB_DID(id)	(((u64)((id) & 0xffff)) << 32)
@@ -164,9 +164,9 @@ static inline void dmar_writeq(void __iomem *addr, u64 val)
 
 /* INVALID_DESC */
 #define DMA_CCMD_INVL_GRANU_OFFSET  61
-#define DMA_ID_TLB_GLOBAL_FLUSH	(((u64)1) << 3)
-#define DMA_ID_TLB_DSI_FLUSH	(((u64)2) << 3)
-#define DMA_ID_TLB_PSI_FLUSH	(((u64)3) << 3)
+#define DMA_ID_TLB_GLOBAL_FLUSH	(((u64)1) << 4)
+#define DMA_ID_TLB_DSI_FLUSH	(((u64)2) << 4)
+#define DMA_ID_TLB_PSI_FLUSH	(((u64)3) << 4)
 #define DMA_ID_TLB_READ_DRAIN	(((u64)1) << 7)
 #define DMA_ID_TLB_WRITE_DRAIN	(((u64)1) << 6)
 #define DMA_ID_TLB_DID(id)	(((u64)((id & 0xffff) << 16)))
@@ -316,8 +316,8 @@ enum {
 #define QI_DEV_EIOTLB_SIZE	(((u64)1) << 11)
 #define QI_DEV_EIOTLB_GLOB(g)	((u64)g)
 #define QI_DEV_EIOTLB_PASID(p)	(((u64)p) << 32)
-#define QI_DEV_EIOTLB_SID(sid)	((u64)((sid) & 0xffff) << 32)
-#define QI_DEV_EIOTLB_QDEP(qd)	(((qd) & 0x1f) << 16)
+#define QI_DEV_EIOTLB_SID(sid)	((u64)((sid) & 0xffff) << 16)
+#define QI_DEV_EIOTLB_QDEP(qd)	((u64)((qd) & 0x1f) << 4)
 #define QI_DEV_EIOTLB_MAX_INVS	32
 
 #define QI_PGRP_IDX(idx)	(((u64)(idx)) << 55)
-- 
2.7.4

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#1570647 — Re: [PATCH 1/2] iommu/vt-d: Fix some macros that are incorrectly specified in intel-iommu

FromJoerg Roedel <joro@8bytes.org>
Date2017-01-31 13:00 +0100
SubjectRe: [PATCH 1/2] iommu/vt-d: Fix some macros that are incorrectly specified in intel-iommu
Message-ID<t5Fgm-f7-11@gated-at.bofh.it>
In reply to#1569958
On Mon, Jan 30, 2017 at 09:39:52AM -0800, Ashok Raj wrote:
> From: CQ Tang <cq.tang@intel.com>
> 
> Some of the macros are incorrect with wrong bit-shifts resulting in picking
> the incorrect invalidation granularity. Incorrect Source-ID in extended
> devtlb invalidation caused device side errors.
> 
> To: Joerg Roedel <joro@8bytes.org>
> To: David Woodhouse <dwmw2@infradead.org>
> Cc: iommu@lists.linux-foundation.org
> Cc: linux-kernel@vger.kernel.org
> Cc: stable@vger.kernel.org
> Cc: CQ Tang <cq.tang@intel.com>
> Cc: Ashok Raj <ashok.raj@intel.com>
> 
> Fixes: 2f26e0a9 ("iommu/vt-d: Add basic SVM PASID support")
> Signed-off-by: CQ Tang <cq.tang@intel.com>
> Signed-off-by: Ashok Raj <ashok.raj@intel.com>
> Tested-by: CQ Tang <cq.tang@intel.com>
> ---
>  include/linux/intel-iommu.h | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)

Applied both, thanks Ashok.

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