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[PATCH v2 3/8] pinctrl: samsung: Add support for pad retention control for Exynos5433 SoCs

Started byMarek Szyprowski <m.szyprowski@samsung.com>
First post2017-01-26 09:40 +0100
Last post2017-01-26 21:00 +0100
Articles 5 — 2 participants

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  [PATCH v2 3/8] pinctrl: samsung: Add support for pad retention control  for Exynos5433 SoCs Marek Szyprowski <m.szyprowski@samsung.com> - 2017-01-26 09:40 +0100
    Re: [PATCH v2 3/8] pinctrl: samsung: Add support for pad retention  control for Exynos5433 SoCs Krzysztof Kozlowski <krzk@kernel.org> - 2017-01-26 20:50 +0100
      Re: [PATCH v2 3/8] pinctrl: samsung: Add support for pad retention  control for Exynos5433 SoCs Krzysztof Kozlowski <krzk@kernel.org> - 2017-01-27 19:10 +0100
        Re: [PATCH v2 3/8] pinctrl: samsung: Add support for pad retention  control for Exynos5433 SoCs Marek Szyprowski <m.szyprowski@samsung.com> - 2017-01-30 11:50 +0100
    Re: [PATCH v2 3/8] pinctrl: samsung: Add support for pad retention  control for Exynos5433 SoCs Krzysztof Kozlowski <krzk@kernel.org> - 2017-01-26 21:00 +0100

#1567173 — [PATCH v2 3/8] pinctrl: samsung: Add support for pad retention control for Exynos5433 SoCs

FromMarek Szyprowski <m.szyprowski@samsung.com>
Date2017-01-26 09:40 +0100
Subject[PATCH v2 3/8] pinctrl: samsung: Add support for pad retention control for Exynos5433 SoCs
Message-ID<t3NL4-53P-15@gated-at.bofh.it>
This patch adds support for retention control for Exynos5433 SoCs. Three
groups of pins has been defined for retention control: common shared group
for ALIVE, CPIF, eSE, FINGER, IMEM, NFC, PERIC, TOUCH pin banks and
separate control for FSYS and AUD pin banks, for which PMU retention
registers match whole banks.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
 drivers/pinctrl/samsung/pinctrl-exynos.c    | 58 +++++++++++++++++++++++++++++
 include/linux/soc/samsung/exynos-regs-pmu.h | 16 ++++++++
 2 files changed, 74 insertions(+)

diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index fa3802970570..7b0e6cc35e04 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -1551,6 +1551,54 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 	EXYNOS5433_PIN_BANK_EINTG(3, 0x000, "gpj1", 0x00),
 };
 
+/* PMU pin retention groups registers for Exynos5433 (without audio & fsys) */
+static const u32 exynos5433_retention_regs[] = {
+	EXYNOS5433_PAD_RETENTION_TOP_OPTION,
+	EXYNOS5433_PAD_RETENTION_UART_OPTION,
+	EXYNOS5433_PAD_RETENTION_EBIA_OPTION,
+	EXYNOS5433_PAD_RETENTION_EBIB_OPTION,
+	EXYNOS5433_PAD_RETENTION_SPI_OPTION,
+	EXYNOS5433_PAD_RETENTION_MIF_OPTION,
+	EXYNOS5433_PAD_RETENTION_USBXTI_OPTION,
+	EXYNOS5433_PAD_RETENTION_BOOTLDO_OPTION,
+	EXYNOS5433_PAD_RETENTION_UFS_OPTION,
+	EXYNOS5433_PAD_RETENTION_FSYSGENIO_OPTION,
+};
+
+static const struct samsung_retention_data exynos5433_retention_data __initconst = {
+	.regs	 = exynos5433_retention_regs,
+	.nr_regs = ARRAY_SIZE(exynos5433_retention_regs),
+	.value	 = EXYNOS_WAKEUP_FROM_LOWPWR,
+	.refcnt	 = &exynos_shared_retention_refcnt,
+	.init	 = exynos_retention_init,
+};
+
+/* PMU retention control for audio pins can be tied to audio pin bank */
+static const u32 exynos5433_audio_retention_regs[] = {
+	EXYNOS5433_PAD_RETENTION_AUD_OPTION,
+};
+
+static const struct samsung_retention_data exynos5433_audio_retention_data __initconst = {
+	.regs	 = exynos5433_audio_retention_regs,
+	.nr_regs = ARRAY_SIZE(exynos5433_audio_retention_regs),
+	.value	 = EXYNOS_WAKEUP_FROM_LOWPWR,
+	.init	 = exynos_retention_init,
+};
+
+/* PMU retention control for mmc pins can be tied to fsys pin bank */
+static const u32 exynos5433_fsys_retention_regs[] = {
+	EXYNOS5433_PAD_RETENTION_MMC0_OPTION,
+	EXYNOS5433_PAD_RETENTION_MMC1_OPTION,
+	EXYNOS5433_PAD_RETENTION_MMC2_OPTION,
+};
+
+static const struct samsung_retention_data exynos5433_fsys_retention_data __initconst = {
+	.regs	 = exynos5433_fsys_retention_regs,
+	.nr_regs = ARRAY_SIZE(exynos5433_fsys_retention_regs),
+	.value	 = EXYNOS_WAKEUP_FROM_LOWPWR,
+	.init	 = exynos_retention_init,
+};
+
 /*
  * Samsung pinctrl driver data for Exynos5433 SoC. Exynos5433 SoC includes
  * ten gpio/pin-mux/pinconfig controllers.
@@ -1564,6 +1612,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
 		.nr_ext_resources = 1,
+		.retention_data	= &exynos5433_retention_data,
 	}, {
 		/* pin-controller instance 1 data */
 		.pin_banks	= exynos5433_pin_banks1,
@@ -1571,6 +1620,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.eint_gpio_init = exynos_eint_gpio_init,
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
+		.retention_data	= &exynos5433_audio_retention_data,
 	}, {
 		/* pin-controller instance 2 data */
 		.pin_banks	= exynos5433_pin_banks2,
@@ -1578,6 +1628,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.eint_gpio_init = exynos_eint_gpio_init,
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
+		.retention_data	= &exynos5433_retention_data,
 	}, {
 		/* pin-controller instance 3 data */
 		.pin_banks	= exynos5433_pin_banks3,
@@ -1585,6 +1636,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.eint_gpio_init = exynos_eint_gpio_init,
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
+		.retention_data	= &exynos5433_retention_data,
 	}, {
 		/* pin-controller instance 4 data */
 		.pin_banks	= exynos5433_pin_banks4,
@@ -1592,6 +1644,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.eint_gpio_init = exynos_eint_gpio_init,
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
+		.retention_data	= &exynos5433_retention_data,
 	}, {
 		/* pin-controller instance 5 data */
 		.pin_banks	= exynos5433_pin_banks5,
@@ -1599,6 +1652,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.eint_gpio_init = exynos_eint_gpio_init,
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
+		.retention_data	= &exynos5433_fsys_retention_data,
 	}, {
 		/* pin-controller instance 6 data */
 		.pin_banks	= exynos5433_pin_banks6,
@@ -1606,6 +1660,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.eint_gpio_init = exynos_eint_gpio_init,
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
+		.retention_data	= &exynos5433_retention_data,
 	}, {
 		/* pin-controller instance 7 data */
 		.pin_banks	= exynos5433_pin_banks7,
@@ -1613,6 +1668,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.eint_gpio_init = exynos_eint_gpio_init,
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
+		.retention_data	= &exynos5433_retention_data,
 	}, {
 		/* pin-controller instance 8 data */
 		.pin_banks	= exynos5433_pin_banks8,
@@ -1620,6 +1676,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.eint_gpio_init = exynos_eint_gpio_init,
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
+		.retention_data	= &exynos5433_retention_data,
 	}, {
 		/* pin-controller instance 9 data */
 		.pin_banks	= exynos5433_pin_banks9,
@@ -1627,6 +1684,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.eint_gpio_init = exynos_eint_gpio_init,
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
+		.retention_data	= &exynos5433_retention_data,
 	},
 };
 
diff --git a/include/linux/soc/samsung/exynos-regs-pmu.h b/include/linux/soc/samsung/exynos-regs-pmu.h
index d30186e2b609..86f24b633e11 100644
--- a/include/linux/soc/samsung/exynos-regs-pmu.h
+++ b/include/linux/soc/samsung/exynos-regs-pmu.h
@@ -690,4 +690,20 @@
 					 | EXYNOS5420_KFC_USE_STANDBY_WFI2  \
 					 | EXYNOS5420_KFC_USE_STANDBY_WFI3)
 
+/* For EXYNOS5433 */
+#define EXYNOS5433_PAD_RETENTION_AUD_OPTION			(0x3028)
+#define EXYNOS5433_PAD_RETENTION_MMC2_OPTION			(0x30C8)
+#define EXYNOS5433_PAD_RETENTION_TOP_OPTION			(0x3108)
+#define EXYNOS5433_PAD_RETENTION_UART_OPTION			(0x3128)
+#define EXYNOS5433_PAD_RETENTION_MMC0_OPTION			(0x3148)
+#define EXYNOS5433_PAD_RETENTION_MMC1_OPTION			(0x3168)
+#define EXYNOS5433_PAD_RETENTION_EBIA_OPTION			(0x3188)
+#define EXYNOS5433_PAD_RETENTION_EBIB_OPTION			(0x31A8)
+#define EXYNOS5433_PAD_RETENTION_SPI_OPTION			(0x31C8)
+#define EXYNOS5433_PAD_RETENTION_MIF_OPTION			(0x31E8)
+#define EXYNOS5433_PAD_RETENTION_USBXTI_OPTION			(0x3228)
+#define EXYNOS5433_PAD_RETENTION_BOOTLDO_OPTION			(0x3248)
+#define EXYNOS5433_PAD_RETENTION_UFS_OPTION			(0x3268)
+#define EXYNOS5433_PAD_RETENTION_FSYSGENIO_OPTION		(0x32A8)
+
 #endif /* __LINUX_SOC_EXYNOS_REGS_PMU_H */
-- 
1.9.1

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#1567664 — Re: [PATCH v2 3/8] pinctrl: samsung: Add support for pad retention control for Exynos5433 SoCs

FromKrzysztof Kozlowski <krzk@kernel.org>
Date2017-01-26 20:50 +0100
SubjectRe: [PATCH v2 3/8] pinctrl: samsung: Add support for pad retention control for Exynos5433 SoCs
Message-ID<t3Yds-2X9-9@gated-at.bofh.it>
In reply to#1567173
On Thu, Jan 26, 2017 at 09:33:49AM +0100, Marek Szyprowski wrote:
> This patch adds support for retention control for Exynos5433 SoCs. Three
> groups of pins has been defined for retention control: common shared group
> for ALIVE, CPIF, eSE, FINGER, IMEM, NFC, PERIC, TOUCH pin banks and
> separate control for FSYS and AUD pin banks, for which PMU retention
> registers match whole banks.
> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> ---
>  drivers/pinctrl/samsung/pinctrl-exynos.c    | 58 +++++++++++++++++++++++++++++
>  include/linux/soc/samsung/exynos-regs-pmu.h | 16 ++++++++
>  2 files changed, 74 insertions(+)
>  		.eint_gpio_init = exynos_eint_gpio_init,

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

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#1568580 — Re: [PATCH v2 3/8] pinctrl: samsung: Add support for pad retention control for Exynos5433 SoCs

FromKrzysztof Kozlowski <krzk@kernel.org>
Date2017-01-27 19:10 +0100
SubjectRe: [PATCH v2 3/8] pinctrl: samsung: Add support for pad retention control for Exynos5433 SoCs
Message-ID<t4j8e-7uS-31@gated-at.bofh.it>
In reply to#1567664
On Thu, Jan 26, 2017 at 09:48:11PM +0200, Krzysztof Kozlowski wrote:
> On Thu, Jan 26, 2017 at 09:33:49AM +0100, Marek Szyprowski wrote:
> > This patch adds support for retention control for Exynos5433 SoCs. Three
> > groups of pins has been defined for retention control: common shared group
> > for ALIVE, CPIF, eSE, FINGER, IMEM, NFC, PERIC, TOUCH pin banks and
> > separate control for FSYS and AUD pin banks, for which PMU retention
> > registers match whole banks.
> > 
> > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> > ---
> >  drivers/pinctrl/samsung/pinctrl-exynos.c    | 58 +++++++++++++++++++++++++++++
> >  include/linux/soc/samsung/exynos-regs-pmu.h | 16 ++++++++

I already have some non-conflicting changes to exynos-regs-pmu.h in my
branch. Now I want to add some more which will create conflicts.

How about splitting the header to separate patch, so I will take it to
my exynos-pmu branch?

Best regards,
Krzysztof

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#1569575 — Re: [PATCH v2 3/8] pinctrl: samsung: Add support for pad retention control for Exynos5433 SoCs

FromMarek Szyprowski <m.szyprowski@samsung.com>
Date2017-01-30 11:50 +0100
SubjectRe: [PATCH v2 3/8] pinctrl: samsung: Add support for pad retention control for Exynos5433 SoCs
Message-ID<t5hH4-2Un-5@gated-at.bofh.it>
In reply to#1568580
Hi Krzysztof,

On 2017-01-27 19:02, Krzysztof Kozlowski wrote:
> On Thu, Jan 26, 2017 at 09:48:11PM +0200, Krzysztof Kozlowski wrote:
>> On Thu, Jan 26, 2017 at 09:33:49AM +0100, Marek Szyprowski wrote:
>>> This patch adds support for retention control for Exynos5433 SoCs. Three
>>> groups of pins has been defined for retention control: common shared group
>>> for ALIVE, CPIF, eSE, FINGER, IMEM, NFC, PERIC, TOUCH pin banks and
>>> separate control for FSYS and AUD pin banks, for which PMU retention
>>> registers match whole banks.
>>>
>>> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
>>> ---
>>>   drivers/pinctrl/samsung/pinctrl-exynos.c    | 58 +++++++++++++++++++++++++++++
>>>   include/linux/soc/samsung/exynos-regs-pmu.h | 16 ++++++++
> I already have some non-conflicting changes to exynos-regs-pmu.h in my
> branch. Now I want to add some more which will create conflicts.
>
> How about splitting the header to separate patch, so I will take it to
> my exynos-pmu branch?

Okay, I will split this into 2 patches.

Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland

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#1567676 — Re: [PATCH v2 3/8] pinctrl: samsung: Add support for pad retention control for Exynos5433 SoCs

FromKrzysztof Kozlowski <krzk@kernel.org>
Date2017-01-26 21:00 +0100
SubjectRe: [PATCH v2 3/8] pinctrl: samsung: Add support for pad retention control for Exynos5433 SoCs
Message-ID<t3Yn8-30B-29@gated-at.bofh.it>
In reply to#1567173
On Thu, Jan 26, 2017 at 09:33:49AM +0100, Marek Szyprowski wrote:
> This patch adds support for retention control for Exynos5433 SoCs. Three
> groups of pins has been defined for retention control: common shared group
> for ALIVE, CPIF, eSE, FINGER, IMEM, NFC, PERIC, TOUCH pin banks and
> separate control for FSYS and AUD pin banks, for which PMU retention
> registers match whole banks.
> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> ---
>  drivers/pinctrl/samsung/pinctrl-exynos.c    | 58 +++++++++++++++++++++++++++++
>  include/linux/soc/samsung/exynos-regs-pmu.h | 16 ++++++++
>  2 files changed, 74 insertions(+)
> 

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

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