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[PATCH 1/2] ARM: dts: i.MX25: add AIPS control registers

Started byMartin Kaiser <martin@kaiser.cx>
First post2017-01-31 21:10 +0100
Last post2017-02-03 18:30 +0100
Articles 6 — 2 participants

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  [PATCH 1/2] ARM: dts: i.MX25: add AIPS control registers Martin Kaiser <martin@kaiser.cx> - 2017-01-31 21:10 +0100
    Re: [PATCH 1/2] ARM: dts: i.MX25: add AIPS control registers Sascha Hauer <s.hauer@pengutronix.de> - 2017-02-01 08:10 +0100
    [PATCH v2] ARM: dts: i.MX25: add AIPS control registers Martin Kaiser <martin@kaiser.cx> - 2017-02-01 23:20 +0100
      Re: [PATCH v2] ARM: dts: i.MX25: add AIPS control registers Sascha Hauer <s.hauer@pengutronix.de> - 2017-02-02 08:20 +0100
    [PATCH v3] ARM: dts: i.MX25: add AIPS control registers Martin Kaiser <martin@kaiser.cx> - 2017-02-03 14:10 +0100
      Re: [PATCH v3] ARM: dts: i.MX25: add AIPS control registers Sascha Hauer <s.hauer@pengutronix.de> - 2017-02-03 18:30 +0100

#1571049 — [PATCH 1/2] ARM: dts: i.MX25: add AIPS control registers

FromMartin Kaiser <martin@kaiser.cx>
Date2017-01-31 21:10 +0100
Subject[PATCH 1/2] ARM: dts: i.MX25: add AIPS control registers
Message-ID<t5MhQ-4zG-19@gated-at.bofh.it>
The i.MX25 contains two AHB to IP bridges (AIPS), each of which has a set of
control registers. Add the memory regions for the control registers to
the Device Tree.

All the registers from the i.MX53 AIPSTZ are present on the i.MX25 as
well. Indicate that we are compatible to fsl,imx53-aipstz. However,
don't use aipstz for our name, this seems to be specific to i.MX53.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
 arch/arm/boot/dts/imx25.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
index e0ba550..4c4768f 100644
--- a/arch/arm/boot/dts/imx25.dtsi
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -93,6 +93,11 @@
 			reg = <0x43f00000 0x100000>;
 			ranges;
 
+			aips1: bridge@43f00000 {
+				compatible = "fsl,imx25-aips", "fsl,imx53-aipstz";
+				reg = <0x43f00000 0x60>;
+			};
+
 			i2c1: i2c@43f80000 {
 				#address-cells = <1>;
 				#size-cells = <0>;
@@ -342,6 +347,11 @@
 			reg = <0x53f00000 0x100000>;
 			ranges;
 
+			aips2: bridge@53f00000 {
+				compatible = "fsl,imx25-aips", "fsl,imx53-aipstz";
+				reg = <0x53f00000 0x60>;
+			};
+
 			clks: ccm@53f80000 {
 				compatible = "fsl,imx25-ccm";
 				reg = <0x53f80000 0x4000>;
-- 
2.1.4

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#1571289

FromSascha Hauer <s.hauer@pengutronix.de>
Date2017-02-01 08:10 +0100
Message-ID<t5Xdg-2MX-7@gated-at.bofh.it>
In reply to#1571049
On Tue, Jan 31, 2017 at 08:20:01PM +0100, Martin Kaiser wrote:
> The i.MX25 contains two AHB to IP bridges (AIPS), each of which has a set of
> control registers. Add the memory regions for the control registers to
> the Device Tree.
> 
> All the registers from the i.MX53 AIPSTZ are present on the i.MX25 as
> well. Indicate that we are compatible to fsl,imx53-aipstz. However,
> don't use aipstz for our name, this seems to be specific to i.MX53.
> 
> Signed-off-by: Martin Kaiser <martin@kaiser.cx>
> ---
>  arch/arm/boot/dts/imx25.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
> index e0ba550..4c4768f 100644
> --- a/arch/arm/boot/dts/imx25.dtsi
> +++ b/arch/arm/boot/dts/imx25.dtsi
> @@ -93,6 +93,11 @@
>  			reg = <0x43f00000 0x100000>;
>  			ranges;
>  
> +			aips1: bridge@43f00000 {
> +				compatible = "fsl,imx25-aips", "fsl,imx53-aipstz";
> +				reg = <0x43f00000 0x60>;
> +			};

The additional compatible properties should indicate if there is an
older ip block this one is compatible to. Since i.MX53 is newer than
i.MX25 this goes into the wrong direction. If anything you could add the
"fsl,imx25-aips" compatible to the i.MX53 dtsi file, but I don't think
that's worth it.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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#1572011 — [PATCH v2] ARM: dts: i.MX25: add AIPS control registers

FromMartin Kaiser <martin@kaiser.cx>
Date2017-02-01 23:20 +0100
Subject[PATCH v2] ARM: dts: i.MX25: add AIPS control registers
Message-ID<t6bpU-3E0-5@gated-at.bofh.it>
In reply to#1571049
The i.MX25 contains two AHB to IP bridges (AIPS), each of which has a set of
control registers. Add the memory regions for the control registers to
the Device Tree.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
v2:
   removed the "fsl,imx53-aipstz" property as per Sascha's request

 arch/arm/boot/dts/imx25.dtsi |   10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
index e0ba550..1914858 100644
--- a/arch/arm/boot/dts/imx25.dtsi
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -93,6 +93,11 @@
 			reg = <0x43f00000 0x100000>;
 			ranges;
 
+			aips1: bridge@43f00000 {
+				compatible = "fsl,imx25-aips";
+				reg = <0x43f00000 0x60>;
+			};
+
 			i2c1: i2c@43f80000 {
 				#address-cells = <1>;
 				#size-cells = <0>;
@@ -342,6 +347,11 @@
 			reg = <0x53f00000 0x100000>;
 			ranges;
 
+			aips2: bridge@53f00000 {
+				compatible = "fsl,imx25-aips";
+				reg = <0x53f00000 0x60>;
+			};
+
 			clks: ccm@53f80000 {
 				compatible = "fsl,imx25-ccm";
 				reg = <0x53f80000 0x4000>;
-- 
1.7.10.4

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#1572164 — Re: [PATCH v2] ARM: dts: i.MX25: add AIPS control registers

FromSascha Hauer <s.hauer@pengutronix.de>
Date2017-02-02 08:20 +0100
SubjectRe: [PATCH v2] ARM: dts: i.MX25: add AIPS control registers
Message-ID<t6jQt-Iw-3@gated-at.bofh.it>
In reply to#1572011
Hi Martin,

On Wed, Feb 01, 2017 at 11:16:18PM +0100, Martin Kaiser wrote:
> The i.MX25 contains two AHB to IP bridges (AIPS), each of which has a set of
> control registers. Add the memory regions for the control registers to
> the Device Tree.
> 
> Signed-off-by: Martin Kaiser <martin@kaiser.cx>
> ---
> v2:
>    removed the "fsl,imx53-aipstz" property as per Sascha's request
> 
>  arch/arm/boot/dts/imx25.dtsi |   10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
> index e0ba550..1914858 100644
> --- a/arch/arm/boot/dts/imx25.dtsi
> +++ b/arch/arm/boot/dts/imx25.dtsi
> @@ -93,6 +93,11 @@
>  			reg = <0x43f00000 0x100000>;
>  			ranges;
>  
> +			aips1: bridge@43f00000 {
> +				compatible = "fsl,imx25-aips";
> +				reg = <0x43f00000 0x60>;
> +			};

One thing I haven't seen the first time: The size should be the size of
the while register space given to this device, not the position of the
last register, so 0x4000 instead of 0x60 here.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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#1573075 — [PATCH v3] ARM: dts: i.MX25: add AIPS control registers

FromMartin Kaiser <martin@kaiser.cx>
Date2017-02-03 14:10 +0100
Subject[PATCH v3] ARM: dts: i.MX25: add AIPS control registers
Message-ID<t6LMK-1Zp-17@gated-at.bofh.it>
In reply to#1571049
The i.MX25 contains two AHB to IP bridges (AIPS), each of which has a set of
control registers. Add the memory regions for the control registers to
the Device Tree.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
v3:
   fixed the size of the memory regions, both are 16KBytes long

v2:
   removed the "fsl,imx53-aipstz" property as per Sascha's request

 arch/arm/boot/dts/imx25.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
index e0ba550..5ae8a14 100644
--- a/arch/arm/boot/dts/imx25.dtsi
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -93,6 +93,11 @@
 			reg = <0x43f00000 0x100000>;
 			ranges;
 
+			aips1: bridge@43f00000 {
+				compatible = "fsl,imx25-aips";
+				reg = <0x43f00000 0x4000>;
+			};
+
 			i2c1: i2c@43f80000 {
 				#address-cells = <1>;
 				#size-cells = <0>;
@@ -342,6 +347,11 @@
 			reg = <0x53f00000 0x100000>;
 			ranges;
 
+			aips2: bridge@53f00000 {
+				compatible = "fsl,imx25-aips";
+				reg = <0x53f00000 0x4000>;
+			};
+
 			clks: ccm@53f80000 {
 				compatible = "fsl,imx25-ccm";
 				reg = <0x53f80000 0x4000>;
-- 
2.1.4

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#1573289 — Re: [PATCH v3] ARM: dts: i.MX25: add AIPS control registers

FromSascha Hauer <s.hauer@pengutronix.de>
Date2017-02-03 18:30 +0100
SubjectRe: [PATCH v3] ARM: dts: i.MX25: add AIPS control registers
Message-ID<t6PQm-4E2-23@gated-at.bofh.it>
In reply to#1573075
On Fri, Feb 03, 2017 at 01:59:52PM +0100, Martin Kaiser wrote:
> The i.MX25 contains two AHB to IP bridges (AIPS), each of which has a set of
> control registers. Add the memory regions for the control registers to
> the Device Tree.
> 
> Signed-off-by: Martin Kaiser <martin@kaiser.cx>

Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>

Sascha

> ---
> v3:
>    fixed the size of the memory regions, both are 16KBytes long
> 
> v2:
>    removed the "fsl,imx53-aipstz" property as per Sascha's request
> 
>  arch/arm/boot/dts/imx25.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
> index e0ba550..5ae8a14 100644
> --- a/arch/arm/boot/dts/imx25.dtsi
> +++ b/arch/arm/boot/dts/imx25.dtsi
> @@ -93,6 +93,11 @@
>  			reg = <0x43f00000 0x100000>;
>  			ranges;
>  
> +			aips1: bridge@43f00000 {
> +				compatible = "fsl,imx25-aips";
> +				reg = <0x43f00000 0x4000>;
> +			};
> +
>  			i2c1: i2c@43f80000 {
>  				#address-cells = <1>;
>  				#size-cells = <0>;
> @@ -342,6 +347,11 @@
>  			reg = <0x53f00000 0x100000>;
>  			ranges;
>  
> +			aips2: bridge@53f00000 {
> +				compatible = "fsl,imx25-aips";
> +				reg = <0x53f00000 0x4000>;
> +			};
> +
>  			clks: ccm@53f80000 {
>  				compatible = "fsl,imx25-ccm";
>  				reg = <0x53f80000 0x4000>;
> -- 
> 2.1.4
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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