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| Started by | Joshua Clayton <stillcompiling@gmail.com> |
|---|---|
| First post | 2017-01-24 23:30 +0100 |
| Last post | 2017-01-27 23:50 +0100 |
| Articles | 2 — 2 participants |
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[PATCH v9 1/3] doc: dt: add cyclone-ps-spi binding document Joshua Clayton <stillcompiling@gmail.com> - 2017-01-24 23:30 +0100
Re: [PATCH v9 1/3] doc: dt: add cyclone-ps-spi binding document Rob Herring <robh@kernel.org> - 2017-01-27 23:50 +0100
| From | Joshua Clayton <stillcompiling@gmail.com> |
|---|---|
| Date | 2017-01-24 23:30 +0100 |
| Subject | [PATCH v9 1/3] doc: dt: add cyclone-ps-spi binding document |
| Message-ID | <t3hLb-1N5-5@gated-at.bofh.it> |
Describe a cyclone-ps-spi devicetree entry, required features
Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
---
.../bindings/fpga/altera-passive-serial.txt | 29 ++++++++++++++++++++++
1 file changed, 29 insertions(+)
create mode 100644 Documentation/devicetree/bindings/fpga/altera-passive-serial.txt
diff --git a/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt b/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt
new file mode 100644
index 0000000..774e6a7
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt
@@ -0,0 +1,29 @@
+Altera Cyclone Passive Serial SPI FPGA Manager
+
+Altera Cyclone FPGAs support a method of loading the bitstream over what is
+referred to as "passive serial".
+The passive serial link is not technically spi, and might require extra
+circuits in order to play nicely with other spi slaves on the same bus.
+
+See https://www.altera.com/literature/hb/cyc/cyc_c51013.pdf
+
+Required properties:
+- compatible: should contain "altr,fpga-passive-serial"
+- reg: spi chip select of the FPGA
+- nconfig-gpios: config pin (referred to as nCONFIG in the cyclone manual)
+- nstat-gpios: status pin (referred to as nSTATUS in the cyclone manual)
+
+Optional properties:
+- confd-gpios: confd pin (referred to as CONF_DONE in the cyclone manual)
+
+
+
+Example:
+ fpga_spi: evi-fpga-spi@0 {
+ compatible = "altr,cyclone-ps-spi-fpga-mgr";
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ nconfig-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
+ nstat-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
+ confd-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
+ };
--
2.9.3
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| From | Rob Herring <robh@kernel.org> |
|---|---|
| Date | 2017-01-27 23:50 +0100 |
| Message-ID | <t4nvb-1BT-3@gated-at.bofh.it> |
| In reply to | #1566203 |
On Tue, Jan 24, 2017 at 02:19:32PM -0800, Joshua Clayton wrote: > Describe a cyclone-ps-spi devicetree entry, required features > > Signed-off-by: Joshua Clayton <stillcompiling@gmail.com> > --- > .../bindings/fpga/altera-passive-serial.txt | 29 ++++++++++++++++++++++ > 1 file changed, 29 insertions(+) > create mode 100644 Documentation/devicetree/bindings/fpga/altera-passive-serial.txt This is a minor change, you could have kept my ack. Acked-by: Rob Herring <robh@kernel.org>
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