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| Started by | Will Deacon <will.deacon@arm.com> |
|---|---|
| First post | 2017-01-27 19:20 +0100 |
| Last post | 2017-01-27 19:20 +0100 |
| Articles | 3 — 1 participant |
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[PATCH 00/10] Add support for the ARMv8.2 Statistical Profiling Extension Will Deacon <will.deacon@arm.com> - 2017-01-27 19:20 +0100
[PATCH 10/10] dt-bindings: Document devicetree binding for ARM SPE Will Deacon <will.deacon@arm.com> - 2017-01-27 19:20 +0100
[PATCH 08/10] perf/core: Add PERF_AUX_FLAG_COLLISION to report colliding samples Will Deacon <will.deacon@arm.com> - 2017-01-27 19:20 +0100
| From | Will Deacon <will.deacon@arm.com> |
|---|---|
| Date | 2017-01-27 19:20 +0100 |
| Subject | [PATCH 00/10] Add support for the ARMv8.2 Statistical Profiling Extension |
| Message-ID | <t4j8d-7uS-11@gated-at.bofh.it> |
Hi all,
This is the third posting of the patches previously posted here:
rfcv1: http://lists.infradead.org/pipermail/linux-arm-kernel/2017-January/476450.html
rfcv2: http://lists.infradead.org/pipermail/linux-arm-kernel/2017-January/479387.html
Changes since RFCv2 include:
* Change compatible string
* Renamed PMU
* Simplified EL2 init code
* Dropped the RFC tag
* Added acks
There's also now an official ARM blog giving a high-level overview of
what SPE is:
https://community.arm.com/processors/b/blog/posts/statistical-profiling-extension-for-armv8-a
All comments welcome,
Will
--->8
Will Deacon (10):
arm64: cpufeature: allow for version discrepancy in PMU
implementations
arm64: cpufeature: Don't enforce system-wide SPE capability
arm64: KVM: Save/restore the host SPE state when entering/leaving a VM
arm64: head.S: Enable EL1 (host) access to SPE when entered at EL2
genirq: export irq_get_percpu_devid_partition to modules
perf/core: Export AUX buffer helpers to modules
perf: Directly pass PERF_AUX_* flags to perf_aux_output_end
perf/core: Add PERF_AUX_FLAG_COLLISION to report colliding samples
drivers/perf: Add support for ARMv8.2 Statistical Profiling Extension
dt-bindings: Document devicetree binding for ARM SPE
Documentation/devicetree/bindings/arm/spe-pmu.txt | 20 +
arch/arm64/include/asm/kvm_arm.h | 3 +
arch/arm64/include/asm/kvm_host.h | 7 +-
arch/arm64/include/asm/sysreg.h | 1 +
arch/arm64/kernel/cpufeature.c | 9 +-
arch/arm64/kernel/head.S | 19 +-
arch/arm64/kvm/debug.c | 6 +
arch/arm64/kvm/hyp/debug-sr.c | 66 +-
arch/arm64/kvm/hyp/switch.c | 17 +-
arch/x86/events/intel/bts.c | 11 +-
arch/x86/events/intel/pt.c | 11 +-
drivers/hwtracing/coresight/coresight-etm-perf.c | 5 +-
drivers/perf/Kconfig | 8 +
drivers/perf/Makefile | 1 +
drivers/perf/arm_spe_pmu.c | 1245 +++++++++++++++++++++
include/linux/perf_event.h | 4 +-
include/uapi/linux/perf_event.h | 1 +
kernel/events/ring_buffer.c | 16 +-
kernel/irq/irqdesc.c | 1 +
19 files changed, 1421 insertions(+), 30 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/spe-pmu.txt
create mode 100644 drivers/perf/arm_spe_pmu.c
--
2.1.4
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| From | Will Deacon <will.deacon@arm.com> |
|---|---|
| Date | 2017-01-27 19:20 +0100 |
| Subject | [PATCH 10/10] dt-bindings: Document devicetree binding for ARM SPE |
| Message-ID | <t4jhU-7ym-27@gated-at.bofh.it> |
| In reply to | #1568590 |
This patch documents the devicetree binding in use for ARM SPE.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
---
Documentation/devicetree/bindings/arm/spe-pmu.txt | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/spe-pmu.txt
diff --git a/Documentation/devicetree/bindings/arm/spe-pmu.txt b/Documentation/devicetree/bindings/arm/spe-pmu.txt
new file mode 100644
index 000000000000..93372f2a7df9
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/spe-pmu.txt
@@ -0,0 +1,20 @@
+* ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU)
+
+ARMv8.2 introduces the optional Statistical Profiling Extension for collecting
+performance sample data using an in-memory trace buffer.
+
+** SPE Required properties:
+
+- compatible : should be one of:
+ "arm,statistical-profiling-extension-v1"
+
+- interrupts : Exactly 1 PPI must be listed. For heterogeneous systems where
+ SPE is only supported on a subset of the CPUs, please consult
+ the arm,gic-v3 binding for details on describing a PPI partition.
+
+** Example:
+
+spe-pmu {
+ compatible = "arm,statistical-profiling-extension-v1";
+ interrupts = <GIC_PPI 05 IRQ_TYPE_LEVEL_HIGH &part1>;
+};
--
2.1.4
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| From | Will Deacon <will.deacon@arm.com> |
|---|---|
| Date | 2017-01-27 19:20 +0100 |
| Subject | [PATCH 08/10] perf/core: Add PERF_AUX_FLAG_COLLISION to report colliding samples |
| Message-ID | <t4jhV-7ym-47@gated-at.bofh.it> |
| In reply to | #1568590 |
The ARM SPE architecture permits an implementation to ignore a sample
if the sample is due to be taken whilst another sample is already being
produced. In this case, it is desirable to report the collision to
userspace, as they may want to lower the sample period.
This patch adds a PERF_AUX_FLAG_COLLISION flag, so that such events can
be relayed to userspace.
Signed-off-by: Will Deacon <will.deacon@arm.com>
---
include/uapi/linux/perf_event.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
index c66a485a24ac..68a4e542968e 100644
--- a/include/uapi/linux/perf_event.h
+++ b/include/uapi/linux/perf_event.h
@@ -885,6 +885,7 @@ enum perf_callchain_context {
*/
#define PERF_AUX_FLAG_TRUNCATED 0x01 /* record was truncated to fit */
#define PERF_AUX_FLAG_OVERWRITE 0x02 /* snapshot from overwrite mode */
+#define PERF_AUX_FLAG_COLLISION 0x03 /* sample collided with another */
#define PERF_FLAG_FD_NO_GROUP (1UL << 0)
#define PERF_FLAG_FD_OUTPUT (1UL << 1)
--
2.1.4
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