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RE: [patch 0/2] tsc/adjust: Cure suspend/resume issues and prevent TSC deadline timer irq storm

Started by"Stanton, Kevin B" <kevin.b.stanton@intel.com>
First post2017-01-27 00:50 +0100
Last post2017-01-27 00:50 +0100
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  RE: [patch 0/2] tsc/adjust: Cure suspend/resume issues and prevent  TSC deadline timer irq storm "Stanton, Kevin B" <kevin.b.stanton@intel.com> - 2017-01-27 00:50 +0100

#1567821 — RE: [patch 0/2] tsc/adjust: Cure suspend/resume issues and prevent TSC deadline timer irq storm

From"Stanton, Kevin B" <kevin.b.stanton@intel.com>
Date2017-01-27 00:50 +0100
SubjectRE: [patch 0/2] tsc/adjust: Cure suspend/resume issues and prevent TSC deadline timer irq storm
Message-ID<t41XI-5g5-25@gated-at.bofh.it>
On Thurs, 15 Dec 2016, Thomas Gleixner wrote:
>See the SDM. It suggests that the deadline is compared to the TSC value.
>I don't care how it is implemented, but I very much care about it being
>documented in the way it is implemented, which is obviously not the case.

The TSC_DEADLINE behavior definitely diverges from the SDM and we've root caused the issue and are finalizing a fix that addresses the problem. Glad that a software workaround was also possible.  We also plan to expand our documentation on what good behavior of a BIOS is as it relates to adjusting TSC at boot (in almost every circumstance you shouldn't do it).  The official errata will be forthcoming. Thank you for helping to identify this.

Kevin

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