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[PATCH v8 0/3] Altera Cyclone Passive Serial SPI FPGA Manager

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  [PATCH v8 0/3] Altera Cyclone Passive Serial SPI FPGA Manager Joshua Clayton <stillcompiling@gmail.com> - 2017-01-24 00:00 +0100
    [PATCH v8 1/3] doc: dt: add cyclone-ps-spi binding document Joshua Clayton <stillcompiling@gmail.com> - 2017-01-24 00:00 +0100
    [PATCH v8 3/3] ARM: dts: imx6q-evi: support cyclone-ps-spi Joshua Clayton <stillcompiling@gmail.com> - 2017-01-24 00:00 +0100
      Re: [PATCH v8 3/3] ARM: dts: imx6q-evi: support cyclone-ps-spi Fabio Estevam <festevam@gmail.com> - 2017-01-24 01:10 +0100
        Re: [PATCH v8 3/3] ARM: dts: imx6q-evi: support cyclone-ps-spi Joshua Clayton <stillcompiling@gmail.com> - 2017-01-24 01:40 +0100

#1565349 — [PATCH v8 0/3] Altera Cyclone Passive Serial SPI FPGA Manager

This series adds an FPGA manager for Altera cyclone FPGAs
that can program them using an spi port and a couple of gpios, using
Alteras passive serial protocol.

Changes from v7:
Add Rob Herrings Ack on the bindings change (Thanks!)
Change const u8* to const char * to make sparse happy

Changes from v6:
- moved bitrev8x4() out (I'll submit it in a separate patch set)
- Changed the dts format to match what is already done in barebox
  (see https://git.pengutronix.de/cgit/barebox/tree/Documentation/devicetree/bindings/firmware/altr,passive-serial.txt)
- Changed error message from "Status pin should be low" to "Status
  pin failed to show a reset" for better clarity
- Fixed any whitespace problems that had crept in.

Changes from v5:
- Rebased on next-20161214xi
- Corrected for FPGA Mgr API change in  write_init() and write_complete()
- Better describe the device cyclone-ps-spi runs on in the file header.
- Split the bitrev8x4 patch into generic and arch specific patches...
- Added AARCH64 and MIPS implementations of bitrev8x4()... they all have to 
  have an implementation for it to compile cleanly across platforms
- Added the changes to imx6q-evi.dts to the patch set.

Changes from v4:
- Added the needed return statement to __arch_bitrev8x4()
- Added Rob Herrings ACK for and fix a typo in the commit log of patch 2

Changes from v3:
- Fixed up the state() function to return the state of the status pin
  reqested by Alan Tull
- Switched the pin to ACTIVE_LOW and coresponding logic level, and updated
  the corresponding documentation. Thanks Rob Herring for pointing out my
  mistake.
- Per Rob Herring, switched from "gpio" to "gpios" in dts

Changes from v2:
- Merged patch 3 and 4 as suggested in review by Moritz Fischer
- Changed FPGA_MIN_DELAY from 250 to 50 ms is the time advertized by
  Altera. This now works, as we don't assume it is done

Changes from v1:
- Changed the name from cyclone-spi-fpga-mgr to cyclone-ps-spi-fpga-mgr
  This name change was requested by Alan Tull, to be specific about which
  programming method is being employed on the fpga.
- Changed the name of the reset-gpio to config-gpio to closer match the
  way the pins are described in the Altera manual
- Moved MODULE_LICENCE, _AUTHOR, and _DESCRIPTION to the bottom

- Added a bitrev8x4() function to the bitrev headers and implemented ARM
 const, runtime, and ARM specific faster versions (This may end up
 needing to be a standalone patch)

- Moved the bitswapping into cyclonespi_write(), as requested.
  This falls short of my desired generic lsb first spi support, but is a step
  in that direction.

- Fixed whitespace problems introduced during refactoring

- Replaced magic number for initial delay with a descriptive macro
- Poll the fpga to see when it is ready rather than a fixed 1 ms sleep

Joshua Clayton (3):
  doc: dt: add cyclone-ps-spi binding document
  fpga manager: Add cyclone-ps-spi driver for Altera FPGAs
  ARM: dts: imx6q-evi: support cyclone-ps-spi

 .../bindings/fpga/altera-passive-serial.txt        |  25 +++
 arch/arm/boot/dts/imx6q-evi.dts                    |  16 ++
 drivers/fpga/Kconfig                               |   7 +
 drivers/fpga/Makefile                              |   1 +
 drivers/fpga/cyclone-ps-spi.c                      | 185 +++++++++++++++++++++
 5 files changed, 234 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/fpga/altera-passive-serial.txt
 create mode 100644 drivers/fpga/cyclone-ps-spi.c

-- 
2.9.3

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#1565353 — [PATCH v8 1/3] doc: dt: add cyclone-ps-spi binding document

Describe a cyclone-ps-spi devicetree entry, required features

Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
---
 .../bindings/fpga/altera-passive-serial.txt        | 25 ++++++++++++++++++++++
 1 file changed, 25 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/fpga/altera-passive-serial.txt

diff --git a/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt b/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt
new file mode 100644
index 0000000..b5f0bb5
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt
@@ -0,0 +1,25 @@
+Altera Cyclone Passive Serial SPI FPGA Manager
+
+Altera Cyclone FPGAs support a method of loading the bitstream over what is
+referred to as "passive serial".
+The passive serial link is not technically spi, and might require extra
+circuits in order to play nicely with other spi slaves on the same bus.
+
+See https://www.altera.com/literature/hb/cyc/cyc_c51013.pdf
+
+Required properties:
+- compatible: should contain "altr,fpga-passive-serial"
+- reg: spi chip select of the FPGA
+- nstat-gpios: status pin (referred to as nSTATUS in the cyclone manual)
+- nconfig-gpios: config pin (referred to as nCONFIG in the cyclone manual)
+- confd-gpios: confd pin (referred to as CONF_DONE in the cyclone manual)
+
+Example:
+	fpga_spi: evi-fpga-spi@0 {
+		compatible = "altr,cyclone-ps-spi-fpga-mgr";
+		spi-max-frequency = <20000000>;
+		reg = <0>;
+		nconfig-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
+		nstat-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
+		confd-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
+	};
-- 
2.9.3

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#1565354 — [PATCH v8 3/3] ARM: dts: imx6q-evi: support cyclone-ps-spi

Add support for Altera cyclone V FPGA connected to an spi port
to the evi devicetree file

Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
---
 arch/arm/boot/dts/imx6q-evi.dts | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/imx6q-evi.dts b/arch/arm/boot/dts/imx6q-evi.dts
index 24fe093..a0cbb2d 100644
--- a/arch/arm/boot/dts/imx6q-evi.dts
+++ b/arch/arm/boot/dts/imx6q-evi.dts
@@ -82,6 +82,15 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1cs>;
 	status = "okay";
+
+	fpga_spi: cyclonespi@0 {
+		compatible = "altr,fpga-passive-serial";
+		spi-max-frequency = <20000000>;
+		reg = <0>;
+		pinctrl-0 = <&pinctrl_fpgaspi>;
+		nconfig-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
+		nstat-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
+	};
 };
 
 &ecspi3 {
@@ -313,6 +322,13 @@
 		>;
 	};
 
+	pinctrl_fpgaspi: fpgaspigrp {
+		fsl,pins = <
+			MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
+			MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
+		>;
+	};
+
 	pinctrl_gpminand: gpminandgrp {
 		fsl,pins = <
 			MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
-- 
2.9.3

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#1565381 — Re: [PATCH v8 3/3] ARM: dts: imx6q-evi: support cyclone-ps-spi

On Mon, Jan 23, 2017 at 8:51 PM, Joshua Clayton
<stillcompiling@gmail.com> wrote:
> Add support for Altera cyclone V FPGA connected to an spi port
> to the evi devicetree file
>
> Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
> ---
>  arch/arm/boot/dts/imx6q-evi.dts | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6q-evi.dts b/arch/arm/boot/dts/imx6q-evi.dts
> index 24fe093..a0cbb2d 100644
> --- a/arch/arm/boot/dts/imx6q-evi.dts
> +++ b/arch/arm/boot/dts/imx6q-evi.dts
> @@ -82,6 +82,15 @@
>         pinctrl-names = "default";
>         pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1cs>;
>         status = "okay";
> +
> +       fpga_spi: cyclonespi@0 {
> +               compatible = "altr,fpga-passive-serial";
> +               spi-max-frequency = <20000000>;
> +               reg = <0>;
> +               pinctrl-0 = <&pinctrl_fpgaspi>;
> +               nconfig-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
> +               nstat-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;

Your binding doc says that 'confd-gpios ' is a required property, but
you did not put it here.

Either it is missing here or you should mention that it is optional in
the binding doc.

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#1565388 — Re: [PATCH v8 3/3] ARM: dts: imx6q-evi: support cyclone-ps-spi

On 01/23/2017 04:00 PM, Fabio Estevam wrote:
> On Mon, Jan 23, 2017 at 8:51 PM, Joshua Clayton
> <stillcompiling@gmail.com> wrote:
>> Add support for Altera cyclone V FPGA connected to an spi port
>> to the evi devicetree file
>>
>> Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
>> ---
>>  arch/arm/boot/dts/imx6q-evi.dts | 16 ++++++++++++++++
>>  1 file changed, 16 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/imx6q-evi.dts b/arch/arm/boot/dts/imx6q-evi.dts
>> index 24fe093..a0cbb2d 100644
>> --- a/arch/arm/boot/dts/imx6q-evi.dts
>> +++ b/arch/arm/boot/dts/imx6q-evi.dts
>> @@ -82,6 +82,15 @@
>>         pinctrl-names = "default";
>>         pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1cs>;
>>         status = "okay";
>> +
>> +       fpga_spi: cyclonespi@0 {
>> +               compatible = "altr,fpga-passive-serial";
>> +               spi-max-frequency = <20000000>;
>> +               reg = <0>;
>> +               pinctrl-0 = <&pinctrl_fpgaspi>;
>> +               nconfig-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
>> +               nstat-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
> Your binding doc says that 'confd-gpios ' is a required property, but
> you did not put it here.
>
> Either it is missing here or you should mention that it is optional in
> the binding doc.
You're right, Fabio.
The barebox driver from which I stole the binding had a confd and no nstat.
I've got an nstat and no confd.
One or the other is needed to know whether the bitstream was loaded.

I can add support for using the confd, but with no way to test it, I forebear.

I guess they should both be optional and a note placed that this driver
currently uses only the nstat.

Will change the doc to reflect that.

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