Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1563573 > unrolled thread
| Started by | Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com> |
|---|---|
| First post | 2017-01-20 14:30 +0100 |
| Last post | 2017-01-20 14:30 +0100 |
| Articles | 2 — 1 participant |
Back to article view | Back to linux.kernel
[PATCH v12 0/5] Enabling Ring 3 MONITOR/MWAIT feature for Knights Landing Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com> - 2017-01-20 14:30 +0100
[PATCH v12 5/5] x86/cpufeature: enable RING3MWAIT for Knights Mill Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com> - 2017-01-20 14:30 +0100
| From | Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com> |
|---|---|
| Date | 2017-01-20 14:30 +0100 |
| Subject | [PATCH v12 0/5] Enabling Ring 3 MONITOR/MWAIT feature for Knights Landing |
| Message-ID | <t1Hqp-7M4-7@gated-at.bofh.it> |
Following patches enable the use of the feature that allows the Intel Xeon Phi x200 devices to use MONITOR/MWAIT instructions outside ring 0. This feature allows userspace application to use more efficient synchronization operations, which improves performance and energy efficiency. v12: Removed unused define from msr-info.h Added braces in define ELF_HWCAP Set HWCAP2_RING3MWAIT bit only for boot cpu Replaced set_bit by bit OR operator Updated ring3mwait_disable return value Rebased to kernel 4.10rc4 Updated commit messages v11: Removed warning from 32-bit build Removed "This patch" from commit messages v10: Included Piotr's patch for Knights Mill Included Dave's comments from internal review Rewritten commit messages Remove x86_64 requirement Fixed kernel boot parameter description Used set_bit to update HWCAP2 bit Rebased to kernel 4.9 v9: Removed PHI from defines v8: Fixed commit messages Removed logging Used msr_set/clear_bit functions instesd of wrmsrl Fixed documentation Renamed HWCAP2_PHIR3MWAIT to HWCAP2_RING3MWAIT v7: Change order of the patches, with this code looks cleaner. Changed the name of MSR to MSR_MISC_FEATURE_ENABLES. Used Word 3 25th bit to expose feature. v6: v5: When phir3mwait=disable is cmdline switch off r3 mwait feature Fix typos v4: Wrapped the enabling code by CONFIG_X86_64 Add documentation for phir3mwait=disable cmdline switch Move probe_ function call from early_intel_init to intel_init Fixed commit messages v3: Included Daves and Thomas comments v2: Check MSR before wrmsrl Shortened names Used Word 3 for feature init_scattered_cpuid_features() Fixed commit messages Grzegorz Andrejczuk (4): x86/msr: add MSR_MISC_FEATURE_ENABLES and RING3MWAIT bit x86/elf: add HWCAP2 to expose ring 3 MONITOR/MWAIT x86/cpufeature: add RING3MWAIT to CPU features x86/cpufeature: enable RING3MWAIT for Knights Landing Piotr Luc (1): x86/cpufeature: enable RING3MWAIT for Knights Mill Documentation/admin-guide/kernel-parameters.txt | 4 +++ arch/x86/include/asm/cpufeatures.h | 2 +- arch/x86/include/asm/elf.h | 9 ++++++ arch/x86/include/asm/msr-index.h | 5 ++++ arch/x86/include/uapi/asm/hwcap2.h | 7 +++++ arch/x86/kernel/cpu/common.c | 3 ++ arch/x86/kernel/cpu/intel.c | 39 +++++++++++++++++++++++++ 7 files changed, 68 insertions(+), 1 deletion(-) create mode 100644 arch/x86/include/uapi/asm/hwcap2.h -- 2.5.1
[toc] | [next] | [standalone]
| From | Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com> |
|---|---|
| Date | 2017-01-20 14:30 +0100 |
| Subject | [PATCH v12 5/5] x86/cpufeature: enable RING3MWAIT for Knights Mill |
| Message-ID | <t1Hqq-7M4-33@gated-at.bofh.it> |
| In reply to | #1563573 |
From: Piotr Luc <piotr.luc@intel.com>
Enable ring 3 MONITOR/MWAIT for Intel Xeon Phi
codenamed Knights Mill. We can't guarantee that this (KNM)
will be the last CPU model that needs this hack.
But, we do recognize that this is far from optimal,
and there is an effort to ensure we don't keep doing
extending this hack forever.
Signed-off-by: Piotr Luc <piotr.luc@intel.com>
---
arch/x86/kernel/cpu/intel.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 213cbf0..b1b1af5 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -79,7 +79,9 @@ static void probe_xeon_phi_r3mwait(struct cpuinfo_x86 *c)
* Ring 3 MONITOR/MWAIT feature cannot be detected without
* cpu model and family comparison.
*/
- if (c->x86 != 6 || c->x86_model != INTEL_FAM6_XEON_PHI_KNL)
+ if (c->x86 != 6 ||
+ (c->x86_model != INTEL_FAM6_XEON_PHI_KNL &&
+ c->x86_model != INTEL_FAM6_XEON_PHI_KNM))
return;
if (ring3mwait_disabled) {
--
2.5.1
[toc] | [prev] | [standalone]
Back to top | Article view | linux.kernel
csiph-web