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| Started by | Andrzej Hajda <a.hajda@samsung.com> |
|---|---|
| First post | 2017-01-17 15:20 +0100 |
| Last post | 2017-01-20 09:00 +0100 |
| Articles | 2 — 2 participants |
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[PATCH 1/3] drm/exynos/decon5433: do not disable video after reset Andrzej Hajda <a.hajda@samsung.com> - 2017-01-17 15:20 +0100
Re: [PATCH 1/3] drm/exynos/decon5433: do not disable video after reset Inki Dae <inki.dae@samsung.com> - 2017-01-20 09:00 +0100
| From | Andrzej Hajda <a.hajda@samsung.com> |
|---|---|
| Date | 2017-01-17 15:20 +0100 |
| Subject | [PATCH 1/3] drm/exynos/decon5433: do not disable video after reset |
| Message-ID | <t0CMa-88g-27@gated-at.bofh.it> |
decon_commit is called just after reset so video is disabled anyway. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> --- drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c index 634cfd7..6fd2b11 100644 --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c @@ -158,8 +158,6 @@ static void decon_commit(struct exynos_drm_crtc *crtc) m->crtc_vsync_end = m->crtc_vsync_start + 1; } - decon_set_bits(ctx, DECON_VIDCON0, VIDCON0_ENVID, 0); - /* enable clock gate */ val = CMU_CLKGAGE_MODE_SFR_F | CMU_CLKGAGE_MODE_MEM_F; writel(val, ctx->addr + DECON_CMU); -- 2.7.4
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| From | Inki Dae <inki.dae@samsung.com> |
|---|---|
| Date | 2017-01-20 09:00 +0100 |
| Message-ID | <t1Ch4-4tl-9@gated-at.bofh.it> |
| In reply to | #1560629 |
Applied including other two patches. Thanks. 2017년 01월 17일 23:15에 Andrzej Hajda 이(가) 쓴 글: > decon_commit is called just after reset so video is disabled anyway. > > Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> > --- > drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c > index 634cfd7..6fd2b11 100644 > --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c > +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c > @@ -158,8 +158,6 @@ static void decon_commit(struct exynos_drm_crtc *crtc) > m->crtc_vsync_end = m->crtc_vsync_start + 1; > } > > - decon_set_bits(ctx, DECON_VIDCON0, VIDCON0_ENVID, 0); > - > /* enable clock gate */ > val = CMU_CLKGAGE_MODE_SFR_F | CMU_CLKGAGE_MODE_MEM_F; > writel(val, ctx->addr + DECON_CMU); >
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