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| Started by | David Engraf <david.engraf@sysgo.com> |
|---|---|
| First post | 2017-01-11 15:00 +0100 |
| Last post | 2017-01-24 14:40 +0100 |
| Articles | 7 — 5 participants |
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[PATCH] tcb_clksrc: Use 32 bit tcb as sched_clock David Engraf <david.engraf@sysgo.com> - 2017-01-11 15:00 +0100
Re: [PATCH] tcb_clksrc: Use 32 bit tcb as sched_clock David Engraf <david.engraf@sysgo.com> - 2017-01-17 10:40 +0100
Re: [PATCH] tcb_clksrc: Use 32 bit tcb as sched_clock Mason <slash.tmp@free.fr> - 2017-01-17 10:50 +0100
Re: [PATCH] tcb_clksrc: Use 32 bit tcb as sched_clock Romain Izard <romain.izard.pro@gmail.com> - 2017-01-17 15:50 +0100
Re: [PATCH] tcb_clksrc: Use 32 bit tcb as sched_clock Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-01-23 15:00 +0100
Re: [PATCH] tcb_clksrc: Use 32 bit tcb as sched_clock Nicolas Ferre <nicolas.ferre@atmel.com> - 2017-01-24 14:40 +0100
Re: [PATCH] tcb_clksrc: Use 32 bit tcb as sched_clock Nicolas Ferre <nicolas.ferre@atmel.com> - 2017-01-24 14:40 +0100
| From | David Engraf <david.engraf@sysgo.com> |
|---|---|
| Date | 2017-01-11 15:00 +0100 |
| Subject | [PATCH] tcb_clksrc: Use 32 bit tcb as sched_clock |
| Message-ID | <sYrBv-7Bc-21@gated-at.bofh.it> |
On newer boards the TC can be read as single 32 bit value without locking.
Thus the clock can be used as reference for sched_clock which is much more
accurate than the jiffies implementation.
Tested on a Atmel SAMA5D2 board.
Signed-off-by: David Engraf <david.engraf@sysgo.com>
---
drivers/clocksource/tcb_clksrc.c | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c
index d4ca996..745844e 100644
--- a/drivers/clocksource/tcb_clksrc.c
+++ b/drivers/clocksource/tcb_clksrc.c
@@ -10,6 +10,7 @@
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/atmel_tc.h>
+#include <linux/sched_clock.h>
/*
@@ -56,11 +57,16 @@ static u64 tc_get_cycles(struct clocksource *cs)
return (upper << 16) | lower;
}
-static u64 tc_get_cycles32(struct clocksource *cs)
+static u32 tc_get_cv32(void)
{
return __raw_readl(tcaddr + ATMEL_TC_REG(0, CV));
}
+static u64 tc_get_cycles32(struct clocksource *cs)
+{
+ return tc_get_cv32();
+}
+
static struct clocksource clksrc = {
.name = "tcb_clksrc",
.rating = 200,
@@ -69,6 +75,11 @@ static struct clocksource clksrc = {
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
+static u64 notrace tc_read_sched_clock(void)
+{
+ return tc_get_cv32();
+}
+
#ifdef CONFIG_GENERIC_CLOCKEVENTS
struct tc_clkevt_device {
@@ -339,6 +350,9 @@ static int __init tcb_clksrc_init(void)
clksrc.read = tc_get_cycles32;
/* setup ony channel 0 */
tcb_setup_single_chan(tc, best_divisor_idx);
+
+ /* register sched_clock on chips with single 32 bit counter */
+ sched_clock_register(tc_read_sched_clock, 32, divided_rate);
} else {
/* tclib will give us three clocks no matter what the
* underlying platform supports.
--
2.9.3
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| From | David Engraf <david.engraf@sysgo.com> |
|---|---|
| Date | 2017-01-17 10:40 +0100 |
| Message-ID | <t0ypc-5hh-29@gated-at.bofh.it> |
| In reply to | #1556501 |
Am 17.01.2017 um 10:13 schrieb Daniel Lezcano:
> On 11/01/2017 14:50, David Engraf wrote:
>> On newer boards the TC can be read as single 32 bit value without locking.
>> Thus the clock can be used as reference for sched_clock which is much more
>> accurate than the jiffies implementation.
>>
>> Tested on a Atmel SAMA5D2 board.
>
> Is this change backward compatible ?
The way how the driver reads the clock hasn't been changed. I've only
introduced the call to sched_clock_register() which will use this clock
for the scheduler as long as no better clock is already used. So I don't
see a backward compatibility problem.
Best regards
- David
>
>> Signed-off-by: David Engraf <david.engraf@sysgo.com>
>> ---
>> drivers/clocksource/tcb_clksrc.c | 16 +++++++++++++++-
>> 1 file changed, 15 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c
>> index d4ca996..745844e 100644
>> --- a/drivers/clocksource/tcb_clksrc.c
>> +++ b/drivers/clocksource/tcb_clksrc.c
>> @@ -10,6 +10,7 @@
>> #include <linux/io.h>
>> #include <linux/platform_device.h>
>> #include <linux/atmel_tc.h>
>> +#include <linux/sched_clock.h>
>>
>>
>> /*
>> @@ -56,11 +57,16 @@ static u64 tc_get_cycles(struct clocksource *cs)
>> return (upper << 16) | lower;
>> }
>>
>> -static u64 tc_get_cycles32(struct clocksource *cs)
>> +static u32 tc_get_cv32(void)
>> {
>> return __raw_readl(tcaddr + ATMEL_TC_REG(0, CV));
>> }
>>
>> +static u64 tc_get_cycles32(struct clocksource *cs)
>> +{
>> + return tc_get_cv32();
>> +}
>> +
>> static struct clocksource clksrc = {
>> .name = "tcb_clksrc",
>> .rating = 200,
>> @@ -69,6 +75,11 @@ static struct clocksource clksrc = {
>> .flags = CLOCK_SOURCE_IS_CONTINUOUS,
>> };
>>
>> +static u64 notrace tc_read_sched_clock(void)
>> +{
>> + return tc_get_cv32();
>> +}
>> +
>> #ifdef CONFIG_GENERIC_CLOCKEVENTS
>>
>> struct tc_clkevt_device {
>> @@ -339,6 +350,9 @@ static int __init tcb_clksrc_init(void)
>> clksrc.read = tc_get_cycles32;
>> /* setup ony channel 0 */
>> tcb_setup_single_chan(tc, best_divisor_idx);
>> +
>> + /* register sched_clock on chips with single 32 bit counter */
>> + sched_clock_register(tc_read_sched_clock, 32, divided_rate);
>> } else {
>> /* tclib will give us three clocks no matter what the
>> * underlying platform supports.
>>
>
>
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| From | Mason <slash.tmp@free.fr> |
|---|---|
| Date | 2017-01-17 10:50 +0100 |
| Message-ID | <t0yyS-5mX-11@gated-at.bofh.it> |
| In reply to | #1556501 |
On 11/01/2017 14:50, David Engraf wrote: > Subject: [PATCH] tcb_clksrc: Use 32 bit tcb as sched_clock I was puzzled by the TCB acronym :-) Trusted Computing Base Task Control Block Transfer Control Block Test Control Board In fact, it (probably) stands for Timer Counter Block, which makes sense for a clksrc patch. Regards.
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| From | Romain Izard <romain.izard.pro@gmail.com> |
|---|---|
| Date | 2017-01-17 15:50 +0100 |
| Message-ID | <t0Dfb-8i5-3@gated-at.bofh.it> |
| In reply to | #1556501 |
On 2017-01-11, David Engraf <david.engraf@sysgo.com> wrote: > On newer boards the TC can be read as single 32 bit value without locking. > Thus the clock can be used as reference for sched_clock which is much more > accurate than the jiffies implementation. > > Tested on a Atmel SAMA5D2 board. > > Signed-off-by: David Engraf <david.engraf@sysgo.com> Unfortunately, this leads to the current boot warning: ------------[ cut here ]------------ WARNING: CPU: 0 PID: 1 at ../kernel/time/sched_clock.c:179 sched_clock_register+0x4c/0x21c Modules linked in: CPU: 0 PID: 1 Comm: swapper Not tainted 4.9.4-00041-ge780a8100f0d #1 Hardware name: Atmel SAMA5 [<c01103e4>] (unwind_backtrace) from [<c010d0e4>] (show_stack+0x20/0x24) [<c010d0e4>] (show_stack) from [<c039c130>] (dump_stack+0x24/0x28) [<c039c130>] (dump_stack) from [<c011f7b0>] (__warn+0xf4/0x10c) [<c011f7b0>] (__warn) from [<c011f898>] (warn_slowpath_null+0x30/0x38) [<c011f898>] (warn_slowpath_null) from [<c0c0d2c0>] (sched_clock_register+0x4c/0x21c) [<c0c0d2c0>] (sched_clock_register) from [<c0c345fc>] (tcb_clksrc_init+0x1c8/0x424) [<c0c345fc>] (tcb_clksrc_init) from [<c0101cdc>] (do_one_initcall+0x50/0x184) [<c0101cdc>] (do_one_initcall) from [<c0c00e70>] (kernel_init_freeable+0x13c/0x1e0) [<c0c00e70>] (kernel_init_freeable) from [<c08303ec>] (kernel_init+0x18/0x124) [<c08303ec>] (kernel_init) from [<c0108c34>] (ret_from_fork+0x14/0x20) ---[ end trace 3d13186881cd5c91 ]--- "sched_clock_register" expects to be called with interrupts disabled, but the tcb_clksrc initialization is called as an arch_initcall, which runs too late in the boot sequence. Best regards, -- Romain Izard
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| From | Daniel Lezcano <daniel.lezcano@linaro.org> |
|---|---|
| Date | 2017-01-23 15:00 +0100 |
| Message-ID | <t2Nk5-78N-1@gated-at.bofh.it> |
| In reply to | #1556501 |
On Wed, Jan 11, 2017 at 02:50:59PM +0100, David Engraf wrote: > On newer boards the TC can be read as single 32 bit value without locking. > Thus the clock can be used as reference for sched_clock which is much more > accurate than the jiffies implementation. > > Tested on a Atmel SAMA5D2 board. > > Signed-off-by: David Engraf <david.engraf@sysgo.com> > --- Nicolas, if you agree I will take this change. -- Daniel
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| From | Nicolas Ferre <nicolas.ferre@atmel.com> |
|---|---|
| Date | 2017-01-24 14:40 +0100 |
| Message-ID | <t39uh-4Sz-9@gated-at.bofh.it> |
| In reply to | #1564982 |
Le 23/01/2017 à 14:59, Daniel Lezcano a écrit : > On Wed, Jan 11, 2017 at 02:50:59PM +0100, David Engraf wrote: >> On newer boards the TC can be read as single 32 bit value without locking. >> Thus the clock can be used as reference for sched_clock which is much more >> accurate than the jiffies implementation. >> >> Tested on a Atmel SAMA5D2 board. >> >> Signed-off-by: David Engraf <david.engraf@sysgo.com> >> --- > > Nicolas, > > if you agree I will take this change. Absolutely. I've just added the Ack. Thanks for the head-up. Bye, -- Nicolas Ferre
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| From | Nicolas Ferre <nicolas.ferre@atmel.com> |
|---|---|
| Date | 2017-01-24 14:40 +0100 |
| Message-ID | <t39ui-4Sz-17@gated-at.bofh.it> |
| In reply to | #1556501 |
Le 11/01/2017 à 14:50, David Engraf a écrit :
> On newer boards the TC can be read as single 32 bit value without locking.
> Thus the clock can be used as reference for sched_clock which is much more
> accurate than the jiffies implementation.
>
> Tested on a Atmel SAMA5D2 board.
>
> Signed-off-by: David Engraf <david.engraf@sysgo.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Thanks,
> ---
> drivers/clocksource/tcb_clksrc.c | 16 +++++++++++++++-
> 1 file changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c
> index d4ca996..745844e 100644
> --- a/drivers/clocksource/tcb_clksrc.c
> +++ b/drivers/clocksource/tcb_clksrc.c
> @@ -10,6 +10,7 @@
> #include <linux/io.h>
> #include <linux/platform_device.h>
> #include <linux/atmel_tc.h>
> +#include <linux/sched_clock.h>
>
>
> /*
> @@ -56,11 +57,16 @@ static u64 tc_get_cycles(struct clocksource *cs)
> return (upper << 16) | lower;
> }
>
> -static u64 tc_get_cycles32(struct clocksource *cs)
> +static u32 tc_get_cv32(void)
> {
> return __raw_readl(tcaddr + ATMEL_TC_REG(0, CV));
> }
>
> +static u64 tc_get_cycles32(struct clocksource *cs)
> +{
> + return tc_get_cv32();
> +}
> +
> static struct clocksource clksrc = {
> .name = "tcb_clksrc",
> .rating = 200,
> @@ -69,6 +75,11 @@ static struct clocksource clksrc = {
> .flags = CLOCK_SOURCE_IS_CONTINUOUS,
> };
>
> +static u64 notrace tc_read_sched_clock(void)
> +{
> + return tc_get_cv32();
> +}
> +
> #ifdef CONFIG_GENERIC_CLOCKEVENTS
>
> struct tc_clkevt_device {
> @@ -339,6 +350,9 @@ static int __init tcb_clksrc_init(void)
> clksrc.read = tc_get_cycles32;
> /* setup ony channel 0 */
> tcb_setup_single_chan(tc, best_divisor_idx);
> +
> + /* register sched_clock on chips with single 32 bit counter */
> + sched_clock_register(tc_read_sched_clock, 32, divided_rate);
> } else {
> /* tclib will give us three clocks no matter what the
> * underlying platform supports.
>
--
Nicolas Ferre
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