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| Started by | David Miller <davem@davemloft.net> |
|---|---|
| First post | 2017-01-17 05:30 +0100 |
| Last post | 2017-01-17 17:00 +0100 |
| Articles | 2 — 2 participants |
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Re: [PATCH v4 3/4] sparc64: Add support for ADI register fields, ASIs and traps David Miller <davem@davemloft.net> - 2017-01-17 05:30 +0100
Re: [PATCH v4 3/4] sparc64: Add support for ADI register fields, ASIs and traps Khalid Aziz <khalid.aziz@oracle.com> - 2017-01-17 17:00 +0100
| From | David Miller <davem@davemloft.net> |
|---|---|
| Date | 2017-01-17 05:30 +0100 |
| Subject | Re: [PATCH v4 3/4] sparc64: Add support for ADI register fields, ASIs and traps |
| Message-ID | <t0tzc-27s-9@gated-at.bofh.it> |
From: Khalid Aziz <khalid.aziz@oracle.com> Date: Wed, 11 Jan 2017 09:12:53 -0700 > +#define SUN4V_MCD_PRECISE \ > + ldxa [%g0] ASI_SCRATCHPAD, %g2; \ > + ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4; \ > + ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5; \ > + ba,pt %xcc, etrap; \ > + rd %pc, %g7; \ > + ba,pt %xcc, sun4v_mcd_detect_precise; \ > + nop; \ > + nop; Always indent instructions which sit in the delay slot of a non-annulled branch, call, or jmpl by one extra space. For example: ba,pt %xcc, 1f nop > +sun4v_mcd_detect_precise: > + or %l4, %g0, %o1 > + or %l5, %g0, %o2 > + call sun4v_mem_corrupt_detect_precise > + add %sp, PTREGS_OFF, %o0 Likewise. Also, just do a normal "mov x, y" instead of the "or x, %g0, y" thing.
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| From | Khalid Aziz <khalid.aziz@oracle.com> |
|---|---|
| Date | 2017-01-17 17:00 +0100 |
| Subject | Re: [PATCH v4 3/4] sparc64: Add support for ADI register fields, ASIs and traps |
| Message-ID | <t0EkW-t6-15@gated-at.bofh.it> |
| In reply to | #1560249 |
On 01/16/2017 09:23 PM, David Miller wrote: > From: Khalid Aziz <khalid.aziz@oracle.com> > Date: Wed, 11 Jan 2017 09:12:53 -0700 > >> +#define SUN4V_MCD_PRECISE \ >> + ldxa [%g0] ASI_SCRATCHPAD, %g2; \ >> + ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4; \ >> + ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5; \ >> + ba,pt %xcc, etrap; \ >> + rd %pc, %g7; \ >> + ba,pt %xcc, sun4v_mcd_detect_precise; \ >> + nop; \ >> + nop; > > Always indent instructions which sit in the delay slot of a non-annulled > branch, call, or jmpl by one extra space. For example: > > ba,pt %xcc, 1f > nop > >> +sun4v_mcd_detect_precise: >> + or %l4, %g0, %o1 >> + or %l5, %g0, %o2 >> + call sun4v_mem_corrupt_detect_precise >> + add %sp, PTREGS_OFF, %o0 > > Likewise. > > Also, just do a normal "mov x, y" instead of the "or x, %g0, y" thing. Thanks, David. I will fix it in the next version of this patch. -- Khalid
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