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[PATCH 2/3] drm/exynos/decon5433: fix CMU programming

Started byAndrzej Hajda <a.hajda@samsung.com>
First post2017-01-17 15:30 +0100
Last post2017-01-17 15:30 +0100
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  [PATCH 2/3] drm/exynos/decon5433: fix CMU programming Andrzej Hajda <a.hajda@samsung.com> - 2017-01-17 15:30 +0100

#1560633 — [PATCH 2/3] drm/exynos/decon5433: fix CMU programming

FromAndrzej Hajda <a.hajda@samsung.com>
Date2017-01-17 15:30 +0100
Subject[PATCH 2/3] drm/exynos/decon5433: fix CMU programming
Message-ID<t0CVP-8bo-5@gated-at.bofh.it>
DECON_CMU register has reserved bits which should not be zeroed, otherwise
IP can behave strangely and cause IOMMU faults.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index 6fd2b11..9f4d60d 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -158,10 +158,6 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
 		m->crtc_vsync_end = m->crtc_vsync_start + 1;
 	}
 
-	/* enable clock gate */
-	val = CMU_CLKGAGE_MODE_SFR_F | CMU_CLKGAGE_MODE_MEM_F;
-	writel(val, ctx->addr + DECON_CMU);
-
 	decon_setup_trigger(ctx);
 
 	/* lcd on and use command if */
-- 
2.7.4

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