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Groups > linux.kernel > #1512948 > unrolled thread

[PATCH 0/8] x86/fpu: Remove CR0.TS support

Started byAndy Lutomirski <luto@kernel.org>
First post2016-10-31 23:20 +0100
Last post2016-11-01 10:00 +0100
Articles 15 — 4 participants

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Contents

  [PATCH 0/8] x86/fpu: Remove CR0.TS support Andy Lutomirski <luto@kernel.org> - 2016-10-31 23:20 +0100
    [PATCH 5/8] lguest: Remove CR0.TS support Andy Lutomirski <luto@kernel.org> - 2016-10-31 23:30 +0100
      [tip:x86/fpu] x86/fpu, lguest: Remove CR0.TS support tip-bot for Andy Lutomirski <tipbot@zytor.com> - 2016-11-01 08:20 +0100
    [PATCH 8/8] x86/fpu: Remove clts() Andy Lutomirski <luto@kernel.org> - 2016-10-31 23:30 +0100
      [tip:x86/fpu] x86/fpu: Remove clts() tip-bot for Andy Lutomirski <tipbot@zytor.com> - 2016-11-01 08:20 +0100
    [PATCH 2/8] fpu/bugs: Stop saving and restoring CR0.TS in fpu__init_check_bugs() Andy Lutomirski <luto@kernel.org> - 2016-10-31 23:30 +0100
      [tip:x86/fpu] x86/fpu: Stop saving and restoring CR0.TS in  fpu__init_check_bugs() tip-bot for Andy Lutomirski <tipbot@zytor.com> - 2016-11-01 08:20 +0100
    [PATCH 7/8] x86/fpu: Remove stts() Andy Lutomirski <luto@kernel.org> - 2016-10-31 23:30 +0100
      [tip:x86/fpu] x86/fpu: Remove stts() tip-bot for Andy Lutomirski <tipbot@zytor.com> - 2016-11-01 08:20 +0100
    Re: [PATCH 0/8] x86/fpu: Remove CR0.TS support Paul Bolle <pebolle@tiscali.nl> - 2016-10-31 23:50 +0100
      Re: [PATCH 0/8] x86/fpu: Remove CR0.TS support Borislav Petkov <bp@alien8.de> - 2016-11-01 00:10 +0100
        Re: [PATCH 0/8] x86/fpu: Remove CR0.TS support Paul Bolle <pebolle@tiscali.nl> - 2016-11-01 00:20 +0100
          Re: [PATCH 0/8] x86/fpu: Remove CR0.TS support Borislav Petkov <bp@alien8.de> - 2016-11-01 01:00 +0100
            Re: [PATCH 0/8] x86/fpu: Remove CR0.TS support Paul Bolle <pebolle@tiscali.nl> - 2016-11-01 09:00 +0100
              Re: [PATCH 0/8] x86/fpu: Remove CR0.TS support Borislav Petkov <bp@alien8.de> - 2016-11-01 10:00 +0100

#1512948 — [PATCH 0/8] x86/fpu: Remove CR0.TS support

FromAndy Lutomirski <luto@kernel.org>
Date2016-10-31 23:20 +0100
Subject[PATCH 0/8] x86/fpu: Remove CR0.TS support
Message-ID<syt5U-8pE-3@gated-at.bofh.it>
We don't do anything useful with CR0.TS anymore, so remove most of
our support for it.

I havne't meaningfully tested lguest because I can't get it to work
even without these patches.

Andy Lutomirski (8):
  fpu/init: Get rid of two redundant clts() calls
  fpu/bugs: Stop saving and restoring CR0.TS in fpu__init_check_bugs()
  x86/fpu: Remove irq_ts_save() and irq_ts_restore()
  x86/kvm: Remove host CR0.TS manipulation
  lguest: Remove CR0.TS support
  x86/fpu: #NM without FPU emulation is an error
  x86/fpu: Remove stts()
  x86/fpu: Remove clts()

 arch/x86/include/asm/fpu/api.h        | 10 ----------
 arch/x86/include/asm/lguest_hcall.h   |  1 -
 arch/x86/include/asm/paravirt.h       |  5 -----
 arch/x86/include/asm/paravirt_types.h |  2 --
 arch/x86/include/asm/special_insns.h  | 13 -------------
 arch/x86/kernel/fpu/bugs.c            |  7 -------
 arch/x86/kernel/fpu/core.c            | 29 -----------------------------
 arch/x86/kernel/fpu/init.c            | 18 ------------------
 arch/x86/kernel/paravirt.c            |  1 -
 arch/x86/kernel/paravirt_patch_32.c   |  2 --
 arch/x86/kernel/paravirt_patch_64.c   |  2 --
 arch/x86/kernel/traps.c               | 20 ++++++++++++++++----
 arch/x86/kvm/vmx.c                    | 12 ++++--------
 arch/x86/kvm/x86.c                    |  5 -----
 arch/x86/lguest/boot.c                | 29 +++++++----------------------
 arch/x86/xen/enlighten.c              | 13 -------------
 drivers/char/hw_random/via-rng.c      |  8 ++------
 drivers/crypto/padlock-aes.c          | 23 ++---------------------
 drivers/crypto/padlock-sha.c          | 18 ------------------
 drivers/lguest/hypercalls.c           |  4 ----
 drivers/lguest/lg.h                   |  1 -
 drivers/lguest/x86/core.c             | 19 +------------------
 22 files changed, 32 insertions(+), 210 deletions(-)

-- 
2.7.4

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#1512950 — [PATCH 5/8] lguest: Remove CR0.TS support

FromAndy Lutomirski <luto@kernel.org>
Date2016-10-31 23:30 +0100
Subject[PATCH 5/8] lguest: Remove CR0.TS support
Message-ID<sytfz-8t8-3@gated-at.bofh.it>
In reply to#1512948
Now that Linux never sets CR0.TS, lguest doesn't need to support it.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
---
 arch/x86/include/asm/lguest_hcall.h |  1 -
 arch/x86/lguest/boot.c              | 17 +++++++----------
 drivers/lguest/hypercalls.c         |  4 ----
 drivers/lguest/lg.h                 |  1 -
 drivers/lguest/x86/core.c           | 19 +------------------
 5 files changed, 8 insertions(+), 34 deletions(-)

diff --git a/arch/x86/include/asm/lguest_hcall.h b/arch/x86/include/asm/lguest_hcall.h
index ef01fef3eebc..6c119cfae218 100644
--- a/arch/x86/include/asm/lguest_hcall.h
+++ b/arch/x86/include/asm/lguest_hcall.h
@@ -9,7 +9,6 @@
 #define LHCALL_FLUSH_TLB	5
 #define LHCALL_LOAD_IDT_ENTRY	6
 #define LHCALL_SET_STACK	7
-#define LHCALL_TS		8
 #define LHCALL_SET_CLOCKEVENT	9
 #define LHCALL_HALT		10
 #define LHCALL_SET_PMD		13
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 25da5bc8d83d..d74afcdbc580 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -497,27 +497,24 @@ static void lguest_cpuid(unsigned int *ax, unsigned int *bx,
  * a whole series of functions like read_cr0() and write_cr0().
  *
  * We start with cr0.  cr0 allows you to turn on and off all kinds of basic
- * features, but Linux only really cares about one: the horrifically-named Task
- * Switched (TS) bit at bit 3 (ie. 8)
+ * features, but the only cr0 bit that Linux ever used at runtime was the
+ * horrifically-named Task Switched (TS) bit at bit 3 (ie. 8)
  *
  * What does the TS bit do?  Well, it causes the CPU to trap (interrupt 7) if
  * the floating point unit is used.  Which allows us to restore FPU state
- * lazily after a task switch, and Linux uses that gratefully, but wouldn't a
- * name like "FPUTRAP bit" be a little less cryptic?
+ * lazily after a task switch if we wanted to, but wouldn't a name like
+ * "FPUTRAP bit" be a little less cryptic?
  *
- * We store cr0 locally because the Host never changes it.  The Guest sometimes
- * wants to read it and we'd prefer not to bother the Host unnecessarily.
+ * Fortunately, Linux keeps it simple and doesn't use TS, so we can ignore
+ * cr0.
  */
-static unsigned long current_cr0;
 static void lguest_write_cr0(unsigned long val)
 {
-	lazy_hcall1(LHCALL_TS, val & X86_CR0_TS);
-	current_cr0 = val;
 }
 
 static unsigned long lguest_read_cr0(void)
 {
-	return current_cr0;
+	return 0;
 }
 
 /*
diff --git a/drivers/lguest/hypercalls.c b/drivers/lguest/hypercalls.c
index 19a32280731d..601f81c04873 100644
--- a/drivers/lguest/hypercalls.c
+++ b/drivers/lguest/hypercalls.c
@@ -109,10 +109,6 @@ static void do_hcall(struct lg_cpu *cpu, struct hcall_args *args)
 	case LHCALL_SET_CLOCKEVENT:
 		guest_set_clockevent(cpu, args->arg1);
 		break;
-	case LHCALL_TS:
-		/* This sets the TS flag, as we saw used in run_guest(). */
-		cpu->ts = args->arg1;
-		break;
 	case LHCALL_HALT:
 		/* Similarly, this sets the halted flag for run_guest(). */
 		cpu->halted = 1;
diff --git a/drivers/lguest/lg.h b/drivers/lguest/lg.h
index 69b3814afd2f..2356a2318034 100644
--- a/drivers/lguest/lg.h
+++ b/drivers/lguest/lg.h
@@ -43,7 +43,6 @@ struct lg_cpu {
 	struct mm_struct *mm; 	/* == tsk->mm, but that becomes NULL on exit */
 
 	u32 cr2;
-	int ts;
 	u32 esp1;
 	u16 ss1;
 
diff --git a/drivers/lguest/x86/core.c b/drivers/lguest/x86/core.c
index 6e9042e3d2a9..743253fc638f 100644
--- a/drivers/lguest/x86/core.c
+++ b/drivers/lguest/x86/core.c
@@ -247,14 +247,6 @@ unsigned long *lguest_arch_regptr(struct lg_cpu *cpu, size_t reg_off, bool any)
 void lguest_arch_run_guest(struct lg_cpu *cpu)
 {
 	/*
-	 * Remember the awfully-named TS bit?  If the Guest has asked to set it
-	 * we set it now, so we can trap and pass that trap to the Guest if it
-	 * uses the FPU.
-	 */
-	if (cpu->ts && fpregs_active())
-		stts();
-
-	/*
 	 * SYSENTER is an optimized way of doing system calls.  We can't allow
 	 * it because it always jumps to privilege level 0.  A normal Guest
 	 * won't try it because we don't advertise it in CPUID, but a malicious
@@ -282,10 +274,6 @@ void lguest_arch_run_guest(struct lg_cpu *cpu)
 	 if (boot_cpu_has(X86_FEATURE_SEP))
 		wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0);
 
-	/* Clear the host TS bit if it was set above. */
-	if (cpu->ts && fpregs_active())
-		clts();
-
 	/*
 	 * If the Guest page faulted, then the cr2 register will tell us the
 	 * bad virtual address.  We have to grab this now, because once we
@@ -421,12 +409,7 @@ void lguest_arch_handle_trap(struct lg_cpu *cpu)
 			kill_guest(cpu, "Writing cr2");
 		break;
 	case 7: /* We've intercepted a Device Not Available fault. */
-		/*
-		 * If the Guest doesn't want to know, we already restored the
-		 * Floating Point Unit, so we just continue without telling it.
-		 */
-		if (!cpu->ts)
-			return;
+		/* No special handling is needed here. */
 		break;
 	case 32 ... 255:
 		/* This might be a syscall. */
-- 
2.7.4

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#1513131 — [tip:x86/fpu] x86/fpu, lguest: Remove CR0.TS support

Fromtip-bot for Andy Lutomirski <tipbot@zytor.com>
Date2016-11-01 08:20 +0100
Subject[tip:x86/fpu] x86/fpu, lguest: Remove CR0.TS support
Message-ID<syBwu-5xk-41@gated-at.bofh.it>
In reply to#1512950
Commit-ID:  cd95ea81f25608c403052d0508ee5c9b32e2bc7d
Gitweb:     http://git.kernel.org/tip/cd95ea81f25608c403052d0508ee5c9b32e2bc7d
Author:     Andy Lutomirski <luto@kernel.org>
AuthorDate: Mon, 31 Oct 2016 15:18:46 -0700
Committer:  Ingo Molnar <mingo@kernel.org>
CommitDate: Tue, 1 Nov 2016 07:47:54 +0100

x86/fpu, lguest: Remove CR0.TS support

Now that Linux never sets CR0.TS, lguest doesn't need to support it.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: kvm list <kvm@vger.kernel.org>
Link: http://lkml.kernel.org/r/8a7bf2c11231c082258fd67705d0f275639b8475.1477951965.git.luto@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 arch/x86/include/asm/lguest_hcall.h |  1 -
 arch/x86/lguest/boot.c              | 17 +++++++----------
 drivers/lguest/hypercalls.c         |  4 ----
 drivers/lguest/lg.h                 |  1 -
 drivers/lguest/x86/core.c           | 19 +------------------
 5 files changed, 8 insertions(+), 34 deletions(-)

diff --git a/arch/x86/include/asm/lguest_hcall.h b/arch/x86/include/asm/lguest_hcall.h
index ef01fef..6c119cf 100644
--- a/arch/x86/include/asm/lguest_hcall.h
+++ b/arch/x86/include/asm/lguest_hcall.h
@@ -9,7 +9,6 @@
 #define LHCALL_FLUSH_TLB	5
 #define LHCALL_LOAD_IDT_ENTRY	6
 #define LHCALL_SET_STACK	7
-#define LHCALL_TS		8
 #define LHCALL_SET_CLOCKEVENT	9
 #define LHCALL_HALT		10
 #define LHCALL_SET_PMD		13
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 25da5bc8..d74afcd 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -497,27 +497,24 @@ static void lguest_cpuid(unsigned int *ax, unsigned int *bx,
  * a whole series of functions like read_cr0() and write_cr0().
  *
  * We start with cr0.  cr0 allows you to turn on and off all kinds of basic
- * features, but Linux only really cares about one: the horrifically-named Task
- * Switched (TS) bit at bit 3 (ie. 8)
+ * features, but the only cr0 bit that Linux ever used at runtime was the
+ * horrifically-named Task Switched (TS) bit at bit 3 (ie. 8)
  *
  * What does the TS bit do?  Well, it causes the CPU to trap (interrupt 7) if
  * the floating point unit is used.  Which allows us to restore FPU state
- * lazily after a task switch, and Linux uses that gratefully, but wouldn't a
- * name like "FPUTRAP bit" be a little less cryptic?
+ * lazily after a task switch if we wanted to, but wouldn't a name like
+ * "FPUTRAP bit" be a little less cryptic?
  *
- * We store cr0 locally because the Host never changes it.  The Guest sometimes
- * wants to read it and we'd prefer not to bother the Host unnecessarily.
+ * Fortunately, Linux keeps it simple and doesn't use TS, so we can ignore
+ * cr0.
  */
-static unsigned long current_cr0;
 static void lguest_write_cr0(unsigned long val)
 {
-	lazy_hcall1(LHCALL_TS, val & X86_CR0_TS);
-	current_cr0 = val;
 }
 
 static unsigned long lguest_read_cr0(void)
 {
-	return current_cr0;
+	return 0;
 }
 
 /*
diff --git a/drivers/lguest/hypercalls.c b/drivers/lguest/hypercalls.c
index 19a3228..601f81c 100644
--- a/drivers/lguest/hypercalls.c
+++ b/drivers/lguest/hypercalls.c
@@ -109,10 +109,6 @@ static void do_hcall(struct lg_cpu *cpu, struct hcall_args *args)
 	case LHCALL_SET_CLOCKEVENT:
 		guest_set_clockevent(cpu, args->arg1);
 		break;
-	case LHCALL_TS:
-		/* This sets the TS flag, as we saw used in run_guest(). */
-		cpu->ts = args->arg1;
-		break;
 	case LHCALL_HALT:
 		/* Similarly, this sets the halted flag for run_guest(). */
 		cpu->halted = 1;
diff --git a/drivers/lguest/lg.h b/drivers/lguest/lg.h
index 69b3814..2356a23 100644
--- a/drivers/lguest/lg.h
+++ b/drivers/lguest/lg.h
@@ -43,7 +43,6 @@ struct lg_cpu {
 	struct mm_struct *mm; 	/* == tsk->mm, but that becomes NULL on exit */
 
 	u32 cr2;
-	int ts;
 	u32 esp1;
 	u16 ss1;
 
diff --git a/drivers/lguest/x86/core.c b/drivers/lguest/x86/core.c
index 6e9042e..743253f 100644
--- a/drivers/lguest/x86/core.c
+++ b/drivers/lguest/x86/core.c
@@ -247,14 +247,6 @@ unsigned long *lguest_arch_regptr(struct lg_cpu *cpu, size_t reg_off, bool any)
 void lguest_arch_run_guest(struct lg_cpu *cpu)
 {
 	/*
-	 * Remember the awfully-named TS bit?  If the Guest has asked to set it
-	 * we set it now, so we can trap and pass that trap to the Guest if it
-	 * uses the FPU.
-	 */
-	if (cpu->ts && fpregs_active())
-		stts();
-
-	/*
 	 * SYSENTER is an optimized way of doing system calls.  We can't allow
 	 * it because it always jumps to privilege level 0.  A normal Guest
 	 * won't try it because we don't advertise it in CPUID, but a malicious
@@ -282,10 +274,6 @@ void lguest_arch_run_guest(struct lg_cpu *cpu)
 	 if (boot_cpu_has(X86_FEATURE_SEP))
 		wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0);
 
-	/* Clear the host TS bit if it was set above. */
-	if (cpu->ts && fpregs_active())
-		clts();
-
 	/*
 	 * If the Guest page faulted, then the cr2 register will tell us the
 	 * bad virtual address.  We have to grab this now, because once we
@@ -421,12 +409,7 @@ void lguest_arch_handle_trap(struct lg_cpu *cpu)
 			kill_guest(cpu, "Writing cr2");
 		break;
 	case 7: /* We've intercepted a Device Not Available fault. */
-		/*
-		 * If the Guest doesn't want to know, we already restored the
-		 * Floating Point Unit, so we just continue without telling it.
-		 */
-		if (!cpu->ts)
-			return;
+		/* No special handling is needed here. */
 		break;
 	case 32 ... 255:
 		/* This might be a syscall. */

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#1512952 — [PATCH 8/8] x86/fpu: Remove clts()

FromAndy Lutomirski <luto@kernel.org>
Date2016-10-31 23:30 +0100
Subject[PATCH 8/8] x86/fpu: Remove clts()
Message-ID<sytfA-8t8-15@gated-at.bofh.it>
In reply to#1512948
The kernel doesn't use clts() any more.  Remove it and all of its
paravirt infrastructure.

A careful reader may notice that xen_clts() appears to have been
buggy -- it didn't update xen_cr0_value.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
---
 arch/x86/include/asm/paravirt.h       |  5 -----
 arch/x86/include/asm/paravirt_types.h |  2 --
 arch/x86/include/asm/special_insns.h  | 11 -----------
 arch/x86/kernel/paravirt.c            |  1 -
 arch/x86/kernel/paravirt_patch_32.c   |  2 --
 arch/x86/kernel/paravirt_patch_64.c   |  2 --
 arch/x86/lguest/boot.c                | 12 ------------
 arch/x86/xen/enlighten.c              | 13 -------------
 8 files changed, 48 deletions(-)

diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index ce932812f142..f1fb4dbe9a3e 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -41,11 +41,6 @@ static inline void set_debugreg(unsigned long val, int reg)
 	PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
 }
 
-static inline void clts(void)
-{
-	PVOP_VCALL0(pv_cpu_ops.clts);
-}
-
 static inline unsigned long read_cr0(void)
 {
 	return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index 0f400c0e4979..545426aa61ef 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -103,8 +103,6 @@ struct pv_cpu_ops {
 	unsigned long (*get_debugreg)(int regno);
 	void (*set_debugreg)(int regno, unsigned long value);
 
-	void (*clts)(void);
-
 	unsigned long (*read_cr0)(void);
 	void (*write_cr0)(unsigned long);
 
diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
index 29b417bd8a68..12af3e35edfa 100644
--- a/arch/x86/include/asm/special_insns.h
+++ b/arch/x86/include/asm/special_insns.h
@@ -6,11 +6,6 @@
 
 #include <asm/nops.h>
 
-static inline void native_clts(void)
-{
-	asm volatile("clts");
-}
-
 /*
  * Volatile isn't enough to prevent the compiler from reordering the
  * read/write functions for the control registers and messing everything up.
@@ -208,12 +203,6 @@ static inline void load_gs_index(unsigned selector)
 
 #endif
 
-/* Clear the 'TS' bit */
-static inline void clts(void)
-{
-	native_clts();
-}
-
 #endif/* CONFIG_PARAVIRT */
 
 static inline void clflush(volatile void *__p)
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index bbf3d5933eaa..a1bfba0f7234 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -328,7 +328,6 @@ __visible struct pv_cpu_ops pv_cpu_ops = {
 	.cpuid = native_cpuid,
 	.get_debugreg = native_get_debugreg,
 	.set_debugreg = native_set_debugreg,
-	.clts = native_clts,
 	.read_cr0 = native_read_cr0,
 	.write_cr0 = native_write_cr0,
 	.read_cr4 = native_read_cr4,
diff --git a/arch/x86/kernel/paravirt_patch_32.c b/arch/x86/kernel/paravirt_patch_32.c
index 920c6ae08592..d3f7f14bb328 100644
--- a/arch/x86/kernel/paravirt_patch_32.c
+++ b/arch/x86/kernel/paravirt_patch_32.c
@@ -8,7 +8,6 @@ DEF_NATIVE(pv_cpu_ops, iret, "iret");
 DEF_NATIVE(pv_mmu_ops, read_cr2, "mov %cr2, %eax");
 DEF_NATIVE(pv_mmu_ops, write_cr3, "mov %eax, %cr3");
 DEF_NATIVE(pv_mmu_ops, read_cr3, "mov %cr3, %eax");
-DEF_NATIVE(pv_cpu_ops, clts, "clts");
 
 #if defined(CONFIG_PARAVIRT_SPINLOCKS)
 DEF_NATIVE(pv_lock_ops, queued_spin_unlock, "movb $0, (%eax)");
@@ -48,7 +47,6 @@ unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
 		PATCH_SITE(pv_mmu_ops, read_cr2);
 		PATCH_SITE(pv_mmu_ops, read_cr3);
 		PATCH_SITE(pv_mmu_ops, write_cr3);
-		PATCH_SITE(pv_cpu_ops, clts);
 #if defined(CONFIG_PARAVIRT_SPINLOCKS)
 		case PARAVIRT_PATCH(pv_lock_ops.queued_spin_unlock):
 			if (pv_is_native_spin_unlock()) {
diff --git a/arch/x86/kernel/paravirt_patch_64.c b/arch/x86/kernel/paravirt_patch_64.c
index bb3840cedb4f..915a4c0b217c 100644
--- a/arch/x86/kernel/paravirt_patch_64.c
+++ b/arch/x86/kernel/paravirt_patch_64.c
@@ -10,7 +10,6 @@ DEF_NATIVE(pv_mmu_ops, read_cr2, "movq %cr2, %rax");
 DEF_NATIVE(pv_mmu_ops, read_cr3, "movq %cr3, %rax");
 DEF_NATIVE(pv_mmu_ops, write_cr3, "movq %rdi, %cr3");
 DEF_NATIVE(pv_mmu_ops, flush_tlb_single, "invlpg (%rdi)");
-DEF_NATIVE(pv_cpu_ops, clts, "clts");
 DEF_NATIVE(pv_cpu_ops, wbinvd, "wbinvd");
 
 DEF_NATIVE(pv_cpu_ops, usergs_sysret64, "swapgs; sysretq");
@@ -58,7 +57,6 @@ unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
 		PATCH_SITE(pv_mmu_ops, read_cr2);
 		PATCH_SITE(pv_mmu_ops, read_cr3);
 		PATCH_SITE(pv_mmu_ops, write_cr3);
-		PATCH_SITE(pv_cpu_ops, clts);
 		PATCH_SITE(pv_mmu_ops, flush_tlb_single);
 		PATCH_SITE(pv_cpu_ops, wbinvd);
 #if defined(CONFIG_PARAVIRT_SPINLOCKS)
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index d74afcdbc580..4ca0d78adcf0 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -518,17 +518,6 @@ static unsigned long lguest_read_cr0(void)
 }
 
 /*
- * Intel provided a special instruction to clear the TS bit for people too cool
- * to use write_cr0() to do it.  This "clts" instruction is faster, because all
- * the vowels have been optimized out.
- */
-static void lguest_clts(void)
-{
-	lazy_hcall1(LHCALL_TS, 0);
-	current_cr0 &= ~X86_CR0_TS;
-}
-
-/*
  * cr2 is the virtual address of the last page fault, which the Guest only ever
  * reads.  The Host kindly writes this into our "struct lguest_data", so we
  * just read it out of there.
@@ -1429,7 +1418,6 @@ __init void lguest_init(void)
 	pv_cpu_ops.load_tls = lguest_load_tls;
 	pv_cpu_ops.get_debugreg = lguest_get_debugreg;
 	pv_cpu_ops.set_debugreg = lguest_set_debugreg;
-	pv_cpu_ops.clts = lguest_clts;
 	pv_cpu_ops.read_cr0 = lguest_read_cr0;
 	pv_cpu_ops.write_cr0 = lguest_write_cr0;
 	pv_cpu_ops.read_cr4 = lguest_read_cr4;
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index c0fdd57da7aa..69f22f7e80ed 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -980,17 +980,6 @@ static void xen_io_delay(void)
 {
 }
 
-static void xen_clts(void)
-{
-	struct multicall_space mcs;
-
-	mcs = xen_mc_entry(0);
-
-	MULTI_fpu_taskswitch(mcs.mc, 0);
-
-	xen_mc_issue(PARAVIRT_LAZY_CPU);
-}
-
 static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
 
 static unsigned long xen_read_cr0(void)
@@ -1233,8 +1222,6 @@ static const struct pv_cpu_ops xen_cpu_ops __initconst = {
 	.set_debugreg = xen_set_debugreg,
 	.get_debugreg = xen_get_debugreg,
 
-	.clts = xen_clts,
-
 	.read_cr0 = xen_read_cr0,
 	.write_cr0 = xen_write_cr0,
 
-- 
2.7.4

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#1513127 — [tip:x86/fpu] x86/fpu: Remove clts()

Fromtip-bot for Andy Lutomirski <tipbot@zytor.com>
Date2016-11-01 08:20 +0100
Subject[tip:x86/fpu] x86/fpu: Remove clts()
Message-ID<syBwu-5xk-29@gated-at.bofh.it>
In reply to#1512952
Commit-ID:  af25ed59b5616b389d90877f7085dc5d457a3d49
Gitweb:     http://git.kernel.org/tip/af25ed59b5616b389d90877f7085dc5d457a3d49
Author:     Andy Lutomirski <luto@kernel.org>
AuthorDate: Mon, 31 Oct 2016 15:18:49 -0700
Committer:  Ingo Molnar <mingo@kernel.org>
CommitDate: Tue, 1 Nov 2016 07:47:55 +0100

x86/fpu: Remove clts()

The kernel doesn't use clts() any more.  Remove it and all of its
paravirt infrastructure.

A careful reader may notice that xen_clts() appears to have been
buggy -- it didn't update xen_cr0_value.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: kvm list <kvm@vger.kernel.org>
Link: http://lkml.kernel.org/r/3d3c8ca62f17579b9849a013d71e59a4d5d1b079.1477951965.git.luto@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 arch/x86/include/asm/paravirt.h       |  5 -----
 arch/x86/include/asm/paravirt_types.h |  2 --
 arch/x86/include/asm/special_insns.h  | 11 -----------
 arch/x86/kernel/paravirt.c            |  1 -
 arch/x86/kernel/paravirt_patch_32.c   |  2 --
 arch/x86/kernel/paravirt_patch_64.c   |  2 --
 arch/x86/lguest/boot.c                | 12 ------------
 arch/x86/xen/enlighten.c              | 13 -------------
 8 files changed, 48 deletions(-)

diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index ce93281..f1fb4db 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -41,11 +41,6 @@ static inline void set_debugreg(unsigned long val, int reg)
 	PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
 }
 
-static inline void clts(void)
-{
-	PVOP_VCALL0(pv_cpu_ops.clts);
-}
-
 static inline unsigned long read_cr0(void)
 {
 	return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index 0f400c0..545426a 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -103,8 +103,6 @@ struct pv_cpu_ops {
 	unsigned long (*get_debugreg)(int regno);
 	void (*set_debugreg)(int regno, unsigned long value);
 
-	void (*clts)(void);
-
 	unsigned long (*read_cr0)(void);
 	void (*write_cr0)(unsigned long);
 
diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
index 29b417b..12af3e3 100644
--- a/arch/x86/include/asm/special_insns.h
+++ b/arch/x86/include/asm/special_insns.h
@@ -6,11 +6,6 @@
 
 #include <asm/nops.h>
 
-static inline void native_clts(void)
-{
-	asm volatile("clts");
-}
-
 /*
  * Volatile isn't enough to prevent the compiler from reordering the
  * read/write functions for the control registers and messing everything up.
@@ -208,12 +203,6 @@ static inline void load_gs_index(unsigned selector)
 
 #endif
 
-/* Clear the 'TS' bit */
-static inline void clts(void)
-{
-	native_clts();
-}
-
 #endif/* CONFIG_PARAVIRT */
 
 static inline void clflush(volatile void *__p)
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index bbf3d59..a1bfba0 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -328,7 +328,6 @@ __visible struct pv_cpu_ops pv_cpu_ops = {
 	.cpuid = native_cpuid,
 	.get_debugreg = native_get_debugreg,
 	.set_debugreg = native_set_debugreg,
-	.clts = native_clts,
 	.read_cr0 = native_read_cr0,
 	.write_cr0 = native_write_cr0,
 	.read_cr4 = native_read_cr4,
diff --git a/arch/x86/kernel/paravirt_patch_32.c b/arch/x86/kernel/paravirt_patch_32.c
index 920c6ae..d3f7f14 100644
--- a/arch/x86/kernel/paravirt_patch_32.c
+++ b/arch/x86/kernel/paravirt_patch_32.c
@@ -8,7 +8,6 @@ DEF_NATIVE(pv_cpu_ops, iret, "iret");
 DEF_NATIVE(pv_mmu_ops, read_cr2, "mov %cr2, %eax");
 DEF_NATIVE(pv_mmu_ops, write_cr3, "mov %eax, %cr3");
 DEF_NATIVE(pv_mmu_ops, read_cr3, "mov %cr3, %eax");
-DEF_NATIVE(pv_cpu_ops, clts, "clts");
 
 #if defined(CONFIG_PARAVIRT_SPINLOCKS)
 DEF_NATIVE(pv_lock_ops, queued_spin_unlock, "movb $0, (%eax)");
@@ -48,7 +47,6 @@ unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
 		PATCH_SITE(pv_mmu_ops, read_cr2);
 		PATCH_SITE(pv_mmu_ops, read_cr3);
 		PATCH_SITE(pv_mmu_ops, write_cr3);
-		PATCH_SITE(pv_cpu_ops, clts);
 #if defined(CONFIG_PARAVIRT_SPINLOCKS)
 		case PARAVIRT_PATCH(pv_lock_ops.queued_spin_unlock):
 			if (pv_is_native_spin_unlock()) {
diff --git a/arch/x86/kernel/paravirt_patch_64.c b/arch/x86/kernel/paravirt_patch_64.c
index bb3840c..915a4c0 100644
--- a/arch/x86/kernel/paravirt_patch_64.c
+++ b/arch/x86/kernel/paravirt_patch_64.c
@@ -10,7 +10,6 @@ DEF_NATIVE(pv_mmu_ops, read_cr2, "movq %cr2, %rax");
 DEF_NATIVE(pv_mmu_ops, read_cr3, "movq %cr3, %rax");
 DEF_NATIVE(pv_mmu_ops, write_cr3, "movq %rdi, %cr3");
 DEF_NATIVE(pv_mmu_ops, flush_tlb_single, "invlpg (%rdi)");
-DEF_NATIVE(pv_cpu_ops, clts, "clts");
 DEF_NATIVE(pv_cpu_ops, wbinvd, "wbinvd");
 
 DEF_NATIVE(pv_cpu_ops, usergs_sysret64, "swapgs; sysretq");
@@ -58,7 +57,6 @@ unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
 		PATCH_SITE(pv_mmu_ops, read_cr2);
 		PATCH_SITE(pv_mmu_ops, read_cr3);
 		PATCH_SITE(pv_mmu_ops, write_cr3);
-		PATCH_SITE(pv_cpu_ops, clts);
 		PATCH_SITE(pv_mmu_ops, flush_tlb_single);
 		PATCH_SITE(pv_cpu_ops, wbinvd);
 #if defined(CONFIG_PARAVIRT_SPINLOCKS)
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index d74afcd..4ca0d78 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -518,17 +518,6 @@ static unsigned long lguest_read_cr0(void)
 }
 
 /*
- * Intel provided a special instruction to clear the TS bit for people too cool
- * to use write_cr0() to do it.  This "clts" instruction is faster, because all
- * the vowels have been optimized out.
- */
-static void lguest_clts(void)
-{
-	lazy_hcall1(LHCALL_TS, 0);
-	current_cr0 &= ~X86_CR0_TS;
-}
-
-/*
  * cr2 is the virtual address of the last page fault, which the Guest only ever
  * reads.  The Host kindly writes this into our "struct lguest_data", so we
  * just read it out of there.
@@ -1429,7 +1418,6 @@ __init void lguest_init(void)
 	pv_cpu_ops.load_tls = lguest_load_tls;
 	pv_cpu_ops.get_debugreg = lguest_get_debugreg;
 	pv_cpu_ops.set_debugreg = lguest_set_debugreg;
-	pv_cpu_ops.clts = lguest_clts;
 	pv_cpu_ops.read_cr0 = lguest_read_cr0;
 	pv_cpu_ops.write_cr0 = lguest_write_cr0;
 	pv_cpu_ops.read_cr4 = lguest_read_cr4;
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index bdd8556..ced7027 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -980,17 +980,6 @@ static void xen_io_delay(void)
 {
 }
 
-static void xen_clts(void)
-{
-	struct multicall_space mcs;
-
-	mcs = xen_mc_entry(0);
-
-	MULTI_fpu_taskswitch(mcs.mc, 0);
-
-	xen_mc_issue(PARAVIRT_LAZY_CPU);
-}
-
 static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
 
 static unsigned long xen_read_cr0(void)
@@ -1233,8 +1222,6 @@ static const struct pv_cpu_ops xen_cpu_ops __initconst = {
 	.set_debugreg = xen_set_debugreg,
 	.get_debugreg = xen_get_debugreg,
 
-	.clts = xen_clts,
-
 	.read_cr0 = xen_read_cr0,
 	.write_cr0 = xen_write_cr0,
 

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#1512953 — [PATCH 2/8] fpu/bugs: Stop saving and restoring CR0.TS in fpu__init_check_bugs()

FromAndy Lutomirski <luto@kernel.org>
Date2016-10-31 23:30 +0100
Subject[PATCH 2/8] fpu/bugs: Stop saving and restoring CR0.TS in fpu__init_check_bugs()
Message-ID<sytfA-8t8-17@gated-at.bofh.it>
In reply to#1512948
fpu__init_check_bugs() runs long after the early FPU init, so CR0.TS
will be clear by the time it runs.  The save-and-restore dance would
have been unnecessary anyway, though, as kernel_fpu_begin() would
have been good enough.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
---
 arch/x86/kernel/fpu/bugs.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/arch/x86/kernel/fpu/bugs.c b/arch/x86/kernel/fpu/bugs.c
index aad34aafc0e0..d913047f832c 100644
--- a/arch/x86/kernel/fpu/bugs.c
+++ b/arch/x86/kernel/fpu/bugs.c
@@ -23,17 +23,12 @@ static double __initdata y = 3145727.0;
  */
 void __init fpu__init_check_bugs(void)
 {
-	u32 cr0_saved;
 	s32 fdiv_bug;
 
 	/* kernel_fpu_begin/end() relies on patched alternative instructions. */
 	if (!boot_cpu_has(X86_FEATURE_FPU))
 		return;
 
-	/* We might have CR0::TS set already, clear it: */
-	cr0_saved = read_cr0();
-	write_cr0(cr0_saved & ~X86_CR0_TS);
-
 	kernel_fpu_begin();
 
 	/*
@@ -56,8 +51,6 @@ void __init fpu__init_check_bugs(void)
 
 	kernel_fpu_end();
 
-	write_cr0(cr0_saved);
-
 	if (fdiv_bug) {
 		set_cpu_bug(&boot_cpu_data, X86_BUG_FDIV);
 		pr_warn("Hmm, FPU with FDIV bug\n");
-- 
2.7.4

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#1513130 — [tip:x86/fpu] x86/fpu: Stop saving and restoring CR0.TS in fpu__init_check_bugs()

Fromtip-bot for Andy Lutomirski <tipbot@zytor.com>
Date2016-11-01 08:20 +0100
Subject[tip:x86/fpu] x86/fpu: Stop saving and restoring CR0.TS in fpu__init_check_bugs()
Message-ID<syBwu-5xk-47@gated-at.bofh.it>
In reply to#1512953
Commit-ID:  fc560a80bac91e512fc37cdfe03a982ef4543c6b
Gitweb:     http://git.kernel.org/tip/fc560a80bac91e512fc37cdfe03a982ef4543c6b
Author:     Andy Lutomirski <luto@kernel.org>
AuthorDate: Mon, 31 Oct 2016 15:18:43 -0700
Committer:  Ingo Molnar <mingo@kernel.org>
CommitDate: Tue, 1 Nov 2016 07:47:53 +0100

x86/fpu: Stop saving and restoring CR0.TS in fpu__init_check_bugs()

fpu__init_check_bugs() runs long after the early FPU init, so CR0.TS
will be clear by the time it runs.  The save-and-restore dance would
have been unnecessary anyway, though, as kernel_fpu_begin() would
have been good enough.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: kvm list <kvm@vger.kernel.org>
Link: http://lkml.kernel.org/r/76d1f1eacb5caead98197d1eb50ac6110ab20c6a.1477951965.git.luto@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 arch/x86/kernel/fpu/bugs.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/arch/x86/kernel/fpu/bugs.c b/arch/x86/kernel/fpu/bugs.c
index aad34aa..d913047 100644
--- a/arch/x86/kernel/fpu/bugs.c
+++ b/arch/x86/kernel/fpu/bugs.c
@@ -23,17 +23,12 @@ static double __initdata y = 3145727.0;
  */
 void __init fpu__init_check_bugs(void)
 {
-	u32 cr0_saved;
 	s32 fdiv_bug;
 
 	/* kernel_fpu_begin/end() relies on patched alternative instructions. */
 	if (!boot_cpu_has(X86_FEATURE_FPU))
 		return;
 
-	/* We might have CR0::TS set already, clear it: */
-	cr0_saved = read_cr0();
-	write_cr0(cr0_saved & ~X86_CR0_TS);
-
 	kernel_fpu_begin();
 
 	/*
@@ -56,8 +51,6 @@ void __init fpu__init_check_bugs(void)
 
 	kernel_fpu_end();
 
-	write_cr0(cr0_saved);
-
 	if (fdiv_bug) {
 		set_cpu_bug(&boot_cpu_data, X86_BUG_FDIV);
 		pr_warn("Hmm, FPU with FDIV bug\n");

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#1512954 — [PATCH 7/8] x86/fpu: Remove stts()

FromAndy Lutomirski <luto@kernel.org>
Date2016-10-31 23:30 +0100
Subject[PATCH 7/8] x86/fpu: Remove stts()
Message-ID<sytfA-8t8-25@gated-at.bofh.it>
In reply to#1512948
It has no callers any more, and it was always a bit confusing, as
there is no STTS instruction.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
---
 arch/x86/include/asm/special_insns.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
index 19a2224f9e16..29b417bd8a68 100644
--- a/arch/x86/include/asm/special_insns.h
+++ b/arch/x86/include/asm/special_insns.h
@@ -216,8 +216,6 @@ static inline void clts(void)
 
 #endif/* CONFIG_PARAVIRT */
 
-#define stts() write_cr0(read_cr0() | X86_CR0_TS)
-
 static inline void clflush(volatile void *__p)
 {
 	asm volatile("clflush %0" : "+m" (*(volatile char __force *)__p));
-- 
2.7.4

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#1513132 — [tip:x86/fpu] x86/fpu: Remove stts()

Fromtip-bot for Andy Lutomirski <tipbot@zytor.com>
Date2016-11-01 08:20 +0100
Subject[tip:x86/fpu] x86/fpu: Remove stts()
Message-ID<syBwu-5xk-43@gated-at.bofh.it>
In reply to#1512954
Commit-ID:  0d50612c041f213fb6b98e3ff06e306a859c36f2
Gitweb:     http://git.kernel.org/tip/0d50612c041f213fb6b98e3ff06e306a859c36f2
Author:     Andy Lutomirski <luto@kernel.org>
AuthorDate: Mon, 31 Oct 2016 15:18:48 -0700
Committer:  Ingo Molnar <mingo@kernel.org>
CommitDate: Tue, 1 Nov 2016 07:47:55 +0100

x86/fpu: Remove stts()

It has no callers any more, and it was always a bit confusing, as
there is no STTS instruction.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: kvm list <kvm@vger.kernel.org>
Link: http://lkml.kernel.org/r/04247401710b230849e58bf2112ce4fd0b9840e1.1477951965.git.luto@kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 arch/x86/include/asm/special_insns.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
index 19a2224..29b417b 100644
--- a/arch/x86/include/asm/special_insns.h
+++ b/arch/x86/include/asm/special_insns.h
@@ -216,8 +216,6 @@ static inline void clts(void)
 
 #endif/* CONFIG_PARAVIRT */
 
-#define stts() write_cr0(read_cr0() | X86_CR0_TS)
-
 static inline void clflush(volatile void *__p)
 {
 	asm volatile("clflush %0" : "+m" (*(volatile char __force *)__p));

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#1512963

FromPaul Bolle <pebolle@tiscali.nl>
Date2016-10-31 23:50 +0100
Message-ID<sytyW-8o-19@gated-at.bofh.it>
In reply to#1512948
On Mon, 2016-10-31 at 15:18 -0700, Andy Lutomirski wrote:
> I havne't meaningfully tested lguest because I can't get it to work
> even without these patches.

Have you disabled CONFIG_OLPC in the .config for the guest kernel?
Otherwise you will run into
    lguest: Reinjecting trap 13 for fault at 0x1000062: Invalid argument

A similar obscure gotcha (I think it is "unhandled trap 13") can be
avoided by launching the guest with the dis_ucode_ldr kernel option.

Hope this helps,


Paul Bolle

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#1512985

FromBorislav Petkov <bp@alien8.de>
Date2016-11-01 00:10 +0100
Message-ID<sytSh-uI-9@gated-at.bofh.it>
In reply to#1512963
On Mon, Oct 31, 2016 at 11:41:19PM +0100, Paul Bolle wrote:
> A similar obscure gotcha (I think it is "unhandled trap 13") can be
> avoided by launching the guest with the dis_ucode_ldr kernel option.
					  ^^^^^^^^^^^^^

Huh, what does that have to do with disabling the microcode loader?

Funny...

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.

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#1512987

FromPaul Bolle <pebolle@tiscali.nl>
Date2016-11-01 00:20 +0100
Message-ID<syu1Y-yg-21@gated-at.bofh.it>
In reply to#1512985
On Tue, 2016-11-01 at 00:04 +0100, Borislav Petkov wrote:
> Huh, what does that have to do with disabling the microcode loader?
> 
> Funny...

See https://lists.ozlabs.org/pipermail/lguest/2013-May/002001.html .
Nobody cared enough to fix it. I cared enough to figure it all out. But
I didn't understand much of the possible solutions that where suggested
three years ago.

I'm certain I still ran into this issue with the microcode loader in
the beginning of this year, so that was probably with a v4.4 based
guest.


Paul Bolle

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#1512995

FromBorislav Petkov <bp@alien8.de>
Date2016-11-01 01:00 +0100
Message-ID<syuEF-LM-1@gated-at.bofh.it>
In reply to#1512987
On Tue, Nov 01, 2016 at 12:10:48AM +0100, Paul Bolle wrote:
> See https://lists.ozlabs.org/pipermail/lguest/2013-May/002001.html .
> Nobody cared enough to fix it. I cared enough to figure it all out. But
> I didn't understand much of the possible solutions that where suggested
> three years ago.

I'm guessing the simple fix would be this:

---
diff --git a/drivers/lguest/Kconfig b/drivers/lguest/Kconfig
index 169172d2ba05..9c08b3050bb7 100644
--- a/drivers/lguest/Kconfig
+++ b/drivers/lguest/Kconfig
@@ -1,6 +1,6 @@
 config LGUEST
 	tristate "Linux hypervisor example code"
-	depends on X86_32 && EVENTFD && TTY && PCI_DIRECT
+	depends on X86_32 && EVENTFD && TTY && PCI_DIRECT && !MICROCODE
 	select HVC_DRIVER
 	---help---
 	  This is a very simple module which allows you to run
---

but maybe the better fix is to hack in MSR emulation in lguest and
intercept the *MSR accesses and do the writes/reads in the exception
fixup and ...

I haven't looked at the lguest code, of course and whether that's easily
doable and whether it even makes sense and whether one should simply use
qemu/kvm instead and, and, and...

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.

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#1513148

FromPaul Bolle <pebolle@tiscali.nl>
Date2016-11-01 09:00 +0100
Message-ID<syC9g-5KG-7@gated-at.bofh.it>
In reply to#1512995
On Tue, 2016-11-01 at 00:48 +0100, Borislav Petkov wrote:
> --- a/drivers/lguest/Kconfig
> +++ b/drivers/lguest/Kconfig

>  config LGUEST
>  	tristate "Linux hypervisor example code"
> -	depends on X86_32 && EVENTFD && TTY && PCI_DIRECT
> > +	depends on X86_32 && EVENTFD && TTY && PCI_DIRECT && !MICROCODE
>  	select HVC_DRIVER
>  	---help---
>  	  This is a very simple module which allows you to run

LGUEST is the symbol for host support. The symbol for guest support is
LGUEST_GUEST and it lives in arch/x86/. Yes, it's a bit of a gotcha.

> but maybe the better fix is to hack in MSR emulation in lguest and
> intercept the *MSR accesses and do the writes/reads in the exception
> fixup and ...
> 
> I haven't looked at the lguest code, of course and whether that's easily
> doable and whether it even makes sense and whether one should simply use
> qemu/kvm instead and, and, and...

Yeah, I thought about adding negative dependencies (eg, "!OLPC &&
!MICROCODE") too. But that would be contrary to the neat lguest goal to
be able to use the same kernel image as a host and a guest. At least, I
think that is one of its goals.

And as probably everybody capable of hacking on lguest (ie, other
people than me) came up with doubts similar to yours, these two issues
never got fixed.   

Thanks,


Paul Bolle

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#1513161

FromBorislav Petkov <bp@alien8.de>
Date2016-11-01 10:00 +0100
Message-ID<syD5f-6nP-15@gated-at.bofh.it>
In reply to#1513148
On Tue, Nov 01, 2016 at 08:51:57AM +0100, Paul Bolle wrote:
> And as probably everybody capable of hacking on lguest (ie, other
> people than me) came up with doubts similar to yours, these two issues
> never got fixed.

You can always try to fix them and see where it gets ya. I think that's
the *ultimate* goal of lguest.

:-)

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.

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