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Groups > linux.kernel > #1511082 > unrolled thread

[PATCH 1/2] drm: tilcdc: Add revision handling for FB_CEILING

Started byDaniel Schultz <d.schultz@phytec.de>
First post2016-10-28 14:00 +0200
Last post2016-10-31 18:40 +0100
Articles 2 — 2 participants

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  [PATCH 1/2] drm: tilcdc: Add revision handling for FB_CEILING Daniel Schultz <d.schultz@phytec.de> - 2016-10-28 14:00 +0200
    Re: [PATCH 1/2] drm: tilcdc: Add revision handling for FB_CEILING Jyri Sarha <jsarha@ti.com> - 2016-10-31 18:40 +0100

#1511082 — [PATCH 1/2] drm: tilcdc: Add revision handling for FB_CEILING

FromDaniel Schultz <d.schultz@phytec.de>
Date2016-10-28 14:00 +0200
Subject[PATCH 1/2] drm: tilcdc: Add revision handling for FB_CEILING
Message-ID<sxdZf-7Oz-9@gated-at.bofh.it>
The commit d8ff0c63fbcb ("drm/tilcdc: Adjust the FB_CEILING address")
added an adjustment of the FB_CEILING address. This is done by decrementing
the address by one.

On the AM335x (rev 0x4F201000) the framebuffer is rotated left over the
display border, because the ceiling address is 8f276fff instead of
8f277000. Since this adjustment isn't necessary for the LCDC v2, the
origin ceiling address should be used.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
---
 drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index 788999e..fe1d088 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -69,6 +69,7 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb)
 {
 	struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
 	struct drm_device *dev = crtc->dev;
+	struct tilcdc_drm_private *priv = dev->dev_private;
 	struct drm_gem_cma_object *gem;
 	unsigned int depth, bpp;
 	dma_addr_t start, end;
@@ -88,7 +89,10 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb)
 	 * unlikely that LCDC would fetch the DMA addresses in the middle of
 	 * an update.
 	 */
-	dma_base_and_ceiling = (u64)(end - 1) << 32 | start;
+	if (priv->rev == 1)
+		end -= 1;
+
+	dma_base_and_ceiling = (u64)end << 32 | start;
 	tilcdc_write64(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, dma_base_and_ceiling);
 
 	if (tilcdc_crtc->curr_fb)
-- 
1.9.1

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#1512739

FromJyri Sarha <jsarha@ti.com>
Date2016-10-31 18:40 +0100
Message-ID<syoIW-5se-11@gated-at.bofh.it>
In reply to#1511082
On 10/28/16 14:52, Daniel Schultz wrote:
> The commit d8ff0c63fbcb ("drm/tilcdc: Adjust the FB_CEILING address")
> added an adjustment of the FB_CEILING address. This is done by decrementing
> the address by one.
> 
> On the AM335x (rev 0x4F201000) the framebuffer is rotated left over the
> display border, because the ceiling address is 8f276fff instead of
> 8f277000. Since this adjustment isn't necessary for the LCDC v2, the
> origin ceiling address should be used.
> 

I can not see the rotation on any of my HW. However, there is no harm in
taking this patch either, so I'll take your word for it and pick this up
for my next pull request.

Best regards,
Jyri

> Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
> ---
>  drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> index 788999e..fe1d088 100644
> --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
> @@ -69,6 +69,7 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb)
>  {
>  	struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
>  	struct drm_device *dev = crtc->dev;
> +	struct tilcdc_drm_private *priv = dev->dev_private;
>  	struct drm_gem_cma_object *gem;
>  	unsigned int depth, bpp;
>  	dma_addr_t start, end;
> @@ -88,7 +89,10 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb)
>  	 * unlikely that LCDC would fetch the DMA addresses in the middle of
>  	 * an update.
>  	 */
> -	dma_base_and_ceiling = (u64)(end - 1) << 32 | start;
> +	if (priv->rev == 1)
> +		end -= 1;
> +
> +	dma_base_and_ceiling = (u64)end << 32 | start;
>  	tilcdc_write64(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, dma_base_and_ceiling);
>  
>  	if (tilcdc_crtc->curr_fb)
> 

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