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| Started by | Milo Kim <woogyom.kim@gmail.com> |
|---|---|
| First post | 2016-10-28 09:00 +0200 |
| Last post | 2016-11-02 19:40 +0100 |
| Articles | 2 — 2 participants |
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[PATCH v2 2/4] ARM: dts: sun8i: Add SPI controller node in H3 Milo Kim <woogyom.kim@gmail.com> - 2016-10-28 09:00 +0200
Re: [PATCH v2 2/4] ARM: dts: sun8i: Add SPI controller node in H3 Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-11-02 19:40 +0100
| From | Milo Kim <woogyom.kim@gmail.com> |
|---|---|
| Date | 2016-10-28 09:00 +0200 |
| Subject | [PATCH v2 2/4] ARM: dts: sun8i: Add SPI controller node in H3 |
| Message-ID | <sx9iW-4NF-7@gated-at.bofh.it> |
H3 SPI subsystem is almost same as A31 SPI except buffer size, so those
DT properties are reusable.
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
---
arch/arm/boot/dts/sun8i-h3.dtsi | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 8a59d8d..c38b028 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -439,6 +439,38 @@
clocks = <&osc24M>;
};
+ spi0: spi@01c68000 {
+ compatible = "allwinner,sun8i-h3-spi";
+ reg = <0x01c68000 0x1000>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
+ clock-names = "ahb", "mod";
+ dmas = <&dma 23>, <&dma 23>;
+ dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ resets = <&ccu RST_BUS_SPI0>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ spi1: spi@01c69000 {
+ compatible = "allwinner,sun8i-h3-spi";
+ reg = <0x01c69000 0x1000>;
+ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
+ clock-names = "ahb", "mod";
+ dmas = <&dma 24>, <&dma 24>;
+ dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>;
+ resets = <&ccu RST_BUS_SPI1>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
wdt0: watchdog@01c20ca0 {
compatible = "allwinner,sun6i-a31-wdt";
reg = <0x01c20ca0 0x20>;
--
2.9.3
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| From | Maxime Ripard <maxime.ripard@free-electrons.com> |
|---|---|
| Date | 2016-11-02 19:40 +0100 |
| Message-ID | <sz8C5-1rE-11@gated-at.bofh.it> |
| In reply to | #1510875 |
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1;4600;0c On Fri, Oct 28, 2016 at 03:54:10PM +0900, Milo Kim wrote: > H3 SPI subsystem is almost same as A31 SPI except buffer size, so those > DT properties are reusable. > > Cc: Maxime Ripard <maxime.ripard@free-electrons.com> > Cc: Chen-Yu Tsai <wens@csie.org> > Signed-off-by: Milo Kim <woogyom.kim@gmail.com> Applied both, thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
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