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| Started by | Alexandre Bailon <abailon@baylibre.com> |
|---|---|
| First post | 2016-10-25 16:00 +0200 |
| Last post | 2016-10-26 11:30 +0200 |
| Articles | 3 — 2 participants |
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[PATCH 2/3] phy: da8xx-usb: Configure CFGCHIP2 to support OTG workaround Alexandre Bailon <abailon@baylibre.com> - 2016-10-25 16:00 +0200
Re: [PATCH 2/3] phy: da8xx-usb: Configure CFGCHIP2 to support OTG workaround David Lechner <david@lechnology.com> - 2016-10-25 21:20 +0200
Re: [PATCH 2/3] phy: da8xx-usb: Configure CFGCHIP2 to support OTG workaround Alexandre Bailon <abailon@baylibre.com> - 2016-10-26 11:30 +0200
| From | Alexandre Bailon <abailon@baylibre.com> |
|---|---|
| Date | 2016-10-25 16:00 +0200 |
| Subject | [PATCH 2/3] phy: da8xx-usb: Configure CFGCHIP2 to support OTG workaround |
| Message-ID | <swaqK-6ln-27@gated-at.bofh.it> |
If we configure the da8xx OTG phy in OTG mode, neither device or host
mode will work. That is because the PHY is not able to detect and notify
the driver that value of ID pin changed.
To work despite this hardware limitation, the da8xx glue implement a
workaround.
But to work, the workaround require the VBUS sense and the session end
comparator to enabled.
Enable them if the phy is configured in OTG mode.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
---
drivers/phy/phy-da8xx-usb.c | 17 ++++++++++++-----
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/phy/phy-da8xx-usb.c b/drivers/phy/phy-da8xx-usb.c
index 32ae78c..fd39292 100644
--- a/drivers/phy/phy-da8xx-usb.c
+++ b/drivers/phy/phy-da8xx-usb.c
@@ -93,24 +93,31 @@ static int da8xx_usb20_phy_power_off(struct phy *phy)
static int da8xx_usb20_phy_set_mode(struct phy *phy, enum phy_mode mode)
{
struct da8xx_usb_phy *d_phy = phy_get_drvdata(phy);
+ int ret;
u32 val;
+ ret = regmap_read(d_phy->regmap, CFGCHIP(2), &val);
+ if (ret)
+ return ret;
+
+ val &= ~CFGCHIP2_OTGMODE_MASK;
+
switch (mode) {
case PHY_MODE_USB_HOST: /* Force VBUS valid, ID = 0 */
- val = CFGCHIP2_OTGMODE_FORCE_HOST;
+ val |= CFGCHIP2_OTGMODE_FORCE_HOST;
break;
case PHY_MODE_USB_DEVICE: /* Force VBUS valid, ID = 1 */
- val = CFGCHIP2_OTGMODE_FORCE_DEVICE;
+ val |= CFGCHIP2_OTGMODE_FORCE_DEVICE;
break;
case PHY_MODE_USB_OTG: /* Don't override the VBUS/ID comparators */
- val = CFGCHIP2_OTGMODE_NO_OVERRIDE;
+ val |= CFGCHIP2_OTGMODE_NO_OVERRIDE |
+ CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
break;
default:
return -EINVAL;
}
- regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_OTGMODE_MASK,
- val);
+ regmap_write(d_phy->regmap, CFGCHIP(2), val);
return 0;
}
--
2.7.3
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| From | David Lechner <david@lechnology.com> |
|---|---|
| Date | 2016-10-25 21:20 +0200 |
| Subject | Re: [PATCH 2/3] phy: da8xx-usb: Configure CFGCHIP2 to support OTG workaround |
| Message-ID | <swfqq-1ly-9@gated-at.bofh.it> |
| In reply to | #1508311 |
On 10/25/2016 08:52 AM, Alexandre Bailon wrote:
> If we configure the da8xx OTG phy in OTG mode, neither device or host
> mode will work. That is because the PHY is not able to detect and notify
> the driver that value of ID pin changed.
> To work despite this hardware limitation, the da8xx glue implement a
> workaround.
> But to work, the workaround require the VBUS sense and the session end
> comparator to enabled.
> Enable them if the phy is configured in OTG mode.
>
> Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
> ---
> drivers/phy/phy-da8xx-usb.c | 17 ++++++++++++-----
> 1 file changed, 12 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/phy/phy-da8xx-usb.c b/drivers/phy/phy-da8xx-usb.c
> index 32ae78c..fd39292 100644
> --- a/drivers/phy/phy-da8xx-usb.c
> +++ b/drivers/phy/phy-da8xx-usb.c
> @@ -93,24 +93,31 @@ static int da8xx_usb20_phy_power_off(struct phy *phy)
> static int da8xx_usb20_phy_set_mode(struct phy *phy, enum phy_mode mode)
> {
> struct da8xx_usb_phy *d_phy = phy_get_drvdata(phy);
> + int ret;
> u32 val;
>
> + ret = regmap_read(d_phy->regmap, CFGCHIP(2), &val);
> + if (ret)
> + return ret;
> +
> + val &= ~CFGCHIP2_OTGMODE_MASK;
> +
> switch (mode) {
> case PHY_MODE_USB_HOST: /* Force VBUS valid, ID = 0 */
> - val = CFGCHIP2_OTGMODE_FORCE_HOST;
> + val |= CFGCHIP2_OTGMODE_FORCE_HOST;
> break;
> case PHY_MODE_USB_DEVICE: /* Force VBUS valid, ID = 1 */
> - val = CFGCHIP2_OTGMODE_FORCE_DEVICE;
> + val |= CFGCHIP2_OTGMODE_FORCE_DEVICE;
> break;
> case PHY_MODE_USB_OTG: /* Don't override the VBUS/ID comparators */
> - val = CFGCHIP2_OTGMODE_NO_OVERRIDE;
> + val |= CFGCHIP2_OTGMODE_NO_OVERRIDE |
> + CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
Do we need to clear CFGCHIP2_SESENDEN and/or CFGCHIP2_VBDTCTEN in case
PHY_MODE_USB_HOST: or case PHY_MODE_USB_DEVICE:? Or are they ignored in
those modes?
> break;
> default:
> return -EINVAL;
> }
>
> - regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_OTGMODE_MASK,
> - val);
> + regmap_write(d_phy->regmap, CFGCHIP(2), val);
>
> return 0;
> }
>
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| From | Alexandre Bailon <abailon@baylibre.com> |
|---|---|
| Date | 2016-10-26 11:30 +0200 |
| Subject | Re: [PATCH 2/3] phy: da8xx-usb: Configure CFGCHIP2 to support OTG workaround |
| Message-ID | <swsGZ-1Ia-1@gated-at.bofh.it> |
| In reply to | #1508566 |
On 10/25/2016 09:16 PM, David Lechner wrote:
> On 10/25/2016 08:52 AM, Alexandre Bailon wrote:
>> If we configure the da8xx OTG phy in OTG mode, neither device or host
>> mode will work. That is because the PHY is not able to detect and notify
>> the driver that value of ID pin changed.
>> To work despite this hardware limitation, the da8xx glue implement a
>> workaround.
>> But to work, the workaround require the VBUS sense and the session end
>> comparator to enabled.
>> Enable them if the phy is configured in OTG mode.
>>
>> Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
>> ---
>> drivers/phy/phy-da8xx-usb.c | 17 ++++++++++++-----
>> 1 file changed, 12 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/phy/phy-da8xx-usb.c b/drivers/phy/phy-da8xx-usb.c
>> index 32ae78c..fd39292 100644
>> --- a/drivers/phy/phy-da8xx-usb.c
>> +++ b/drivers/phy/phy-da8xx-usb.c
>> @@ -93,24 +93,31 @@ static int da8xx_usb20_phy_power_off(struct phy *phy)
>> static int da8xx_usb20_phy_set_mode(struct phy *phy, enum phy_mode mode)
>> {
>> struct da8xx_usb_phy *d_phy = phy_get_drvdata(phy);
>> + int ret;
>> u32 val;
>>
>> + ret = regmap_read(d_phy->regmap, CFGCHIP(2), &val);
>> + if (ret)
>> + return ret;
>> +
>> + val &= ~CFGCHIP2_OTGMODE_MASK;
>> +
>> switch (mode) {
>> case PHY_MODE_USB_HOST: /* Force VBUS valid, ID = 0 */
>> - val = CFGCHIP2_OTGMODE_FORCE_HOST;
>> + val |= CFGCHIP2_OTGMODE_FORCE_HOST;
>> break;
>> case PHY_MODE_USB_DEVICE: /* Force VBUS valid, ID = 1 */
>> - val = CFGCHIP2_OTGMODE_FORCE_DEVICE;
>> + val |= CFGCHIP2_OTGMODE_FORCE_DEVICE;
>> break;
>> case PHY_MODE_USB_OTG: /* Don't override the VBUS/ID
>> comparators */
>> - val = CFGCHIP2_OTGMODE_NO_OVERRIDE;
>> + val |= CFGCHIP2_OTGMODE_NO_OVERRIDE |
>> + CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
>
> Do we need to clear CFGCHIP2_SESENDEN and/or CFGCHIP2_VBDTCTEN in case
> PHY_MODE_USB_HOST: or case PHY_MODE_USB_DEVICE:? Or are they ignored in
> those modes?
Actually, I don't know. The datasheet is quite confusing.
The "USB PHY Initialization" section seems to speak only about OTG mode.
But my observation let me think they are ignored when the phy is forced
in device or host mode.
>
>> break;
>> default:
>> return -EINVAL;
>> }
>>
>> - regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_OTGMODE_MASK,
>> - val);
>> + regmap_write(d_phy->regmap, CFGCHIP(2), val);
>>
>> return 0;
>> }
>>
>
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