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Groups > linux.kernel > #1506163 > unrolled thread

[PATCH 1/2] net: phy: broadcom: Update Auxiliary Control Register macros

Started byXo Wang <xow@google.com>
First post2016-10-21 19:30 +0200
Last post2016-10-22 02:50 +0200
Articles 3 — 3 participants

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  [PATCH 1/2] net: phy: broadcom: Update Auxiliary Control Register macros Xo Wang <xow@google.com> - 2016-10-21 19:30 +0200
    Re: [PATCH 1/2] net: phy: broadcom: Update Auxiliary Control Register  macros Florian Fainelli <f.fainelli@gmail.com> - 2016-10-21 23:30 +0200
    Re: [PATCH 1/2] net: phy: broadcom: Update Auxiliary Control Register macros Joel Stanley <joel@jms.id.au> - 2016-10-22 02:50 +0200

#1506163 — [PATCH 1/2] net: phy: broadcom: Update Auxiliary Control Register macros

FromXo Wang <xow@google.com>
Date2016-10-21 19:30 +0200
Subject[PATCH 1/2] net: phy: broadcom: Update Auxiliary Control Register macros
Message-ID<suLNL-hj-9@gated-at.bofh.it>
Add the RXD-to-RXC skew (delay) time bit in the Miscellaneous Control
shadow register and a mask for the shadow selector field.

Remove a re-definition of MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL.

Signed-off-by: Xo Wang <xow@google.com>
---
 include/linux/brcmphy.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/linux/brcmphy.h b/include/linux/brcmphy.h
index e3354b7..22c4421 100644
--- a/include/linux/brcmphy.h
+++ b/include/linux/brcmphy.h
@@ -105,11 +105,12 @@
 #define MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA	0x0800
 
 #define MII_BCM54XX_AUXCTL_MISC_WREN	0x8000
+#define MII_BCM54XX_AUXCTL_MISC_RXD_RXC_SKEW	0x0100
 #define MII_BCM54XX_AUXCTL_MISC_FORCE_AMDIX	0x0200
 #define MII_BCM54XX_AUXCTL_MISC_RDSEL_MISC	0x7000
 #define MII_BCM54XX_AUXCTL_SHDWSEL_MISC	0x0007
 
-#define MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL	0x0000
+#define MII_BCM54XX_AUXCTL_SHDWSEL_MASK	0x0007
 
 /*
  * Broadcom LED source encodings.  These are used in BCM5461, BCM5481,
-- 
2.8.0.rc3.226.g39d4020

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#1506311 — Re: [PATCH 1/2] net: phy: broadcom: Update Auxiliary Control Register macros

FromFlorian Fainelli <f.fainelli@gmail.com>
Date2016-10-21 23:30 +0200
SubjectRe: [PATCH 1/2] net: phy: broadcom: Update Auxiliary Control Register macros
Message-ID<suPy2-2Jv-33@gated-at.bofh.it>
In reply to#1506163
On 10/21/2016 10:20 AM, Xo Wang wrote:
> Add the RXD-to-RXC skew (delay) time bit in the Miscellaneous Control
> shadow register and a mask for the shadow selector field.
> 
> Remove a re-definition of MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL.
> 
> Signed-off-by: Xo Wang <xow@google.com>

Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-- 
Florian

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#1506364

FromJoel Stanley <joel@jms.id.au>
Date2016-10-22 02:50 +0200
Message-ID<suSFz-4FL-5@gated-at.bofh.it>
In reply to#1506163
On Sat, Oct 22, 2016 at 3:50 AM, Xo Wang <xow@google.com> wrote:
> Add the RXD-to-RXC skew (delay) time bit in the Miscellaneous Control
> shadow register and a mask for the shadow selector field.
>
> Remove a re-definition of MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL.
>
> Signed-off-by: Xo Wang <xow@google.com>

Reviewed-by: Joel Stanley <joel@jms.id.au>

Cheers,

Joel

> ---
>  include/linux/brcmphy.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

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