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Groups > linux.kernel > #1501916 > unrolled thread

[PATCH 0/6] ARM: sun5i: chip: Misc improvements

Started byMaxime Ripard <maxime.ripard@free-electrons.com>
First post2016-10-17 14:10 +0200
Last post2016-10-21 18:00 +0200
Articles 7 — 2 participants

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  [PATCH 0/6] ARM: sun5i: chip: Misc improvements Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-10-17 14:10 +0200
    [PATCH 3/6] ARM: sun5i: Rename A10s pins Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-10-17 14:10 +0200
      Re: [PATCH 3/6] ARM: sun5i: Rename A10s pins Chen-Yu Tsai <wens@csie.org> - 2016-10-21 05:00 +0200
    [PATCH 5/6] ARM: sun5i: Add RGB 565 LCD pins Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-10-17 14:10 +0200
      Re: [PATCH 5/6] ARM: sun5i: Add RGB 565 LCD pins Chen-Yu Tsai <wens@csie.org> - 2016-10-21 05:00 +0200
    Re: [PATCH 0/6] ARM: sun5i: chip: Misc improvements Chen-Yu Tsai <wens@csie.org> - 2016-10-21 05:10 +0200
      Re: [PATCH 0/6] ARM: sun5i: chip: Misc improvements Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-10-21 18:00 +0200

#1501916 — [PATCH 0/6] ARM: sun5i: chip: Misc improvements

FromMaxime Ripard <maxime.ripard@free-electrons.com>
Date2016-10-17 14:10 +0200
Subject[PATCH 0/6] ARM: sun5i: chip: Misc improvements
Message-ID<steKd-2XK-17@gated-at.bofh.it>
Hi,

This is a bunch of patches I gathered for the CHIP, that enables a few
things, like the WiFi regulators (and its associated power sequence), a few
optional buses, etc.

Let me know what you think,
Maxime

Antoine Tenart (1):
  ARM: sun5i: chip: add a node for the w1 gpio controller

Maxime Ripard (5):
  ARM: sun5i: chip: Enable Wi-Fi SDIO chip
  ARM: sun5i: Rename A10s pins
  ARM: sun5i: Add SPI2 pins
  ARM: sun5i: Add RGB 565 LCD pins
  ARM: sun5i: chip: Add optional buses

 arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts |  4 +-
 arch/arm/boot/dts/sun5i-a10s.dtsi                |  4 +-
 arch/arm/boot/dts/sun5i-r8-chip.dts              | 69 +++++++++++++++++-
 arch/arm/boot/dts/sun5i.dtsi                     | 24 ++++++-
 4 files changed, 97 insertions(+), 4 deletions(-)

-- 
git-series 0.8.10

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#1501917 — [PATCH 3/6] ARM: sun5i: Rename A10s pins

FromMaxime Ripard <maxime.ripard@free-electrons.com>
Date2016-10-17 14:10 +0200
Subject[PATCH 3/6] ARM: sun5i: Rename A10s pins
Message-ID<steTT-3gZ-11@gated-at.bofh.it>
In reply to#1501916
The SPI2 pins on the sun5i PB bank are only available on the A10s. Rename
the A10s only bank so that it doesn't confuse people on the other SoCs
whose indexing would start at b.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 4 ++--
 arch/arm/boot/dts/sun5i-a10s.dtsi                | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
index aef91476f9ae..0684d7930d65 100644
--- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
@@ -250,8 +250,8 @@
 
 &spi2 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&spi2_pins_a>,
-		    <&spi2_cs0_pins_a>;
+	pinctrl-0 = <&spi2_pins_b>,
+		    <&spi2_cs0_pins_b>;
 	status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index c41a2ba34dde..7aa8c7aa0153 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -243,14 +243,14 @@
 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 	};
 
-	spi2_pins_a: spi2@0 {
+	spi2_pins_b: spi2@1 {
 		allwinner,pins = "PB12", "PB13", "PB14";
 		allwinner,function = "spi2";
 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 	};
 
-	spi2_cs0_pins_a: spi2_cs0@0 {
+	spi2_cs0_pins_b: spi2_cs0@1 {
 		allwinner,pins = "PB11";
 		allwinner,function = "spi2";
 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-- 
git-series 0.8.10

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#1505425 — Re: [PATCH 3/6] ARM: sun5i: Rename A10s pins

FromChen-Yu Tsai <wens@csie.org>
Date2016-10-21 05:00 +0200
SubjectRe: [PATCH 3/6] ARM: sun5i: Rename A10s pins
Message-ID<suydP-7Zt-5@gated-at.bofh.it>
In reply to#1501917
On Mon, Oct 17, 2016 at 7:49 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> The SPI2 pins on the sun5i PB bank are only available on the A10s. Rename
> the A10s only bank so that it doesn't confuse people on the other SoCs
> whose indexing would start at b.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Acked-by: Chen-Yu Tsai <wens@csie.org>

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#1501919 — [PATCH 5/6] ARM: sun5i: Add RGB 565 LCD pins

FromMaxime Ripard <maxime.ripard@free-electrons.com>
Date2016-10-17 14:10 +0200
Subject[PATCH 5/6] ARM: sun5i: Add RGB 565 LCD pins
Message-ID<steTU-3gZ-21@gated-at.bofh.it>
In reply to#1501916
Some boards use the LCD in RGB565. Enable the pin muxing option.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 arch/arm/boot/dts/sun5i.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index 245cee14cf1d..b4ccee8cfb02 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -574,6 +574,16 @@
 				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 			};
 
+			lcd_rgb565_pins: lcd_rgb565@0 {
+				allwinner,pins = "PD3", "PD4", "PD5", "PD6", "PD7",
+						 "PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
+						 "PD19", "PD20", "PD21", "PD22", "PD23",
+						 "PD24", "PD25", "PD26", "PD27";
+				allwinner,function = "lcd0";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
 			mmc0_pins_a: mmc0@0 {
 				allwinner,pins = "PF0", "PF1", "PF2", "PF3",
 						 "PF4", "PF5";
-- 
git-series 0.8.10

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#1505423 — Re: [PATCH 5/6] ARM: sun5i: Add RGB 565 LCD pins

FromChen-Yu Tsai <wens@csie.org>
Date2016-10-21 05:00 +0200
SubjectRe: [PATCH 5/6] ARM: sun5i: Add RGB 565 LCD pins
Message-ID<suydP-7Zt-3@gated-at.bofh.it>
In reply to#1501919
On Mon, Oct 17, 2016 at 7:49 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Some boards use the LCD in RGB565. Enable the pin muxing option.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Acked-by: Chen-Yu Tsai <wens@csie.org>

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#1505427

FromChen-Yu Tsai <wens@csie.org>
Date2016-10-21 05:10 +0200
Message-ID<suynw-8hS-1@gated-at.bofh.it>
In reply to#1501916
On Mon, Oct 17, 2016 at 7:48 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Hi,
>
> This is a bunch of patches I gathered for the CHIP, that enables a few
> things, like the WiFi regulators (and its associated power sequence), a few
> optional buses, etc.

FYI this series makes more sense if you mention the Pocket CHIP DT overlays.

ChenYu

>
> Let me know what you think,
> Maxime
>
> Antoine Tenart (1):
>   ARM: sun5i: chip: add a node for the w1 gpio controller
>
> Maxime Ripard (5):
>   ARM: sun5i: chip: Enable Wi-Fi SDIO chip
>   ARM: sun5i: Rename A10s pins
>   ARM: sun5i: Add SPI2 pins
>   ARM: sun5i: Add RGB 565 LCD pins
>   ARM: sun5i: chip: Add optional buses
>
>  arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts |  4 +-
>  arch/arm/boot/dts/sun5i-a10s.dtsi                |  4 +-
>  arch/arm/boot/dts/sun5i-r8-chip.dts              | 69 +++++++++++++++++-
>  arch/arm/boot/dts/sun5i.dtsi                     | 24 ++++++-
>  4 files changed, 97 insertions(+), 4 deletions(-)
>
> --
> git-series 0.8.10

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#1506110

FromMaxime Ripard <maxime.ripard@free-electrons.com>
Date2016-10-21 18:00 +0200
Message-ID<suKoG-7Ei-21@gated-at.bofh.it>
In reply to#1505427

[Multipart message — attachments visible in raw view] — view raw

On Fri, Oct 21, 2016 at 11:02:23AM +0800, Chen-Yu Tsai wrote:
> On Mon, Oct 17, 2016 at 7:48 PM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > Hi,
> >
> > This is a bunch of patches I gathered for the CHIP, that enables a few
> > things, like the WiFi regulators (and its associated power sequence), a few
> > optional buses, etc.

Applied all with your Acked-by

> FYI this series makes more sense if you mention the Pocket CHIP DT overlays.

Not really, most of these patches are for the CHIP itself. The Pocket
CHIP, just like all the other DIPs so far, uses the LCD pins, but
that's pretty much the only DIP-specific patch there.

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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