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| Started by | Robert Jarzmik <robert.jarzmik@free.fr> |
|---|---|
| First post | 2016-10-15 22:10 +0200 |
| Last post | 2016-10-19 18:10 +0200 |
| Articles | 4 — 2 participants |
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[PATCH v2 2/4] ARM: dts: pxa: add pxa25x cpu operating points Robert Jarzmik <robert.jarzmik@free.fr> - 2016-10-15 22:10 +0200
Re: [PATCH v2 2/4] ARM: dts: pxa: add pxa25x cpu operating points Viresh Kumar <viresh.kumar@linaro.org> - 2016-10-18 13:50 +0200
Re: [PATCH v2 2/4] ARM: dts: pxa: add pxa25x cpu operating points Robert Jarzmik <robert.jarzmik@free.fr> - 2016-10-18 17:40 +0200
Re: [PATCH v2 2/4] ARM: dts: pxa: add pxa25x cpu operating points Viresh Kumar <viresh.kumar@linaro.org> - 2016-10-19 18:10 +0200
| From | Robert Jarzmik <robert.jarzmik@free.fr> |
|---|---|
| Date | 2016-10-15 22:10 +0200 |
| Subject | [PATCH v2 2/4] ARM: dts: pxa: add pxa25x cpu operating points |
| Message-ID | <ssDrk-45V-15@gated-at.bofh.it> |
Add the relevant data taken from the PXA 25x Electrical, Mechanical, and
Thermal Specfication. This will be input data for cpufreq-dt driver.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
---
arch/arm/boot/dts/pxa25x.dtsi | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/pxa25x.dtsi b/arch/arm/boot/dts/pxa25x.dtsi
index 0d1e012178c4..16b4e8bad4a5 100644
--- a/arch/arm/boot/dts/pxa25x.dtsi
+++ b/arch/arm/boot/dts/pxa25x.dtsi
@@ -89,4 +89,29 @@
clocks = <&clktimer>;
status = "okay";
};
+
+ pxa250_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+
+ opp@99500 {
+ opp-hz = /bits/ 64 <99532800>;
+ opp-microvolt = <950000 1000000 1650000>;
+ clock-latency-ns = <20>;
+ };
+ opp@199100 {
+ opp-hz = /bits/ 64 <199065600>;
+ opp-microvolt = <1000000 950000 1650000>;
+ clock-latency-ns = <20>;
+ };
+ opp@298600 {
+ opp-hz = /bits/ 64 <298598400>;
+ opp-microvolt = <1100000 1045000 1650000>;
+ clock-latency-ns = <20>;
+ };
+ opp@398100 {
+ opp-hz = /bits/ 64 <398131200>;
+ opp-microvolt = <1300000 1235000 1650000>;
+ clock-latency-ns = <20>;
+ };
+ };
};
--
2.1.4
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| From | Viresh Kumar <viresh.kumar@linaro.org> |
|---|---|
| Date | 2016-10-18 13:50 +0200 |
| Message-ID | <stB45-13O-13@gated-at.bofh.it> |
| In reply to | #1501356 |
On 15-10-16, 21:57, Robert Jarzmik wrote:
> Add the relevant data taken from the PXA 25x Electrical, Mechanical, and
> Thermal Specfication. This will be input data for cpufreq-dt driver.
>
> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
> ---
> arch/arm/boot/dts/pxa25x.dtsi | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm/boot/dts/pxa25x.dtsi b/arch/arm/boot/dts/pxa25x.dtsi
> index 0d1e012178c4..16b4e8bad4a5 100644
> --- a/arch/arm/boot/dts/pxa25x.dtsi
> +++ b/arch/arm/boot/dts/pxa25x.dtsi
> @@ -89,4 +89,29 @@
> clocks = <&clktimer>;
> status = "okay";
> };
> +
> + pxa250_opp_table: opp_table0 {
> + compatible = "operating-points-v2";
> +
> + opp@99500 {
We have been keeping the values in ^^^ same as the values present
below. Any specific reason for making it different here ?
> + opp-hz = /bits/ 64 <99532800>;
> + opp-microvolt = <950000 1000000 1650000>;
> + clock-latency-ns = <20>;
> + };
> + opp@199100 {
> + opp-hz = /bits/ 64 <199065600>;
> + opp-microvolt = <1000000 950000 1650000>;
> + clock-latency-ns = <20>;
> + };
> + opp@298600 {
> + opp-hz = /bits/ 64 <298598400>;
> + opp-microvolt = <1100000 1045000 1650000>;
> + clock-latency-ns = <20>;
> + };
> + opp@398100 {
> + opp-hz = /bits/ 64 <398131200>;
> + opp-microvolt = <1300000 1235000 1650000>;
> + clock-latency-ns = <20>;
> + };
> + };
> };
> --
> 2.1.4
--
viresh
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| From | Robert Jarzmik <robert.jarzmik@free.fr> |
|---|---|
| Date | 2016-10-18 17:40 +0200 |
| Message-ID | <stEEG-3BE-65@gated-at.bofh.it> |
| In reply to | #1502931 |
Viresh Kumar <viresh.kumar@linaro.org> writes:
> On 15-10-16, 21:57, Robert Jarzmik wrote:
>> Add the relevant data taken from the PXA 25x Electrical, Mechanical, and
>> Thermal Specfication. This will be input data for cpufreq-dt driver.
>>
>> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
>> ---
>> arch/arm/boot/dts/pxa25x.dtsi | 25 +++++++++++++++++++++++++
>> 1 file changed, 25 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/pxa25x.dtsi b/arch/arm/boot/dts/pxa25x.dtsi
>> index 0d1e012178c4..16b4e8bad4a5 100644
>> --- a/arch/arm/boot/dts/pxa25x.dtsi
>> +++ b/arch/arm/boot/dts/pxa25x.dtsi
>> @@ -89,4 +89,29 @@
>> clocks = <&clktimer>;
>> status = "okay";
>> };
>> +
>> + pxa250_opp_table: opp_table0 {
>> + compatible = "operating-points-v2";
>> +
>> + opp@99500 {
>
> We have been keeping the values in ^^^ same as the values present
> below. Any specific reason for making it different here ?
No, that's a good comment, I'll change that.
I wrote this incrementaly, first the node, then the opp-hz. Then I realized that
the source crystal, at 3.8684 MHz didn't provide a round 99.5 MHz core clock,
but a 99.5328 MHz clock.
Anyway, I'll change that ... let's say into opp@99533 in this case ?
--
Robert
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| From | Viresh Kumar <viresh.kumar@linaro.org> |
|---|---|
| Date | 2016-10-19 18:10 +0200 |
| Message-ID | <su1Bg-3zK-51@gated-at.bofh.it> |
| In reply to | #1503134 |
On 18-10-16, 17:30, Robert Jarzmik wrote:
> Viresh Kumar <viresh.kumar@linaro.org> writes:
>
> > On 15-10-16, 21:57, Robert Jarzmik wrote:
> >> Add the relevant data taken from the PXA 25x Electrical, Mechanical, and
> >> Thermal Specfication. This will be input data for cpufreq-dt driver.
> >>
> >> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
> >> ---
> >> arch/arm/boot/dts/pxa25x.dtsi | 25 +++++++++++++++++++++++++
> >> 1 file changed, 25 insertions(+)
> >>
> >> diff --git a/arch/arm/boot/dts/pxa25x.dtsi b/arch/arm/boot/dts/pxa25x.dtsi
> >> index 0d1e012178c4..16b4e8bad4a5 100644
> >> --- a/arch/arm/boot/dts/pxa25x.dtsi
> >> +++ b/arch/arm/boot/dts/pxa25x.dtsi
> >> @@ -89,4 +89,29 @@
> >> clocks = <&clktimer>;
> >> status = "okay";
> >> };
> >> +
> >> + pxa250_opp_table: opp_table0 {
> >> + compatible = "operating-points-v2";
> >> +
> >> + opp@99500 {
> >
> > We have been keeping the values in ^^^ same as the values present
> > below. Any specific reason for making it different here ?
> No, that's a good comment, I'll change that.
>
> I wrote this incrementaly, first the node, then the opp-hz. Then I realized that
> the source crystal, at 3.8684 MHz didn't provide a round 99.5 MHz core clock,
> but a 99.5328 MHz clock.
>
> Anyway, I'll change that ... let's say into opp@99533 in this case ?
Just write the whole value 99532800.
--
viresh
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