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| Started by | Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com> |
|---|---|
| First post | 2016-10-12 14:20 +0200 |
| Last post | 2016-10-12 16:00 +0200 |
| Articles | 3 — 2 participants |
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[PATCH v2 3/4] Add hwcap2 for x86 Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com> - 2016-10-12 14:20 +0200
Re: [PATCH v2 3/4] Add hwcap2 for x86 Thomas Gleixner <tglx@linutronix.de> - 2016-10-12 15:50 +0200
Re: [PATCH v2 3/4] Add hwcap2 for x86 Thomas Gleixner <tglx@linutronix.de> - 2016-10-12 16:00 +0200
| From | Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com> |
|---|---|
| Date | 2016-10-12 14:20 +0200 |
| Subject | [PATCH v2 3/4] Add hwcap2 for x86 |
| Message-ID | <srqFP-4gb-3@gated-at.bofh.it> |
Add hwcap2 attribute for x86.
Reserve 1st bit of HWCAP2 for exposing Xeon Phi ring 3 monitor/mwait.
With this userspace apps can detect Ring 3 MONITOR/MWAIT instructions.
Change-Id: I37d0354d1e2b9594d7feebc2bacda30b68163efe
Signed-off-by: Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com>
---
arch/x86/include/asm/elf.h | 7 +++++++
arch/x86/include/uapi/asm/hwcap.h | 7 +++++++
arch/x86/kernel/cpu/common.c | 3 +++
3 files changed, 17 insertions(+)
create mode 100644 arch/x86/include/uapi/asm/hwcap.h
diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h
index e7f155c..a3f7856 100644
--- a/arch/x86/include/asm/elf.h
+++ b/arch/x86/include/asm/elf.h
@@ -258,6 +258,13 @@ extern int force_personality32;
#define ELF_HWCAP (boot_cpu_data.x86_capability[CPUID_1_EDX])
+extern unsigned int elf_hwcap2;
+
+/* HWCAP2 supplies kernel enabled CPU feature, so that the application
+ can know that it can safely use them. The bits are defined in
+ uapi/asm/hwcap.h. */
+#define ELF_HWCAP2 elf_hwcap2
+
/* This yields a string that ld.so will use to load implementation
specific libraries for optimization. This is more specific in
intent than poking at uname or /proc/cpuinfo.
diff --git a/arch/x86/include/uapi/asm/hwcap.h b/arch/x86/include/uapi/asm/hwcap.h
new file mode 100644
index 0000000..d1f4f98
--- /dev/null
+++ b/arch/x86/include/uapi/asm/hwcap.h
@@ -0,0 +1,7 @@
+#ifndef _ASM_HWCAP_H
+#define _ASM_HWCAP_H 1
+
+/* Kernel enabled Ring 3 MWAIT for Xeon Phi*/
+#define HWCAP2_PHIR3MWAIT (1 << 0)
+/* upto bit 31 free */
+#endif
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index bcc9ccc..93ffaa5 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -35,6 +35,7 @@
#include <asm/desc.h>
#include <asm/fpu/internal.h>
#include <asm/mtrr.h>
+#include <asm/hwcap.h>
#include <linux/numa.h>
#include <asm/asm.h>
#include <asm/bugs.h>
@@ -51,6 +52,8 @@
#include "cpu.h"
+unsigned elf_hwcap2 __read_mostly;
+
/* all of these masks are initialized in setup_cpu_local_masks() */
cpumask_var_t cpu_initialized_mask;
cpumask_var_t cpu_callout_mask;
--
2.5.1
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| From | Thomas Gleixner <tglx@linutronix.de> |
|---|---|
| Date | 2016-10-12 15:50 +0200 |
| Message-ID | <srs4W-56s-17@gated-at.bofh.it> |
| In reply to | #1499503 |
On Wed, 12 Oct 2016, Grzegorz Andrejczuk wrote: > +/* HWCAP2 supplies kernel enabled CPU feature, so that the application > + can know that it can safely use them. The bits are defined in > + uapi/asm/hwcap.h. */ Please read: http://lkml.iu.edu/hypermail/linux/kernel/1607.1/00627.html
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| From | Thomas Gleixner <tglx@linutronix.de> |
|---|---|
| Date | 2016-10-12 16:00 +0200 |
| Message-ID | <srseC-5aq-21@gated-at.bofh.it> |
| In reply to | #1499503 |
On Wed, 12 Oct 2016, Grzegorz Andrejczuk wrote: > +extern unsigned int elf_hwcap2; > +unsigned elf_hwcap2 __read_mostly; Oh well. Getting two lines straight is hard, right? Thanks, tglx
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