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| Started by | Joe Perches <joe@perches.com> |
|---|---|
| First post | 2016-09-20 22:10 +0200 |
| Last post | 2016-09-21 08:50 +0200 |
| Articles | 4 — 2 participants |
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iomux-mx3.h: possible macro precedence issue Joe Perches <joe@perches.com> - 2016-09-20 22:10 +0200
Re: iomux-mx3.h: possible macro precedence issue Uwe Kleine-König <u.kleine-koenig@pengutronix.de> - 2016-09-21 08:10 +0200
Re: iomux-mx3.h: possible macro precedence issue Joe Perches <joe@perches.com> - 2016-09-21 08:20 +0200
Re: iomux-mx3.h: possible macro precedence issue Uwe Kleine-König <u.kleine-koenig@pengutronix.de> - 2016-09-21 08:50 +0200
| From | Joe Perches <joe@perches.com> |
|---|---|
| Date | 2016-09-20 22:10 +0200 |
| Subject | iomux-mx3.h: possible macro precedence issue |
| Message-ID | <sjzwC-7F4-33@gated-at.bofh.it> |
Julia Lawall wrote a script
Link: http://lkml.kernel.org/r/alpine.DEB.2.10.1609201503260.2914@hadrien
that found a possible issue with macro argument precedence.
diff -u -p a/arch/arm/mach-imx/iomux-mx3.h b/arch/arm/mach-imx/iomux-mx3.h
--- a/arch/arm/mach-imx/iomux-mx3.h
+++ b/arch/arm/mach-imx/iomux-mx3.h
@@ -529,7 +529,7 @@ enum iomux_pins {
#define MX31_PIN_DCD_DTE1__DCD_DTE2 IOMUX_MODE(MX31_PIN_DCD_DTE1, IOMUX_CONFIG_ALT1)
#define MX31_PIN_RI_DTE1__RI_DTE2 IOMUX_MODE(MX31_PIN_RI_DTE1, IOMUX_CONFIG_ALT1)
#define MX31_PIN_DSR_DTE1__DSR_DTE2 IOMUX_MODE(MX31_PIN_DSR_DTE1, IOMUX_CONFIG_ALT1)
-#define MX31_PIN_DTR_DTE1__DTR_DTE2 IOMUX_MODE(MX31_PIN_DTR_DTE1, IOMUX_OCONFIG_ALT3 | IOMUX_ICONFIG_NONE)
+#define MX31_PIN_DTR_DTE1__DTR_DTE2 IOMUX_MODE(MX31_PIN_DTR_DTE1, (IOMUX_OCONFIG_ALT3 | IOMUX_ICONFIG_NONE))
#define MX31_PIN_PC_RST__CTS5 IOMUX_MODE(MX31_PIN_PC_RST, IOMUX_CONFIG_ALT2)
#define MX31_PIN_PC_VS2__RTS5 IOMUX_MODE(MX31_PIN_PC_VS2, IOMUX_CONFIG_ALT2)
#define MX31_PIN_PC_BVD2__TXD5 IOMUX_MODE(MX31_PIN_PC_BVD2, IOMUX_CONFIG_ALT2)
this may be intentional, but perhaps a solution
would be to use parentheses in the #define IOMUX_MODE
---
diff --git a/arch/arm/mach-imx/iomux-mx3.h b/arch/arm/mach-imx/iomux-mx3.h
index 368667b..3f9ede2 100644
--- a/arch/arm/mach-imx/iomux-mx3.h
+++ b/arch/arm/mach-imx/iomux-mx3.h
@@ -156,7 +156,7 @@ void mxc_iomux_mode(unsigned int pin_mode);
(((gpionum << IOMUX_GPIONUM_SHIFT) & IOMUX_GPIONUM_MASK) | \
(padnum & IOMUX_PADNUM_MASK))
-#define IOMUX_MODE(pin, mode) (pin | mode << IOMUX_MODE_SHIFT)
+#define IOMUX_MODE(pin, mode) ((pin) | ((mode) << IOMUX_MODE_SHIFT))
#define IOMUX_TO_GPIO(iomux_pin) \
((iomux_pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT)
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| From | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
|---|---|
| Date | 2016-09-21 08:10 +0200 |
| Message-ID | <sjITg-5i1-9@gated-at.bofh.it> |
| In reply to | #1487591 |
Cc += Shawn
Hello,
On Tue, Sep 20, 2016 at 01:02:24PM -0700, Joe Perches wrote:
> Julia Lawall wrote a script
>
> Link: http://lkml.kernel.org/r/alpine.DEB.2.10.1609201503260.2914@hadrien
>
> that found a possible issue with macro argument precedence.
>
>
> diff -u -p a/arch/arm/mach-imx/iomux-mx3.h b/arch/arm/mach-imx/iomux-mx3.h
> --- a/arch/arm/mach-imx/iomux-mx3.h
> +++ b/arch/arm/mach-imx/iomux-mx3.h
> @@ -529,7 +529,7 @@ enum iomux_pins {
> #define MX31_PIN_DCD_DTE1__DCD_DTE2 IOMUX_MODE(MX31_PIN_DCD_DTE1, IOMUX_CONFIG_ALT1)
> #define MX31_PIN_RI_DTE1__RI_DTE2 IOMUX_MODE(MX31_PIN_RI_DTE1, IOMUX_CONFIG_ALT1)
> #define MX31_PIN_DSR_DTE1__DSR_DTE2 IOMUX_MODE(MX31_PIN_DSR_DTE1, IOMUX_CONFIG_ALT1)
> -#define MX31_PIN_DTR_DTE1__DTR_DTE2 IOMUX_MODE(MX31_PIN_DTR_DTE1, IOMUX_OCONFIG_ALT3 | IOMUX_ICONFIG_NONE)
> +#define MX31_PIN_DTR_DTE1__DTR_DTE2 IOMUX_MODE(MX31_PIN_DTR_DTE1, (IOMUX_OCONFIG_ALT3 | IOMUX_ICONFIG_NONE))
> #define MX31_PIN_PC_RST__CTS5 IOMUX_MODE(MX31_PIN_PC_RST, IOMUX_CONFIG_ALT2)
> #define MX31_PIN_PC_VS2__RTS5 IOMUX_MODE(MX31_PIN_PC_VS2, IOMUX_CONFIG_ALT2)
> #define MX31_PIN_PC_BVD2__TXD5 IOMUX_MODE(MX31_PIN_PC_BVD2, IOMUX_CONFIG_ALT2)
I assume this is the only problematic definition? If so, there is a
single affected platform: arch/arm/mach-imx/mach-kzm_arm11_01.c
> this may be intentional, but perhaps a solution
> would be to use parentheses in the #define IOMUX_MODE
>
> ---
>
> diff --git a/arch/arm/mach-imx/iomux-mx3.h b/arch/arm/mach-imx/iomux-mx3.h
> index 368667b..3f9ede2 100644
> --- a/arch/arm/mach-imx/iomux-mx3.h
> +++ b/arch/arm/mach-imx/iomux-mx3.h
> @@ -156,7 +156,7 @@ void mxc_iomux_mode(unsigned int pin_mode);
> (((gpionum << IOMUX_GPIONUM_SHIFT) & IOMUX_GPIONUM_MASK) | \
> (padnum & IOMUX_PADNUM_MASK))
>
> -#define IOMUX_MODE(pin, mode) (pin | mode << IOMUX_MODE_SHIFT)
> +#define IOMUX_MODE(pin, mode) ((pin) | ((mode) << IOMUX_MODE_SHIFT))
>
> #define IOMUX_TO_GPIO(iomux_pin) \
> ((iomux_pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT)
My preference is to fix IOMUX_MODE instead of adding the parents to
MX31_PIN_DTR_DTE1__DTR_DTE2.
Joe, do you create a proper patch?
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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| From | Joe Perches <joe@perches.com> |
|---|---|
| Date | 2016-09-21 08:20 +0200 |
| Message-ID | <sjJ2V-5pe-1@gated-at.bofh.it> |
| In reply to | #1487827 |
On Wed, 2016-09-21 at 08:06 +0200, Uwe Kleine-König wrote:\
> On Tue, Sep 20, 2016 at 01:02:24PM -0700, Joe Perches wrote:
> > Julia Lawall wrote a script
> >
> > Link: http://lkml.kernel.org/r/alpine.DEB.2.10.1609201503260.2914@hadrien
> >
> > that found a possible issue with macro argument precedence.
> >
> >
> > diff -u -p a/arch/arm/mach-imx/iomux-mx3.h b/arch/arm/mach-imx/iomux-mx3.h
> > --- a/arch/arm/mach-imx/iomux-mx3.h
> > +++ b/arch/arm/mach-imx/iomux-mx3.h
> > @@ -529,7 +529,7 @@ enum iomux_pins {
> > #define MX31_PIN_DCD_DTE1__DCD_DTE2 IOMUX_MODE(MX31_PIN_DCD_DTE1, IOMUX_CONFIG_ALT1)
> > #define MX31_PIN_RI_DTE1__RI_DTE2 IOMUX_MODE(MX31_PIN_RI_DTE1, IOMUX_CONFIG_ALT1)
> > #define MX31_PIN_DSR_DTE1__DSR_DTE2 IOMUX_MODE(MX31_PIN_DSR_DTE1, IOMUX_CONFIG_ALT1)
> > -#define MX31_PIN_DTR_DTE1__DTR_DTE2 IOMUX_MODE(MX31_PIN_DTR_DTE1, IOMUX_OCONFIG_ALT3 | IOMUX_ICONFIG_NONE)
> > +#define MX31_PIN_DTR_DTE1__DTR_DTE2 IOMUX_MODE(MX31_PIN_DTR_DTE1, (IOMUX_OCONFIG_ALT3 | IOMUX_ICONFIG_NONE))
> > #define MX31_PIN_PC_RST__CTS5 IOMUX_MODE(MX31_PIN_PC_RST, IOMUX_CONFIG_ALT2)
> > #define MX31_PIN_PC_VS2__RTS5 IOMUX_MODE(MX31_PIN_PC_VS2, IOMUX_CONFIG_ALT2)
> > #define MX31_PIN_PC_BVD2__TXD5 IOMUX_MODE(MX31_PIN_PC_BVD2, IOMUX_CONFIG_ALT2)
>
>
> I assume this is the only problematic definition?
yes..
> If so, there is a
> single affected platform: arch/arm/mach-imx/mach-kzm_arm11_01.c
>
> > this may be intentional, but perhaps a solution
> > would be to use parentheses in the #define IOMUX_MODE
> >
> > ---
> >
> > diff --git a/arch/arm/mach-imx/iomux-mx3.h b/arch/arm/mach-imx/iomux-mx3.h
> > index 368667b..3f9ede2 100644
> > --- a/arch/arm/mach-imx/iomux-mx3.h
> > +++ b/arch/arm/mach-imx/iomux-mx3.h
> > @@ -156,7 +156,7 @@ void mxc_iomux_mode(unsigned int pin_mode);
> > > > (((gpionum << IOMUX_GPIONUM_SHIFT) & IOMUX_GPIONUM_MASK) | \
> > > > (padnum & IOMUX_PADNUM_MASK))
> >
> > -#define IOMUX_MODE(pin, mode) (pin | mode << IOMUX_MODE_SHIFT)
> > +#define IOMUX_MODE(pin, mode) ((pin) | ((mode) << IOMUX_MODE_SHIFT))
> >
> > #define IOMUX_TO_GPIO(iomux_pin) \
> > ((iomux_pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT)
>
>
> My preference is to fix IOMUX_MODE instead of adding the parents to
> MX31_PIN_DTR_DTE1__DTR_DTE2.
Mine too.
> Joe, do you create a proper patch?
I just don't have the hardware and don't know what was intended
by the existing code. It does appear to be a defect though.
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| From | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
|---|---|
| Date | 2016-09-21 08:50 +0200 |
| Message-ID | <sjJvY-5z1-19@gated-at.bofh.it> |
| In reply to | #1487832 |
Hello Joe, On Tue, Sep 20, 2016 at 11:12:59PM -0700, Joe Perches wrote: > > > -#define MX31_PIN_DTR_DTE1__DTR_DTE2 IOMUX_MODE(MX31_PIN_DTR_DTE1, IOMUX_OCONFIG_ALT3 | IOMUX_ICONFIG_NONE) > > > +#define MX31_PIN_DTR_DTE1__DTR_DTE2 IOMUX_MODE(MX31_PIN_DTR_DTE1, (IOMUX_OCONFIG_ALT3 | IOMUX_ICONFIG_NONE)) > > > [...] > > > -#define IOMUX_MODE(pin, mode) (pin | mode << IOMUX_MODE_SHIFT) > > > +#define IOMUX_MODE(pin, mode) ((pin) | ((mode) << IOMUX_MODE_SHIFT)) > > > > Joe, do you create a proper patch? > > I just don't have the hardware and don't know what was intended > by the existing code. It does appear to be a defect though. I don't have that hardware either, but fixing this with just checking the hardware manual is good enough. The current definition makes MX31_PIN_DTR_DTE1__DTR_DTE2: MX31_PIN_DTR_DTE1__DTR_DTE2 = IOMUX_MODE(MX31_PIN_DTR_DTE1, IOMUX_OCONFIG_ALT3 | IOMUX_ICONFIG_NONE) = (MX31_PIN_DTR_DTE1 | IOMUX_OCONFIG_ALT3 | IOMUX_ICONFIG_NONE << IOMUX_MODE_SHIFT) = (IOMUX_PIN(44, 109) | (4 << 4) | 0 << 17) = (0x586d | 0x40) = 0x586d while the expected value is (MX31_PIN_DTR_DTE1 | (IOMUX_OCONFIG_ALT3 | IOMUX_ICONFIG_NONE) << IOMUX_MODE_SHIFT) = (IOMUX_PIN(44, 109) | ((4 << 4) | 0) << 17) = (0x586d | 0x800000) = 0x80586d The effect is that the input is routed nowhere (which is the case also with the issue fixed) and output is controlled by the GPIO module instead of the UART and so the pin doesn't operate as handshaking signal. (Assuming I interpreted everything correctly which I'm not sure given that I didn't touch i.MX31 for long and it's different that the other i.MX SoCs.) Best regards Uwe -- Pengutronix e.K. | Uwe Kleine-König | Industrial Linux Solutions | http://www.pengutronix.de/ |
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