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[RESEND PATCH 3/3] arm: dts: mt2701: Add node for Mediatek JPEG Decoder

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  [RESEND PATCH 3/3] arm: dts: mt2701: Add node for Mediatek JPEG Decoder Rick Chang <rick.chang@mediatek.com> - 2016-09-19 05:10 +0200

#1486107 — [RESEND PATCH 3/3] arm: dts: mt2701: Add node for Mediatek JPEG Decoder

Signed-off-by: Rick Chang <rick.chang@mediatek.com>
Signed-off-by: Minghsiu Tsai <minghsiu.tsai@mediatek.com>
---
This patch depends on: 
  CCF "arm: dts: mt2701: Add clock controller device nodes"[1]
  power domain patch "Mediatek MT2701 SCPSYS power domain support v7"[2]
  iommu and smi "Add the dtsi node of iommu and smi for mt2701"[3]

[1] https://patchwork.kernel.org/patch/9109081
[2] http://lists.infradead.org/pipermail/linux-mediatek/2016-May/005429.html
[3] https://patchwork.kernel.org/patch/9164013/
---
 arch/arm/boot/dts/mt2701.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index d550d36..a9838bd 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -284,6 +284,20 @@
 		power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
 	};
 
+	jpegdec: jpegdec@15004000 {
+		compatible = "mediatek,mt2701-jpgdec";
+		reg = <0 0x15004000 0 0x1000>;
+		interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
+		clocks =  <&imgsys CLK_IMG_JPGDEC_SMI>,
+			  <&imgsys CLK_IMG_JPGDEC>;
+		clock-names = "jpgdec-smi",
+			      "jpgdec";
+		power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
+		mediatek,larb = <&larb2>;
+		iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
+			 <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
+	};
+
 	vdecsys: syscon@16000000 {
 		compatible = "mediatek,mt2701-vdecsys", "syscon";
 		reg = <0 0x16000000 0 0x1000>;
-- 
1.9.1

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