Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1480968 > unrolled thread
| Started by | Maxime Ripard <maxime.ripard@free-electrons.com> |
|---|---|
| First post | 2016-09-12 09:30 +0200 |
| Last post | 2016-09-14 11:00 +0200 |
| Articles | 2 — 2 participants |
Back to article view | Back to linux.kernel
This discussion starts older than the indexed window; earlier articles aren't shown. The article labeled Started by
below is the oldest one visible, not the original post.
Re: [PATCH v3 5/9] ARM: dts: sun8i-h3: add sun8i-emac ethernet driver Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-09-12 09:30 +0200
Re: [PATCH v3 5/9] ARM: dts: sun8i-h3: add sun8i-emac ethernet driver LABBE Corentin <clabbe.montjoie@gmail.com> - 2016-09-14 11:00 +0200
| From | Maxime Ripard <maxime.ripard@free-electrons.com> |
|---|---|
| Date | 2016-09-12 09:30 +0200 |
| Subject | Re: [PATCH v3 5/9] ARM: dts: sun8i-h3: add sun8i-emac ethernet driver |
| Message-ID | <sgtQJ-ct-7@gated-at.bofh.it> |
[Multipart message — attachments visible in raw view] — view raw
On Fri, Sep 09, 2016 at 02:45:13PM +0200, Corentin Labbe wrote:
> The sun8i-emac is an ethernet MAC hardware that support 10/100/1000
> speed.
>
> This patch enable the sun8i-emac on the Allwinner H3 SoC Device-tree.
> The SoC H3 have an internal PHY, so optionals syscon and ephy are set.
>
> Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> ---
> arch/arm/boot/dts/sun8i-h3.dtsi | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
> index a39da6f..a3ac476 100644
> --- a/arch/arm/boot/dts/sun8i-h3.dtsi
> +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
> @@ -50,6 +50,10 @@
> / {
> interrupt-parent = <&gic>;
>
> + aliases {
> + ethernet0 = &emac;
> + };
> +
This needs to be done at the board level.
> cpus {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -446,6 +450,21 @@
> status = "disabled";
> };
>
> + emac: ethernet@1c30000 {
> + compatible = "allwinner,sun8i-h3-emac";
> + syscon = <&syscon>;
> + reg = <0x01c30000 0x104>;
> + reg-names = "emac";
You don't need reg-names anymore.
> + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&ccu RST_BUS_EMAC>, <&ccu RST_BUS_EPHY>;
> + reset-names = "ahb", "ephy";
> + clocks = <&ccu CLK_BUS_EMAC>, <&ccu CLK_BUS_EPHY>;
> + clock-names = "ahb", "ephy";
I still believe that having the same node for both the PHY and the MAC
is wrong.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
[toc] | [next] | [standalone]
| From | LABBE Corentin <clabbe.montjoie@gmail.com> |
|---|---|
| Date | 2016-09-14 11:00 +0200 |
| Message-ID | <shecV-76W-5@gated-at.bofh.it> |
| In reply to | #1480968 |
On Mon, Sep 12, 2016 at 09:29:33AM +0200, Maxime Ripard wrote:
> On Fri, Sep 09, 2016 at 02:45:13PM +0200, Corentin Labbe wrote:
> > The sun8i-emac is an ethernet MAC hardware that support 10/100/1000
> > speed.
> >
> > This patch enable the sun8i-emac on the Allwinner H3 SoC Device-tree.
> > The SoC H3 have an internal PHY, so optionals syscon and ephy are set.
> >
> > Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
> > ---
> > arch/arm/boot/dts/sun8i-h3.dtsi | 19 +++++++++++++++++++
> > 1 file changed, 19 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
> > index a39da6f..a3ac476 100644
> > --- a/arch/arm/boot/dts/sun8i-h3.dtsi
> > +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
> > @@ -50,6 +50,10 @@
> > / {
> > interrupt-parent = <&gic>;
> >
> > + aliases {
> > + ethernet0 = &emac;
> > + };
> > +
>
> This needs to be done at the board level.
>
ok
> > cpus {
> > #address-cells = <1>;
> > #size-cells = <0>;
> > @@ -446,6 +450,21 @@
> > status = "disabled";
> > };
> >
> > + emac: ethernet@1c30000 {
> > + compatible = "allwinner,sun8i-h3-emac";
> > + syscon = <&syscon>;
> > + reg = <0x01c30000 0x104>;
> > + reg-names = "emac";
>
> You don't need reg-names anymore.
>
ok
> > + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
> > + resets = <&ccu RST_BUS_EMAC>, <&ccu RST_BUS_EPHY>;
> > + reset-names = "ahb", "ephy";
> > + clocks = <&ccu CLK_BUS_EMAC>, <&ccu CLK_BUS_EPHY>;
> > + clock-names = "ahb", "ephy";
>
> I still believe that having the same node for both the PHY and the MAC
> is wrong.
>
Ok I have moved clock/reset of ephy in its node.
Thanks
Regards
Corentin Labbe
[toc] | [prev] | [standalone]
Back to top | Article view | linux.kernel
csiph-web