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[PATCH v2 0/3] Optimisation on 8xx prior to hugepage implementation

Started byChristophe Leroy <christophe.leroy@c-s.fr>
First post2016-09-16 09:10 +0200
Last post2016-09-16 09:10 +0200
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  [PATCH v2 0/3] Optimisation on 8xx prior to hugepage implementation Christophe Leroy <christophe.leroy@c-s.fr> - 2016-09-16 09:10 +0200

#1484717 — [PATCH v2 0/3] Optimisation on 8xx prior to hugepage implementation

FromChristophe Leroy <christophe.leroy@c-s.fr>
Date2016-09-16 09:10 +0200
Subject[PATCH v2 0/3] Optimisation on 8xx prior to hugepage implementation
Message-ID<shVrA-1qW-13@gated-at.bofh.it>
This serie is a prologue of hugepage implementation on the 8xx.
It some how optimises the DTLBMiss handler while allowing at the
same time to hook the hugepage handling that will be introduced in
a subsequent patch serie.

v1 of those patches was part of a serie identified
"powerpc/8xx: implementation of huge pages"

Christophe Leroy (3):
  powerpc/8xx: use r3 to scratch CR in ITLBmiss
  powerpc/8xx: Move additional DTLBMiss handlers out of exception area
  powerpc/8xx: make user addr DTLB miss the short path

 arch/powerpc/kernel/head_8xx.S | 134 +++++++++++++++++++----------------------
 1 file changed, 62 insertions(+), 72 deletions(-)

-- 
2.1.0

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