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Groups > linux.kernel > #1481452 > unrolled thread
| Started by | Rob Herring <robh@kernel.org> |
|---|---|
| First post | 2016-09-12 17:40 +0200 |
| Last post | 2016-09-13 21:20 +0200 |
| Articles | 3 — 3 participants |
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Re: [PATCH 2/2] usb: dwc3: Added a property to set GFLADJ register Rob Herring <robh@kernel.org> - 2016-09-12 17:40 +0200
Re: [PATCH 2/2] usb: dwc3: Added a property to set GFLADJ register Felipe Balbi <balbi@kernel.org> - 2016-09-13 07:50 +0200
Re: [PATCH 2/2] usb: dwc3: Added a property to set GFLADJ register John Youn <John.Youn@synopsys.com> - 2016-09-13 21:20 +0200
| From | Rob Herring <robh@kernel.org> |
|---|---|
| Date | 2016-09-12 17:40 +0200 |
| Subject | Re: [PATCH 2/2] usb: dwc3: Added a property to set GFLADJ register |
| Message-ID | <sgBuX-58A-49@gated-at.bofh.it> |
On Thu, Sep 01, 2016 at 02:32:33PM -0700, John Youn wrote: > From: Thinh Nguyen <thinhn@synopsys.com> > > Added gfladj variable to control the core behavior with respect to > SOF, ITP, and frame timer functionality. > > Currently there is dwc->fladj that holds a single field in GFLADJ > register (GFLADJ.GFLADJ_30MHZ). A new variable gfladj is added to > dwc structure to allow setting of the entire GFLADJ register. If > dwc->gfladj is set, then it has a higher priority than dwc->fladj > when writing to the GFLADJ register. I'm not a fan of magic register values for DT properties. How many fields in this register that you will ever need to touch? > Synopsys HW setup (HAPS DX and phy board) requires a preset to this > register to improve interoperablitity. For example, the value for > GFLADJ_REFCLK_LPM_SEL should be set to 0 with ref_clk period of 50. This sounds like it should be handled in the driver. Is it a simple, constant correlation of ref_clk period to this value? > > Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> > Signed-off-by: John Youn <johnyoun@synopsys.com> > --- > Documentation/devicetree/bindings/usb/dwc3.txt | 2 ++ > drivers/usb/dwc3/core.c | 5 +++++ > drivers/usb/dwc3/core.h | 1 + > drivers/usb/dwc3/dwc3-pci.c | 1 + > 4 files changed, 9 insertions(+) > > diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt > index aa54ba7..cad4bf6 100644 > --- a/Documentation/devicetree/bindings/usb/dwc3.txt > +++ b/Documentation/devicetree/bindings/usb/dwc3.txt > @@ -52,6 +52,8 @@ Optional properties: > UTMI+ and "ulpi" for ULPI when the DWC_USB3_HSPHY_INTERFACE has value 3. > - snps,ref_clk_per: value for GUTCL.RefClkPer field that sets the period of > ref_clk in nano seconds. > + - snps,gfladj: if set, overides the value in the GFLADJ register. Takes > + precedence over snps,quirk-frame-length-adjustment. > - snps,quirk-frame-length-adjustment: Value for GFLADJ_30MHZ field of GFLADJ > register for post-silicon frame length adjustment when the > fladj_30mhz_sdbnd signal is invalid or incorrect.
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| From | Felipe Balbi <balbi@kernel.org> |
|---|---|
| Date | 2016-09-13 07:50 +0200 |
| Message-ID | <sgOLv-5S2-13@gated-at.bofh.it> |
| In reply to | #1481452 |
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Hi, Rob Herring <robh@kernel.org> writes: >> Synopsys HW setup (HAPS DX and phy board) requires a preset to this >> register to improve interoperablitity. For example, the value for >> GFLADJ_REFCLK_LPM_SEL should be set to 0 with ref_clk period of 50. > > This sounds like it should be handled in the driver. Is it a simple, > constant correlation of ref_clk period to this value? you mean that this could be calculated based off of clk_get_rate() ? -- balbi
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| From | John Youn <John.Youn@synopsys.com> |
|---|---|
| Date | 2016-09-13 21:20 +0200 |
| Message-ID | <sh1po-64P-3@gated-at.bofh.it> |
| In reply to | #1481452 |
On 9/12/2016 8:30 AM, Rob Herring wrote: > On Thu, Sep 01, 2016 at 02:32:33PM -0700, John Youn wrote: >> From: Thinh Nguyen <thinhn@synopsys.com> >> >> Added gfladj variable to control the core behavior with respect to >> SOF, ITP, and frame timer functionality. >> >> Currently there is dwc->fladj that holds a single field in GFLADJ >> register (GFLADJ.GFLADJ_30MHZ). A new variable gfladj is added to >> dwc structure to allow setting of the entire GFLADJ register. If >> dwc->gfladj is set, then it has a higher priority than dwc->fladj >> when writing to the GFLADJ register. > > I'm not a fan of magic register values for DT properties. > Sure. Felipe gave the same feedback. We'll fix it. > How many fields in this register that you will ever need to touch? > >> Synopsys HW setup (HAPS DX and phy board) requires a preset to this >> register to improve interoperablitity. For example, the value for >> GFLADJ_REFCLK_LPM_SEL should be set to 0 with ref_clk period of 50. > > This sounds like it should be handled in the driver. Is it a simple, > constant correlation of ref_clk period to this value? I don't know. I'll look into it. Regards, John
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