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| Started by | Tiffany Lin <tiffany.lin@mediatek.com> |
|---|---|
| First post | 2016-09-09 17:50 +0200 |
| Last post | 2016-09-09 17:50 +0200 |
| Articles | 2 — 1 participant |
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[PATCH v2 3/4] vcodec: mediatek: Add V4L2_PIX_FMT_MT21C support for v4l2 decoder Tiffany Lin <tiffany.lin@mediatek.com> - 2016-09-09 17:50 +0200
[PATCH v2 4/4] arm64: dts: mediatek: Add Video Decoder for MT8173 Tiffany Lin <tiffany.lin@mediatek.com> - 2016-09-09 17:50 +0200
| From | Tiffany Lin <tiffany.lin@mediatek.com> |
|---|---|
| Date | 2016-09-09 17:50 +0200 |
| Subject | [PATCH v2 3/4] vcodec: mediatek: Add V4L2_PIX_FMT_MT21C support for v4l2 decoder |
| Message-ID | <sfwdX-4Pt-11@gated-at.bofh.it> |
Add V4L2_PIX_FMT_MT21C support
Signed-off-by: Tiffany Lin <tiffany.lin@mediatek.com>
---
drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c
index 28a8453..fd3befc 100644
--- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c
+++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c
@@ -25,7 +25,7 @@
#include "mtk_vcodec_dec_pm.h"
#define OUT_FMT_IDX 0
-#define CAP_FMT_IDX 0
+#define CAP_FMT_IDX 3
#define MTK_VDEC_MIN_W 64U
#define MTK_VDEC_MIN_H 64U
@@ -48,6 +48,11 @@ static struct mtk_video_fmt mtk_video_formats[] = {
.type = MTK_FMT_DEC,
.num_planes = 1,
},
+ {
+ .fourcc = V4L2_PIX_FMT_MT21C,
+ .type = MTK_FMT_FRAME,
+ .num_planes = 2,
+ },
};
static const struct mtk_codec_framesizes mtk_vdec_framesizes[] = {
--
1.7.9.5
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| From | Tiffany Lin <tiffany.lin@mediatek.com> |
|---|---|
| Date | 2016-09-09 17:50 +0200 |
| Subject | [PATCH v2 4/4] arm64: dts: mediatek: Add Video Decoder for MT8173 |
| Message-ID | <sfwdY-4Pt-33@gated-at.bofh.it> |
| In reply to | #1480160 |
Add video decoder node for MT8173
Signed-off-by: Tiffany Lin <tiffany.lin@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 44 ++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 10f638f..2872cd7 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -974,6 +974,50 @@
#clock-cells = <1>;
};
+ vcodec_dec: vcodec@16000000 {
+ compatible = "mediatek,mt8173-vcodec-dec";
+ reg = <0 0x16000000 0 0x100>, /* VDEC_SYS */
+ <0 0x16020000 0 0x1000>, /* VDEC_MISC */
+ <0 0x16021000 0 0x800>, /* VDEC_LD */
+ <0 0x16021800 0 0x800>, /* VDEC_TOP */
+ <0 0x16022000 0 0x1000>, /* VDEC_CM */
+ <0 0x16023000 0 0x1000>, /* VDEC_AD */
+ <0 0x16024000 0 0x1000>, /* VDEC_AV */
+ <0 0x16025000 0 0x1000>, /* VDEC_PP */
+ <0 0x16026800 0 0x800>, /* VDEC_HWD */
+ <0 0x16027000 0 0x800>, /* VDEC_HWQ */
+ <0 0x16027800 0 0x800>, /* VDEC_HWB */
+ <0 0x16028400 0 0x400>; /* VDEC_HWG */
+ interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_LOW>;
+ mediatek,larb = <&larb1>;
+ iommus = <&iommu M4U_PORT_HW_VDEC_MC_EXT>,
+ <&iommu M4U_PORT_HW_VDEC_PP_EXT>,
+ <&iommu M4U_PORT_HW_VDEC_AVC_MV_EXT>,
+ <&iommu M4U_PORT_HW_VDEC_PRED_RD_EXT>,
+ <&iommu M4U_PORT_HW_VDEC_PRED_WR_EXT>,
+ <&iommu M4U_PORT_HW_VDEC_UFO_EXT>,
+ <&iommu M4U_PORT_HW_VDEC_VLD_EXT>,
+ <&iommu M4U_PORT_HW_VDEC_VLD2_EXT>;
+ mediatek,vpu = <&vpu>;
+ power-domains = <&scpsys MT8173_POWER_DOMAIN_VDEC>;
+ clocks = <&apmixedsys CLK_APMIXED_VCODECPLL>,
+ <&topckgen CLK_TOP_UNIVPLL_D2>,
+ <&topckgen CLK_TOP_CCI400_SEL>,
+ <&topckgen CLK_TOP_VDEC_SEL>,
+ <&topckgen CLK_TOP_VCODECPLL>,
+ <&apmixedsys CLK_APMIXED_VENCPLL>,
+ <&topckgen CLK_TOP_VENC_LT_SEL>,
+ <&topckgen CLK_TOP_VCODECPLL_370P5>;
+ clock-names = "vcodecpll",
+ "univpll_d2",
+ "clk_cci400_sel",
+ "vdec_sel",
+ "vdecpll",
+ "vencpll",
+ "venc_lt_sel",
+ "vdec_bus_clk_src";
+ };
+
larb1: larb@16010000 {
compatible = "mediatek,mt8173-smi-larb";
reg = <0 0x16010000 0 0x1000>;
--
1.7.9.5
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