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Groups > linux.kernel > #1478633 > unrolled thread
| Started by | Stephen Boyd <stephen.boyd@linaro.org> |
|---|---|
| First post | 2016-09-07 23:40 +0200 |
| Last post | 2016-09-09 02:50 +0200 |
| Articles | 14 — 3 participants |
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[PATCH v4 00/22] Support qcom's HSIC USB and rewrite USB2 HS support Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-07 23:40 +0200
[PATCH v4 14/22] usb: chipidea: msm: Add proper clk and reset support Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-07 23:40 +0200
[PATCH v4 07/22] usb: chipidea: Notify events when switching host mode Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-07 23:40 +0200
[PATCH v4 22/22] phy: Add support for Qualcomm's USB HS phy Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-07 23:40 +0200
[PATCH v4 16/22] usb: chipidea: msm: Restore wrapper settings after reset Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-07 23:40 +0200
[PATCH v4 05/22] usb: chipidea: Handle extcon events properly Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-07 23:50 +0200
[PATCH v4 09/22] usb: chipidea: Add support for ULPI PHY bus Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-07 23:50 +0200
[PATCH v4 03/22] usb: ulpi: Support device discovery via DT Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-07 23:50 +0200
Re: [PATCH v4 03/22] usb: ulpi: Support device discovery via DT Rob Herring <robh+dt@kernel.org> - 2016-09-08 03:20 +0200
[PATCH v4 04/22] usb: chipidea: Only read/write OTGSC from one place Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-07 23:50 +0200
[PATCH v4 02/22] of: device: Export of_device_{get_modalias,uvent_modalias} to modules Stephen Boyd <stephen.boyd@linaro.org> - 2016-09-07 23:50 +0200
Re: [PATCH v4 02/22] of: device: Export of_device_{get_modalias,uvent_modalias} to modules Rob Herring <robh+dt@kernel.org> - 2016-09-08 03:00 +0200
Re: [PATCH v4 00/22] Support qcom's HSIC USB and rewrite USB2 HS support Peter Chen <hzpeterchen@gmail.com> - 2016-09-08 04:10 +0200
Re: [PATCH v4 00/22] Support qcom's HSIC USB and rewrite USB2 HS support Peter Chen <hzpeterchen@gmail.com> - 2016-09-09 02:50 +0200
| From | Stephen Boyd <stephen.boyd@linaro.org> |
|---|---|
| Date | 2016-09-07 23:40 +0200 |
| Subject | [PATCH v4 00/22] Support qcom's HSIC USB and rewrite USB2 HS support |
| Message-ID | <seSJz-5m0-3@gated-at.bofh.it> |
The state of USB ChipIdea support on Qualcomm's platforms is not great.
The DT description of these devices requires up to three different nodes
for what amounts to be the same hardware block, when there should really
only be one. Furthermore, the "phy" driver that is in mainline (phy-msm-usb.c)
duplicates the OTG state machine and touches the ci controller wrapper
registers when it should really be focused on the phy and the ULPI accesses
needed to get the phy working. There's also a slimmed down phy driver for
the msm8916 platform, but really the phy hardware is the same as other MSMs,
so we have two drivers doing pretty much the same thing. This leads to a
situtaion where we have the chipidea core driver, the "phy" driver, and
sometimes the ehci-msm.c driver operating the same device all at the same
time with very little coordination. This just isn't very safe and is
confusing from a driver perspective when trying to figure out who does what.
Finally, there isn't any HSIC support on platforms like apq8074 so we
should add that.
This patch series updates the ChipIdea driver and the MSM wrapper
(ci_hdrc_msm.c) to properly handle the PHY and wrapper bits at the right
times in the right places. To get there, we update the ChipIdea core to
have support for the ULPI phy bus introduced by Heikki. Along the way
we fix bugs with the extcon handling for peripheral and OTG mode controllers
and move the parts of phy-usb-msm.c that are touching the CI controller
wrapper into the wrapper driver (ci_hdrc_msm.c). Finally we add support
for the HSIC phy based on the ULPI bus and rewrite the HS phy driver
(phy-usb-msm.c) as a standard ULPI phy driver.
Once this series is accepted, we should be able to delete the phy-usb-msm.c,
phy-qcom-8x16-usb.c, and ehci-msm.c drivers from the tree and use the ULPI
based phy driver (which also lives in drivers/phy/ instead of drivers/usb/phy/)
and the chipidea host core instead.
I've also sent separate patches for other minor pieces to make this
all work. The full tree can be found here[3], hacks and all to get
things working. I've tested this on the db410c, apq8074 dragonboard,
and ifc6410 with configfs gadgets and otg cables.
Patches based on v4.8-rc1
Changes from v3:
* Picked up Acks from Peter
* Updated extcon consolidation patch per Peter's comments
* Folded in simplification from Heikki for ULPI DT matching
Changes from v2:
* Added SoC specific compatibles in phy bindings
* Dropped AVVIS patch for OTG statemachine
* New patch to consolidate extcon handlers
* Picked up Acks from Peter
* Rebased onto v4.8-rc1
* Reworked ULPI OF code to look at vid == 0 instead of pid == 0
* Dropped ULPI bindings for vid and pid overrides
Changes from v1:
* Reworked ULPI device probing to keep using vendor/product ids that
come from DT if needed and falls back to OF style match when product id
is 0
* PHY init later patch was rejected so that moved to a quirk flag and
the msm wrapper started managing the phy on/off
* Updated clk requirements for HSIC phy in binding doc
* Added optional clk in wrapper for "housekeeping" found on older qcom
platforms
* Bug fix to OTGSC polling function
* Changed runtime PM patch to set as active instead of get/put
TODO:
* DMA fails on arm64 so we need something like [1] to make it work.
* The db410c needs a driver to toggle the onboard switch to connect
the usb hub instead of micro port when the usb cable is disconnected
* apq8064 platforms need a vbus regulator to really use otg and I haven't
tried out the RPM based regulators yet
* The HSIC phy on the apq8074 dragonboard is connected to a usb4604
device which requires the i2c driver to probe and send an i2c
sequence before the HSIC controller enumerates or HSIC doesn't work.
Right now I have a hack to force the controller to probe defer
once so that usb4604 probes first. This needs a more proper solution
like having the DT describe a linkage between the controller and
the usb device so we can enforce probe ordering.
* OTG support requires a working VBUS supply on apq8074 dragonboard
and that requires changes to the smbb_charger driver to support
the OTG OVP switch as a regulator[2]. This series needs revival
on the list so that OTG works properly on that board.
[1] https://lkml.org/lkml/2016/2/22/7
[2] http://lkml.kernel.org/g/1449621618-11900-1-git-send-email-tim.bird@sonymobile.com
[3] https://git.linaro.org/people/stephen.boyd/linux.git/shortlog/refs/heads/usb-hsic-8074
Stephen Boyd (22):
of: device: Support loading a module with OF based modalias
of: device: Export of_device_{get_modalias,uvent_modalias} to modules
usb: ulpi: Support device discovery via DT
usb: chipidea: Only read/write OTGSC from one place
usb: chipidea: Handle extcon events properly
usb: chipidea: Add platform flag for wrapper phy management
usb: chipidea: Notify events when switching host mode
usb: chipidea: Remove locking in ci_udc_start()
usb: chipidea: Add support for ULPI PHY bus
usb: chipidea: Consolidate extcon notifiers
usb: chipidea: msm: Mark device as runtime pm active
usb: chipidea: msm: Rely on core to override AHBBURST
usb: chipidea: msm: Use hw_write_id_reg() instead of writel
usb: chipidea: msm: Add proper clk and reset support
usb: chipidea: msm: Mux over secondary phy at the right time
usb: chipidea: msm: Restore wrapper settings after reset
usb: chipidea: msm: Make platform data driver local instead of global
usb: chipidea: msm: Add reset controller for PHY POR bit
usb: chipidea: msm: Handle phy power states
usb: chipidea: msm: Be silent on probe defer errors
phy: Add support for Qualcomm's USB HSIC phy
phy: Add support for Qualcomm's USB HS phy
.../devicetree/bindings/phy/qcom,usb-hs-phy.txt | 83 ++++++
.../devicetree/bindings/phy/qcom,usb-hsic-phy.txt | 65 +++++
Documentation/devicetree/bindings/usb/ulpi.txt | 20 ++
drivers/of/device.c | 25 ++
drivers/phy/Kconfig | 15 ++
drivers/phy/Makefile | 2 +
drivers/phy/phy-qcom-usb-hs.c | 289 +++++++++++++++++++++
drivers/phy/phy-qcom-usb-hsic.c | 160 ++++++++++++
drivers/usb/chipidea/Kconfig | 8 +
drivers/usb/chipidea/Makefile | 1 +
drivers/usb/chipidea/ci.h | 22 +-
drivers/usb/chipidea/ci_hdrc_msm.c | 280 +++++++++++++++++---
drivers/usb/chipidea/core.c | 122 ++++-----
drivers/usb/chipidea/host.c | 10 +
drivers/usb/chipidea/otg.c | 86 +++++-
drivers/usb/chipidea/udc.c | 3 -
drivers/usb/chipidea/ulpi.c | 113 ++++++++
drivers/usb/common/ulpi.c | 77 +++++-
include/linux/of_device.h | 6 +
include/linux/usb/chipidea.h | 9 +-
20 files changed, 1259 insertions(+), 137 deletions(-)
create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt
create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
create mode 100644 Documentation/devicetree/bindings/usb/ulpi.txt
create mode 100644 drivers/phy/phy-qcom-usb-hs.c
create mode 100644 drivers/phy/phy-qcom-usb-hsic.c
create mode 100644 drivers/usb/chipidea/ulpi.c
--
2.9.0.rc2.8.ga28705d
[toc] | [next] | [standalone]
| From | Stephen Boyd <stephen.boyd@linaro.org> |
|---|---|
| Date | 2016-09-07 23:40 +0200 |
| Subject | [PATCH v4 14/22] usb: chipidea: msm: Add proper clk and reset support |
| Message-ID | <seSJA-5m0-33@gated-at.bofh.it> |
| In reply to | #1478633 |
The msm chipidea controller uses two main clks, an AHB clk to
read/write the MMIO registers and a core clk called the system
clk that drives the controller itself. Add support for these clks
as they're required in all designs.
Also add support for an optional third clk that we need to turn
on to reset the controller and wrapper logic and other
"housekeeping" things. This clk was removed in later revisions of
the hardware because the reset methodology no longer required
clks to be enabled to propagate resets.
Acked-by: Peter Chen <peter.chen@nxp.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
---
drivers/usb/chipidea/ci_hdrc_msm.c | 72 +++++++++++++++++++++++++++++++++++---
1 file changed, 68 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c b/drivers/usb/chipidea/ci_hdrc_msm.c
index b282a717bf8c..7e870a253f55 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -10,11 +10,20 @@
#include <linux/pm_runtime.h>
#include <linux/usb/gadget.h>
#include <linux/usb/chipidea.h>
+#include <linux/clk.h>
+#include <linux/reset.h>
#include "ci.h"
#define HS_PHY_AHB_MODE 0x0098
+struct ci_hdrc_msm {
+ struct platform_device *ci;
+ struct clk *core_clk;
+ struct clk *iface_clk;
+ struct clk *fs_clk;
+};
+
static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
{
struct device *dev = ci->gadget.dev.parent;
@@ -52,11 +61,20 @@ static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = {
static int ci_hdrc_msm_probe(struct platform_device *pdev)
{
+ struct ci_hdrc_msm *ci;
struct platform_device *plat_ci;
struct usb_phy *phy;
+ struct clk *clk;
+ struct reset_control *reset;
+ int ret;
dev_dbg(&pdev->dev, "ci_hdrc_msm_probe\n");
+ ci = devm_kzalloc(&pdev->dev, sizeof(*ci), GFP_KERNEL);
+ if (!ci)
+ return -ENOMEM;
+ platform_set_drvdata(pdev, ci);
+
/*
* OTG(PHY) driver takes care of PHY initialization, clock management,
* powering up VBUS, mapping of registers address space and power
@@ -68,29 +86,75 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
ci_hdrc_msm_platdata.usb_phy = phy;
+ reset = devm_reset_control_get(&pdev->dev, "core");
+ if (IS_ERR(reset))
+ return PTR_ERR(reset);
+
+ ci->core_clk = clk = devm_clk_get(&pdev->dev, "core");
+ if (IS_ERR(clk))
+ return PTR_ERR(clk);
+
+ ci->iface_clk = clk = devm_clk_get(&pdev->dev, "iface");
+ if (IS_ERR(clk))
+ return PTR_ERR(clk);
+
+ ci->fs_clk = clk = devm_clk_get(&pdev->dev, "fs");
+ if (IS_ERR(clk)) {
+ if (PTR_ERR(clk) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
+ ci->fs_clk = NULL;
+ }
+
+ ret = clk_prepare_enable(ci->fs_clk);
+ if (ret)
+ return ret;
+
+ reset_control_assert(reset);
+ usleep_range(10000, 12000);
+ reset_control_deassert(reset);
+
+ clk_disable_unprepare(ci->fs_clk);
+
+ ret = clk_prepare_enable(ci->core_clk);
+ if (ret)
+ return ret;
+
+ ret = clk_prepare_enable(ci->iface_clk);
+ if (ret)
+ goto err_iface;
+
plat_ci = ci_hdrc_add_device(&pdev->dev,
pdev->resource, pdev->num_resources,
&ci_hdrc_msm_platdata);
if (IS_ERR(plat_ci)) {
dev_err(&pdev->dev, "ci_hdrc_add_device failed!\n");
- return PTR_ERR(plat_ci);
+ ret = PTR_ERR(plat_ci);
+ goto err_mux;
}
- platform_set_drvdata(pdev, plat_ci);
+ ci->ci = plat_ci;
pm_runtime_set_active(&pdev->dev);
pm_runtime_no_callbacks(&pdev->dev);
pm_runtime_enable(&pdev->dev);
return 0;
+
+err_mux:
+ clk_disable_unprepare(ci->iface_clk);
+err_iface:
+ clk_disable_unprepare(ci->core_clk);
+ return ret;
}
static int ci_hdrc_msm_remove(struct platform_device *pdev)
{
- struct platform_device *plat_ci = platform_get_drvdata(pdev);
+ struct ci_hdrc_msm *ci = platform_get_drvdata(pdev);
pm_runtime_disable(&pdev->dev);
- ci_hdrc_remove_device(plat_ci);
+ ci_hdrc_remove_device(ci->ci);
+ clk_disable_unprepare(ci->iface_clk);
+ clk_disable_unprepare(ci->core_clk);
return 0;
}
--
2.9.0.rc2.8.ga28705d
[toc] | [prev] | [next] | [standalone]
| From | Stephen Boyd <stephen.boyd@linaro.org> |
|---|---|
| Date | 2016-09-07 23:40 +0200 |
| Subject | [PATCH v4 07/22] usb: chipidea: Notify events when switching host mode |
| Message-ID | <seSJA-5m0-37@gated-at.bofh.it> |
| In reply to | #1478633 |
The chipidea/udc.c file sends a CI_HDRC_CONTROLLER_RESET_EVENT to
the wrapper drivers when it calls hw_device_reset(), but that
function is not called from chipidea/host.c. And the udc.c file
sends the CI_HDRC_CONTROLLER_STOPPED_EVENT but the host.c file
doesn't do anything.
The intent of the reset event is to allow the wrapper driver to
do any wrapper specific things after the reset bit has been set
in the usb command register. Therefore, add this event hook in
the host role after we toggle that bit.
Similarly, the intent of the stopped event is to allow the
wrapper driver to do any wrapper specific things after the device
is stopped. So when we stop the host role, send the stopped
event.
Acked-by: Peter Chen <peter.chen@nxp.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
---
drivers/usb/chipidea/host.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c
index 053bac9d983c..a1d8551ca79d 100644
--- a/drivers/usb/chipidea/host.c
+++ b/drivers/usb/chipidea/host.c
@@ -87,6 +87,9 @@ static int ehci_ci_reset(struct usb_hcd *hcd)
if (ret)
return ret;
+ if (ci->platdata->notify_event)
+ ci->platdata->notify_event(ci, CI_HDRC_CONTROLLER_RESET_EVENT);
+
ci_platform_configure(ci);
return ret;
@@ -184,6 +187,9 @@ static void host_stop(struct ci_hdrc *ci)
struct usb_hcd *hcd = ci->hcd;
if (hcd) {
+ if (ci->platdata->notify_event)
+ ci->platdata->notify_event(ci,
+ CI_HDRC_CONTROLLER_STOPPED_EVENT);
usb_remove_hcd(hcd);
usb_put_hcd(hcd);
if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
--
2.9.0.rc2.8.ga28705d
[toc] | [prev] | [next] | [standalone]
| From | Stephen Boyd <stephen.boyd@linaro.org> |
|---|---|
| Date | 2016-09-07 23:40 +0200 |
| Subject | [PATCH v4 22/22] phy: Add support for Qualcomm's USB HS phy |
| Message-ID | <seSJA-5m0-41@gated-at.bofh.it> |
| In reply to | #1478633 |
The high-speed phy on qcom SoCs is controlled via the ULPI
viewport.
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
---
.../devicetree/bindings/phy/qcom,usb-hs-phy.txt | 83 ++++++
drivers/phy/Kconfig | 8 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-qcom-usb-hs.c | 289 +++++++++++++++++++++
4 files changed, 381 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt
create mode 100644 drivers/phy/phy-qcom-usb-hs.c
diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt b/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt
new file mode 100644
index 000000000000..d7eacd63d06b
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt
@@ -0,0 +1,83 @@
+Qualcomm's USB HS PHY
+
+PROPERTIES
+
+- compatible:
+ Usage: required
+ Value type: <string>
+ Definition: Should contain "qcom,usb-hs-phy" and more specifically one of the
+ following:
+
+ "qcom,usb-hs-phy-apq8064"
+ "qcom,usb-hs-phy-msm8916"
+ "qcom,usb-hs-phy-msm8974"
+
+- #phy-cells:
+ Usage: required
+ Value type: <u32>
+ Definition: Should contain 0
+
+- clocks:
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: Should contain clock specifier for the reference and sleep
+ clocks
+
+- clock-names:
+ Usage: required
+ Value type: <stringlist>
+ Definition: Should contain "ref" and "sleep" for the reference and sleep
+ clocks respectively
+
+- resets:
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: Should contain the phy and POR resets
+
+- reset-names:
+ Usage: required
+ Value type: <stringlist>
+ Definition: Should contain "phy" and "por" for the phy and POR resets
+ respectively
+
+- v3p3-supply:
+ Usage: required
+ Value type: <phandle>
+ Definition: Should contain a reference to the 3.3V supply
+
+- v1p8-supply:
+ Usage: required
+ Value type: <phandle>
+ Definition: Should contain a reference to the 1.8V supply
+
+- extcon:
+ Usage: optional
+ Value type: <prop-encoded-array>
+ Definition: Should contain the vbus and ID extcons in the first and second
+ cells respectively
+
+- qcom,init-seq:
+ Usage: optional
+ Value type: <u8 array>
+ Definition: Should contain a sequence of ULPI register and address pairs to
+ program into the ULPI_EXT_VENDOR_SPECIFIC area. This is related
+ to Device Mode Eye Diagram test.
+
+EXAMPLE
+
+otg: usb-controller {
+ ulpi {
+ phy {
+ compatible = "qcom,usb-hs-phy-msm8974", "qcom,usb-hs-phy";
+ #phy-cells = <0>;
+ clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
+ clock-names = "ref", "sleep";
+ resets = <&gcc GCC_USB2A_PHY_BCR>, <&otg 0>;
+ reset-names = "phy", "por";
+ v3p3-supply = <&pm8941_l24>;
+ v1p8-supply = <&pm8941_l6>;
+ extcon = <&smbb>, <&usb_id>;
+ qcom,init-seq = /bits/ 8 <0x81 0x63>;
+ };
+ };
+};
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 830c443eeabf..ee0ec021a98c 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -417,6 +417,14 @@ config PHY_QCOM_UFS
help
Support for UFS PHY on QCOM chipsets.
+config PHY_QCOM_USB_HS
+ tristate "Qualcomm USB HS PHY module"
+ depends on USB_ULPI_BUS
+ select GENERIC_PHY
+ help
+ Support for the USB high-speed ULPI compliant phy on Qualcomm
+ chipsets.
+
config PHY_QCOM_USB_HSIC
tristate "Qualcomm USB HSIC ULPI PHY module"
depends on USB_ULPI_BUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 5422f543d17d..31c84faa07fa 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -50,6 +50,7 @@ obj-$(CONFIG_PHY_STIH41X_USB) += phy-stih41x-usb.o
obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs.o
obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-20nm.o
obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-14nm.o
+obj-$(CONFIG_PHY_QCOM_USB_HS) += phy-qcom-usb-hs.o
obj-$(CONFIG_PHY_QCOM_USB_HSIC) += phy-qcom-usb-hsic.o
obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o
obj-$(CONFIG_PHY_BRCM_SATA) += phy-brcm-sata.o
diff --git a/drivers/phy/phy-qcom-usb-hs.c b/drivers/phy/phy-qcom-usb-hs.c
new file mode 100644
index 000000000000..73fb4b49a8e1
--- /dev/null
+++ b/drivers/phy/phy-qcom-usb-hs.c
@@ -0,0 +1,289 @@
+/**
+ * Copyright (C) 2016 Linaro Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/module.h>
+#include <linux/ulpi/driver.h>
+#include <linux/ulpi/regs.h>
+#include <linux/clk.h>
+#include <linux/regulator/consumer.h>
+#include <linux/of_device.h>
+#include <linux/reset.h>
+#include <linux/extcon.h>
+#include <linux/notifier.h>
+#include <linux/usb/of.h>
+
+#include "ulpi_phy.h"
+
+#define ULPI_PWR_CLK_MNG_REG 0x88
+# define ULPI_PWR_OTG_COMP_DISABLE BIT(0)
+
+#define ULPI_MISC_A 0x96
+# define ULPI_MISC_A_VBUSVLDEXTSEL BIT(1)
+# define ULPI_MISC_A_VBUSVLDEXT BIT(0)
+
+
+struct ulpi_seq {
+ u8 addr;
+ u8 val;
+};
+
+struct qcom_usb_hs_phy {
+ struct ulpi *ulpi;
+ struct phy *phy;
+ struct clk *ref_clk;
+ struct clk *sleep_clk;
+ struct regulator *v1p8;
+ struct regulator *v3p3;
+ struct reset_control *reset;
+ struct ulpi_seq *init_seq;
+ struct notifier_block vbus_notify;
+ struct extcon_dev *vbus_edev;
+ struct extcon_dev *id_edev;
+ enum usb_dr_mode dr_mode;
+};
+
+static int
+qcom_usb_hs_phy_vbus_notifier(struct notifier_block *nb, unsigned long event,
+ void *ptr)
+{
+ struct qcom_usb_hs_phy *uphy;
+ int is_host;
+ u8 addr;
+
+ uphy = container_of(nb, struct qcom_usb_hs_phy, vbus_notify);
+ is_host = extcon_get_cable_state_(uphy->id_edev, EXTCON_USB_HOST);
+ if (is_host < 0)
+ is_host = 0; /* No id event means always a peripheral */
+
+ if (event && !is_host)
+ addr = ULPI_SET(ULPI_MISC_A);
+ else
+ addr = ULPI_CLR(ULPI_MISC_A);
+
+ return ulpi_write(uphy->ulpi, addr,
+ ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT);
+}
+
+static int qcom_usb_hs_phy_power_on(struct phy *phy)
+{
+ struct qcom_usb_hs_phy *uphy = phy_get_drvdata(phy);
+ struct ulpi *ulpi = uphy->ulpi;
+ const struct ulpi_seq *seq;
+ int ret, state;
+
+ ret = clk_prepare_enable(uphy->ref_clk);
+ if (ret)
+ return ret;
+
+ ret = clk_prepare_enable(uphy->sleep_clk);
+ if (ret)
+ goto err_sleep;
+
+ ret = regulator_set_voltage(uphy->v1p8, 1800000, 1800000);
+ if (ret)
+ goto err_1p8;
+
+ ret = regulator_set_load(uphy->v1p8, 50000);
+ if (ret < 0)
+ goto err_1p8;
+
+ ret = regulator_enable(uphy->v1p8);
+ if (ret)
+ goto err_1p8;
+
+ ret = regulator_set_voltage_triplet(uphy->v3p3, 3050000, 3300000,
+ 3300000);
+ if (ret)
+ goto err_3p3;
+
+ ret = regulator_set_load(uphy->v3p3, 50000);
+ if (ret < 0)
+ goto err_3p3;
+
+ ret = regulator_enable(uphy->v3p3);
+ if (ret)
+ goto err_3p3;
+
+ for (seq = uphy->init_seq; seq->addr; seq++) {
+ ret = ulpi_write(ulpi, seq->addr, seq->val);
+ if (ret)
+ goto err_ulpi;
+ }
+
+ if (uphy->reset) {
+ ret = reset_control_reset(uphy->reset);
+ if (ret)
+ goto err_ulpi;
+ }
+
+ if (uphy->vbus_edev) {
+ ulpi_write(ulpi, ULPI_SET(ULPI_PWR_CLK_MNG_REG),
+ ULPI_PWR_OTG_COMP_DISABLE);
+ state = extcon_get_cable_state_(uphy->vbus_edev, EXTCON_USB);
+ /* setup initial state */
+ qcom_usb_hs_phy_vbus_notifier(&uphy->vbus_notify, state,
+ uphy->vbus_edev);
+ ret = extcon_register_notifier(uphy->vbus_edev, EXTCON_USB,
+ &uphy->vbus_notify);
+ if (ret)
+ return ret;
+ } else {
+ u8 val;
+
+ switch (uphy->dr_mode) {
+ case USB_DR_MODE_OTG:
+ val = ULPI_INT_IDGRD;
+ case USB_DR_MODE_PERIPHERAL:
+ val |= ULPI_INT_SESS_VALID;
+ break;
+ default:
+ val = 0;
+ }
+
+ ret = ulpi_write(ulpi, ULPI_USB_INT_EN_RISE, val);
+ if (ret)
+ goto err_ulpi;
+ ret = ulpi_write(ulpi, ULPI_USB_INT_EN_FALL, val);
+ if (ret)
+ goto err_ulpi;
+ }
+
+ return 0;
+err_ulpi:
+ regulator_disable(uphy->v3p3);
+err_3p3:
+ regulator_disable(uphy->v1p8);
+err_1p8:
+ clk_disable_unprepare(uphy->sleep_clk);
+err_sleep:
+ clk_disable_unprepare(uphy->ref_clk);
+ return ret;
+}
+
+static int qcom_usb_hs_phy_power_off(struct phy *phy)
+{
+ int ret;
+ struct qcom_usb_hs_phy *uphy = phy_get_drvdata(phy);
+
+ if (uphy->vbus_edev) {
+ ret = extcon_unregister_notifier(uphy->vbus_edev, EXTCON_USB,
+ &uphy->vbus_notify);
+ if (ret)
+ return ret;
+ }
+
+ regulator_disable(uphy->v3p3);
+ regulator_disable(uphy->v1p8);
+ clk_disable_unprepare(uphy->sleep_clk);
+ clk_disable_unprepare(uphy->ref_clk);
+
+ return 0;
+}
+
+static const struct phy_ops qcom_usb_hs_phy_ops = {
+ .power_on = qcom_usb_hs_phy_power_on,
+ .power_off = qcom_usb_hs_phy_power_off,
+ .owner = THIS_MODULE,
+};
+
+static int qcom_usb_hs_phy_probe(struct ulpi *ulpi)
+{
+ struct qcom_usb_hs_phy *uphy;
+ struct phy_provider *p;
+ struct clk *clk;
+ struct regulator *reg;
+ struct reset_control *reset;
+ int size;
+ int ret;
+
+ uphy = devm_kzalloc(&ulpi->dev, sizeof(*uphy), GFP_KERNEL);
+ if (!uphy)
+ return -ENOMEM;
+ ulpi_set_drvdata(ulpi, uphy);
+ uphy->ulpi = ulpi;
+ uphy->dr_mode = of_usb_get_dr_mode_by_phy(ulpi->dev.of_node, -1);
+
+ size = of_property_count_u8_elems(ulpi->dev.of_node, "qcom,init-seq");
+ if (size < 0)
+ size = 0;
+ uphy->init_seq = devm_kmalloc_array(&ulpi->dev, (size / 2) + 1,
+ sizeof(*uphy->init_seq), GFP_KERNEL);
+ if (!uphy->init_seq)
+ return -ENOMEM;
+ ret = of_property_read_u8_array(ulpi->dev.of_node, "qcom,init-seq",
+ (u8 *)uphy->init_seq, size);
+ if (ret && size)
+ return ret;
+ /* NUL terminate */
+ uphy->init_seq[size / 2].addr = uphy->init_seq[size / 2].val = 0;
+
+ uphy->ref_clk = clk = devm_clk_get(&ulpi->dev, "ref");
+ if (IS_ERR(clk))
+ return PTR_ERR(clk);
+
+ uphy->sleep_clk = clk = devm_clk_get(&ulpi->dev, "sleep");
+ if (IS_ERR(clk))
+ return PTR_ERR(clk);
+
+ uphy->v1p8 = reg = devm_regulator_get(&ulpi->dev, "v1p8");
+ if (IS_ERR(reg))
+ return PTR_ERR(reg);
+
+ uphy->v3p3 = reg = devm_regulator_get(&ulpi->dev, "v3p3");
+ if (IS_ERR(reg))
+ return PTR_ERR(reg);
+
+ uphy->reset = reset = devm_reset_control_get(&ulpi->dev, "por");
+ if (IS_ERR(reset)) {
+ if (PTR_ERR(reset) == -EPROBE_DEFER)
+ return PTR_ERR(reset);
+ uphy->reset = NULL;
+ }
+
+ uphy->phy = devm_phy_create(&ulpi->dev, ulpi->dev.of_node,
+ &qcom_usb_hs_phy_ops);
+ if (IS_ERR(uphy->phy))
+ return PTR_ERR(uphy->phy);
+
+ uphy->vbus_edev = extcon_get_edev_by_phandle(&ulpi->dev, 0);
+ if (IS_ERR(uphy->vbus_edev)) {
+ if (PTR_ERR(uphy->vbus_edev) != -ENODEV)
+ return PTR_ERR(uphy->vbus_edev);
+ uphy->vbus_edev = NULL;
+ }
+
+ uphy->id_edev = extcon_get_edev_by_phandle(&ulpi->dev, 1);
+ if (IS_ERR(uphy->id_edev)) {
+ if (PTR_ERR(uphy->id_edev) != -ENODEV)
+ return PTR_ERR(uphy->id_edev);
+ uphy->id_edev = NULL;
+ }
+
+ uphy->vbus_notify.notifier_call = qcom_usb_hs_phy_vbus_notifier;
+ phy_set_drvdata(uphy->phy, uphy);
+
+ p = devm_of_phy_provider_register(&ulpi->dev, of_phy_simple_xlate);
+ return PTR_ERR_OR_ZERO(p);
+}
+
+static const struct of_device_id qcom_usb_hs_phy_match[] = {
+ { .compatible = "qcom,usb-hs-phy", },
+ { }
+};
+MODULE_DEVICE_TABLE(of, qcom_usb_hs_phy_match);
+
+static struct ulpi_driver qcom_usb_hs_phy_driver = {
+ .probe = qcom_usb_hs_phy_probe,
+ .driver = {
+ .name = "qcom_usb_hs_phy",
+ .of_match_table = qcom_usb_hs_phy_match,
+ },
+};
+module_ulpi_driver(qcom_usb_hs_phy_driver);
+
+MODULE_DESCRIPTION("Qualcomm USB HS phy");
+MODULE_LICENSE("GPL v2");
--
2.9.0.rc2.8.ga28705d
[toc] | [prev] | [next] | [standalone]
| From | Stephen Boyd <stephen.boyd@linaro.org> |
|---|---|
| Date | 2016-09-07 23:40 +0200 |
| Subject | [PATCH v4 16/22] usb: chipidea: msm: Restore wrapper settings after reset |
| Message-ID | <seSJA-5m0-43@gated-at.bofh.it> |
| In reply to | #1478633 |
When the RESET bit is set in the USBCMD register it resets quite
a few of the wrapper's registers to their reset state. This
includes the GENCONFIG and GENCONFIG2 registers. Currently this
is done by the usb phy and ehci-msm drivers writing into the
controller wrapper's MMIO address space. Let's consolidate the
register writes into the wrapper driver instead so that we
clearly split the wrapper from the phys.
Acked-by: Peter Chen <peter.chen@nxp.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
---
drivers/usb/chipidea/ci_hdrc_msm.c | 39 ++++++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c b/drivers/usb/chipidea/ci_hdrc_msm.c
index 4b0aadc2be2f..333817291798 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -14,11 +14,22 @@
#include <linux/mfd/syscon.h>
#include <linux/regmap.h>
#include <linux/io.h>
+#include <linux/extcon.h>
+#include <linux/of.h>
#include "ci.h"
#define HS_PHY_AHB_MODE 0x0098
+#define HS_PHY_GENCONFIG 0x009c
+#define HS_PHY_TXFIFO_IDLE_FORCE_DIS BIT(4)
+
+#define HS_PHY_GENCONFIG_2 0x00a0
+#define HS_PHY_SESS_VLD_CTRL_EN BIT(7)
+#define HS_PHY_ULPI_TX_PKT_EN_CLR_FIX BIT(19)
+
+#define HSPHY_SESS_VLD_CTRL BIT(25)
+
/* Vendor base starts at 0x200 beyond CI base */
#define HS_PHY_SEC_CTRL 0x0078
#define HS_PHY_DIG_CLAMP_N BIT(16)
@@ -29,6 +40,7 @@ struct ci_hdrc_msm {
struct clk *iface_clk;
struct clk *fs_clk;
bool secondary_phy;
+ bool hsic;
void __iomem *base;
};
@@ -48,6 +60,24 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
/* use AHB transactor, allow posted data writes */
hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0xffffffff, 0x8);
+
+ /* workaround for rx buffer collision issue */
+ hw_write_id_reg(ci, HS_PHY_GENCONFIG,
+ HS_PHY_TXFIFO_IDLE_FORCE_DIS, 0);
+
+ if (!msm_ci->hsic)
+ hw_write_id_reg(ci, HS_PHY_GENCONFIG_2,
+ HS_PHY_ULPI_TX_PKT_EN_CLR_FIX, 0);
+
+ if (!IS_ERR(ci->platdata->vbus_extcon.edev)) {
+ hw_write_id_reg(ci, HS_PHY_GENCONFIG_2,
+ HS_PHY_SESS_VLD_CTRL_EN,
+ HS_PHY_SESS_VLD_CTRL_EN);
+ hw_write(ci, OP_USBCMD, HSPHY_SESS_VLD_CTRL,
+ HSPHY_SESS_VLD_CTRL);
+
+ }
+
usb_phy_init(ci->usb_phy);
break;
case CI_HDRC_CONTROLLER_STOPPED_EVENT:
@@ -116,6 +146,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
struct reset_control *reset;
struct resource *res;
int ret;
+ struct device_node *ulpi_node, *phy_node;
dev_dbg(&pdev->dev, "ci_hdrc_msm_probe\n");
@@ -181,6 +212,14 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
if (ret)
goto err_mux;
+ ulpi_node = of_find_node_by_name(pdev->dev.of_node, "ulpi");
+ if (ulpi_node) {
+ phy_node = of_get_next_available_child(ulpi_node, NULL);
+ ci->hsic = of_device_is_compatible(phy_node, "qcom,usb-hsic-phy");
+ of_node_put(phy_node);
+ }
+ of_node_put(ulpi_node);
+
plat_ci = ci_hdrc_add_device(&pdev->dev,
pdev->resource, pdev->num_resources,
&ci_hdrc_msm_platdata);
--
2.9.0.rc2.8.ga28705d
[toc] | [prev] | [next] | [standalone]
| From | Stephen Boyd <stephen.boyd@linaro.org> |
|---|---|
| Date | 2016-09-07 23:50 +0200 |
| Subject | [PATCH v4 05/22] usb: chipidea: Handle extcon events properly |
| Message-ID | <seSTf-5pg-13@gated-at.bofh.it> |
| In reply to | #1478633 |
We're currently emulating the vbus and id interrupts in the OTGSC
read API, but we also need to make sure that if we're handling
the events with extcon that we don't enable the interrupts for
those events in the hardware. Therefore, properly emulate this
register if we're using extcon, but don't enable the interrupts.
This allows me to get my cable connect/disconnect working
properly without getting spurious interrupts on my device that
uses an extcon for these two events.
Acked-by: Peter Chen <peter.chen@nxp.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: "Ivan T. Ivanov" <iivanov.xz@gmail.com>
Fixes: 3ecb3e09b042 ("usb: chipidea: Use extcon framework for VBUS and ID detect")
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
---
drivers/usb/chipidea/otg.c | 46 +++++++++++++++++++++++++++++++++++++++-----
include/linux/usb/chipidea.h | 2 ++
2 files changed, 43 insertions(+), 5 deletions(-)
diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c
index a829607c3e4d..0cf149edddd8 100644
--- a/drivers/usb/chipidea/otg.c
+++ b/drivers/usb/chipidea/otg.c
@@ -44,12 +44,15 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
else
val &= ~OTGSC_BSVIS;
- cable->changed = false;
-
if (cable->state)
val |= OTGSC_BSV;
else
val &= ~OTGSC_BSV;
+
+ if (cable->enabled)
+ val |= OTGSC_BSVIE;
+ else
+ val &= ~OTGSC_BSVIE;
}
cable = &ci->platdata->id_extcon;
@@ -59,15 +62,18 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
else
val &= ~OTGSC_IDIS;
- cable->changed = false;
-
if (cable->state)
val |= OTGSC_ID;
else
val &= ~OTGSC_ID;
+
+ if (cable->enabled)
+ val |= OTGSC_IDIE;
+ else
+ val &= ~OTGSC_IDIE;
}
- return val;
+ return val & mask;
}
/**
@@ -77,6 +83,36 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
*/
void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data)
{
+ struct ci_hdrc_cable *cable;
+
+ cable = &ci->platdata->vbus_extcon;
+ if (!IS_ERR(cable->edev)) {
+ if (data & mask & OTGSC_BSVIS)
+ cable->changed = false;
+
+ /* Don't enable vbus interrupt if using external notifier */
+ if (data & mask & OTGSC_BSVIE) {
+ cable->enabled = true;
+ data &= ~OTGSC_BSVIE;
+ } else if (mask & OTGSC_BSVIE) {
+ cable->enabled = false;
+ }
+ }
+
+ cable = &ci->platdata->id_extcon;
+ if (!IS_ERR(cable->edev)) {
+ if (data & mask & OTGSC_IDIS)
+ cable->changed = false;
+
+ /* Don't enable id interrupt if using external notifier */
+ if (data & mask & OTGSC_IDIE) {
+ cable->enabled = true;
+ data &= ~OTGSC_IDIE;
+ } else if (mask & OTGSC_IDIE) {
+ cable->enabled = false;
+ }
+ }
+
hw_write(ci, OP_OTGSC, mask | OTGSC_INT_STATUS_BITS, data);
}
diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h
index 5dd75fa47dd8..f9be467d6695 100644
--- a/include/linux/usb/chipidea.h
+++ b/include/linux/usb/chipidea.h
@@ -14,6 +14,7 @@ struct ci_hdrc;
* struct ci_hdrc_cable - structure for external connector cable state tracking
* @state: current state of the line
* @changed: set to true when extcon event happen
+ * @enabled: set to true if we've enabled the vbus or id interrupt
* @edev: device which generate events
* @ci: driver state of the chipidea device
* @nb: hold event notification callback
@@ -22,6 +23,7 @@ struct ci_hdrc;
struct ci_hdrc_cable {
bool state;
bool changed;
+ bool enabled;
struct extcon_dev *edev;
struct ci_hdrc *ci;
struct notifier_block nb;
--
2.9.0.rc2.8.ga28705d
[toc] | [prev] | [next] | [standalone]
| From | Stephen Boyd <stephen.boyd@linaro.org> |
|---|---|
| Date | 2016-09-07 23:50 +0200 |
| Subject | [PATCH v4 09/22] usb: chipidea: Add support for ULPI PHY bus |
| Message-ID | <seSTf-5pg-15@gated-at.bofh.it> |
| In reply to | #1478633 |
Some phys for the chipidea controller are controlled via the ULPI
viewport. Add support for the ULPI bus so that these sorts of
phys can be probed and read/written automatically without having
to duplicate the viewport logic in each phy driver.
Acked-by: Peter Chen <peter.chen@nxp.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
---
drivers/usb/chipidea/Kconfig | 7 +++
drivers/usb/chipidea/Makefile | 1 +
drivers/usb/chipidea/ci.h | 21 ++++++++
drivers/usb/chipidea/core.c | 31 +++++++++---
drivers/usb/chipidea/ulpi.c | 113 ++++++++++++++++++++++++++++++++++++++++++
5 files changed, 167 insertions(+), 6 deletions(-)
create mode 100644 drivers/usb/chipidea/ulpi.c
diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
index 5e5b9eb7ebf6..19c20eaa23f2 100644
--- a/drivers/usb/chipidea/Kconfig
+++ b/drivers/usb/chipidea/Kconfig
@@ -38,4 +38,11 @@ config USB_CHIPIDEA_HOST
Say Y here to enable host controller functionality of the
ChipIdea driver.
+config USB_CHIPIDEA_ULPI
+ bool "ChipIdea ULPI PHY support"
+ depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_CHIPIDEA
+ help
+ Say Y here if you have a ULPI PHY attached to your ChipIdea
+ controller.
+
endif
diff --git a/drivers/usb/chipidea/Makefile b/drivers/usb/chipidea/Makefile
index 518e445476c3..39fca5715ed3 100644
--- a/drivers/usb/chipidea/Makefile
+++ b/drivers/usb/chipidea/Makefile
@@ -4,6 +4,7 @@ ci_hdrc-y := core.o otg.o debug.o
ci_hdrc-$(CONFIG_USB_CHIPIDEA_UDC) += udc.o
ci_hdrc-$(CONFIG_USB_CHIPIDEA_HOST) += host.o
ci_hdrc-$(CONFIG_USB_OTG_FSM) += otg_fsm.o
+ci_hdrc-$(CONFIG_USB_CHIPIDEA_ULPI) += ulpi.o
# Glue/Bridge layers go here
diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
index 05bc4d631cb9..59e22389c10b 100644
--- a/drivers/usb/chipidea/ci.h
+++ b/drivers/usb/chipidea/ci.h
@@ -18,6 +18,8 @@
#include <linux/usb.h>
#include <linux/usb/gadget.h>
#include <linux/usb/otg-fsm.h>
+#include <linux/usb/otg.h>
+#include <linux/ulpi/interface.h>
/******************************************************************************
* DEFINE
@@ -52,6 +54,7 @@ enum ci_hw_regs {
OP_ENDPTLISTADDR,
OP_TTCTRL,
OP_BURSTSIZE,
+ OP_ULPI_VIEWPORT,
OP_PORTSC,
OP_DEVLC,
OP_OTGSC,
@@ -187,6 +190,8 @@ struct hw_bank {
* @test_mode: the selected test mode
* @platdata: platform specific information supplied by parent device
* @vbus_active: is VBUS active
+ * @ulpi: pointer to ULPI device, if any
+ * @ulpi_ops: ULPI read/write ops for this device
* @phy: pointer to PHY, if any
* @usb_phy: pointer to USB PHY, if any and if using the USB PHY framework
* @hcd: pointer to usb_hcd for ehci host driver
@@ -236,6 +241,10 @@ struct ci_hdrc {
struct ci_hdrc_platform_data *platdata;
int vbus_active;
+#ifdef CONFIG_USB_CHIPIDEA_ULPI
+ struct ulpi *ulpi;
+ struct ulpi_ops ulpi_ops;
+#endif
struct phy *phy;
/* old usb_phy interface */
struct usb_phy *usb_phy;
@@ -418,6 +427,16 @@ static inline bool ci_otg_is_fsm_mode(struct ci_hdrc *ci)
#endif
}
+#if IS_ENABLED(CONFIG_USB_CHIPIDEA_ULPI)
+int ci_ulpi_init(struct ci_hdrc *ci);
+void ci_ulpi_exit(struct ci_hdrc *ci);
+int ci_ulpi_resume(struct ci_hdrc *ci);
+#else
+static inline int ci_ulpi_init(struct ci_hdrc *ci) { return 0; }
+static inline void ci_ulpi_exit(struct ci_hdrc *ci) { }
+static inline int ci_ulpi_resume(struct ci_hdrc *ci) { return 0; }
+#endif
+
u32 hw_read_intr_enable(struct ci_hdrc *ci);
u32 hw_read_intr_status(struct ci_hdrc *ci);
@@ -428,6 +447,8 @@ int hw_port_test_set(struct ci_hdrc *ci, u8 mode);
u8 hw_port_test_get(struct ci_hdrc *ci);
+void hw_phymode_configure(struct ci_hdrc *ci);
+
void ci_platform_configure(struct ci_hdrc *ci);
int dbg_create_files(struct ci_hdrc *ci);
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 532085a096d9..f144e1bbcc82 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -86,6 +86,7 @@ static const u8 ci_regs_nolpm[] = {
[OP_ENDPTLISTADDR] = 0x18U,
[OP_TTCTRL] = 0x1CU,
[OP_BURSTSIZE] = 0x20U,
+ [OP_ULPI_VIEWPORT] = 0x30U,
[OP_PORTSC] = 0x44U,
[OP_DEVLC] = 0x84U,
[OP_OTGSC] = 0x64U,
@@ -110,6 +111,7 @@ static const u8 ci_regs_lpm[] = {
[OP_ENDPTLISTADDR] = 0x18U,
[OP_TTCTRL] = 0x1CU,
[OP_BURSTSIZE] = 0x20U,
+ [OP_ULPI_VIEWPORT] = 0x30U,
[OP_PORTSC] = 0x44U,
[OP_DEVLC] = 0x84U,
[OP_OTGSC] = 0xC4U,
@@ -285,7 +287,7 @@ static int hw_device_init(struct ci_hdrc *ci, void __iomem *base)
return 0;
}
-static void hw_phymode_configure(struct ci_hdrc *ci)
+void hw_phymode_configure(struct ci_hdrc *ci)
{
u32 portsc, lpm, sts = 0;
@@ -894,6 +896,7 @@ static int ci_hdrc_probe(struct platform_device *pdev)
CI_HDRC_IMX28_WRITE_FIX);
ci->supports_runtime_pm = !!(ci->platdata->flags &
CI_HDRC_SUPPORTS_RUNTIME_PM);
+ platform_set_drvdata(pdev, ci);
ret = hw_device_init(ci, base);
if (ret < 0) {
@@ -901,6 +904,10 @@ static int ci_hdrc_probe(struct platform_device *pdev)
return -ENODEV;
}
+ ret = ci_ulpi_init(ci);
+ if (ret)
+ return ret;
+
if (ci->platdata->phy) {
ci->phy = ci->platdata->phy;
} else if (ci->platdata->usb_phy) {
@@ -911,11 +918,15 @@ static int ci_hdrc_probe(struct platform_device *pdev)
/* if both generic PHY and USB PHY layers aren't enabled */
if (PTR_ERR(ci->phy) == -ENOSYS &&
- PTR_ERR(ci->usb_phy) == -ENXIO)
- return -ENXIO;
+ PTR_ERR(ci->usb_phy) == -ENXIO) {
+ ret = -ENXIO;
+ goto ulpi_exit;
+ }
- if (IS_ERR(ci->phy) && IS_ERR(ci->usb_phy))
- return -EPROBE_DEFER;
+ if (IS_ERR(ci->phy) && IS_ERR(ci->usb_phy)) {
+ ret = -EPROBE_DEFER;
+ goto ulpi_exit;
+ }
if (IS_ERR(ci->phy))
ci->phy = NULL;
@@ -1000,7 +1011,6 @@ static int ci_hdrc_probe(struct platform_device *pdev)
}
}
- platform_set_drvdata(pdev, ci);
ret = devm_request_irq(dev, ci->irq, ci_irq, IRQF_SHARED,
ci->platdata->name, ci);
if (ret)
@@ -1032,6 +1042,8 @@ stop:
ci_role_destroy(ci);
deinit_phy:
ci_usb_phy_exit(ci);
+ulpi_exit:
+ ci_ulpi_exit(ci);
return ret;
}
@@ -1051,6 +1063,7 @@ static int ci_hdrc_remove(struct platform_device *pdev)
ci_role_destroy(ci);
ci_hdrc_enter_lpm(ci, true);
ci_usb_phy_exit(ci);
+ ci_ulpi_exit(ci);
return 0;
}
@@ -1098,6 +1111,7 @@ static void ci_controller_suspend(struct ci_hdrc *ci)
static int ci_controller_resume(struct device *dev)
{
struct ci_hdrc *ci = dev_get_drvdata(dev);
+ int ret;
dev_dbg(dev, "at %s\n", __func__);
@@ -1107,6 +1121,11 @@ static int ci_controller_resume(struct device *dev)
}
ci_hdrc_enter_lpm(ci, false);
+
+ ret = ci_ulpi_resume(ci);
+ if (ret)
+ return ret;
+
if (ci->usb_phy) {
usb_phy_set_suspend(ci->usb_phy, 0);
usb_phy_set_wakeup(ci->usb_phy, false);
diff --git a/drivers/usb/chipidea/ulpi.c b/drivers/usb/chipidea/ulpi.c
new file mode 100644
index 000000000000..3962255ff687
--- /dev/null
+++ b/drivers/usb/chipidea/ulpi.c
@@ -0,0 +1,113 @@
+/*
+ * Copyright (c) 2016 Linaro Ltd.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/device.h>
+#include <linux/usb/chipidea.h>
+#include <linux/ulpi/interface.h>
+
+#include "ci.h"
+
+#define ULPI_WAKEUP BIT(31)
+#define ULPI_RUN BIT(30)
+#define ULPI_WRITE BIT(29)
+#define ULPI_SYNC_STATE BIT(27)
+#define ULPI_ADDR(n) ((n) << 16)
+#define ULPI_DATA(n) (n)
+
+static int ci_ulpi_wait(struct ci_hdrc *ci, u32 mask)
+{
+ unsigned long usec = 10000;
+
+ while (usec--) {
+ if (!hw_read(ci, OP_ULPI_VIEWPORT, mask))
+ return 0;
+
+ udelay(1);
+ }
+
+ return -ETIMEDOUT;
+}
+
+static int ci_ulpi_read(struct ulpi_ops *ops, u8 addr)
+{
+ struct ci_hdrc *ci = dev_get_drvdata(ops->dev);
+ int ret;
+
+ hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff, ULPI_WRITE | ULPI_WAKEUP);
+ ret = ci_ulpi_wait(ci, ULPI_WAKEUP);
+ if (ret)
+ return ret;
+
+ hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff, ULPI_RUN | ULPI_ADDR(addr));
+ ret = ci_ulpi_wait(ci, ULPI_RUN);
+ if (ret)
+ return ret;
+
+ return hw_read(ci, OP_ULPI_VIEWPORT, GENMASK(15, 8)) >> 8;
+}
+
+static int ci_ulpi_write(struct ulpi_ops *ops, u8 addr, u8 val)
+{
+ struct ci_hdrc *ci = dev_get_drvdata(ops->dev);
+ int ret;
+
+ hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff, ULPI_WRITE | ULPI_WAKEUP);
+ ret = ci_ulpi_wait(ci, ULPI_WAKEUP);
+ if (ret)
+ return ret;
+
+ hw_write(ci, OP_ULPI_VIEWPORT, 0xffffffff,
+ ULPI_RUN | ULPI_WRITE | ULPI_ADDR(addr) | val);
+ return ci_ulpi_wait(ci, ULPI_RUN);
+}
+
+int ci_ulpi_init(struct ci_hdrc *ci)
+{
+ if (ci->platdata->phy_mode != USBPHY_INTERFACE_MODE_ULPI)
+ return 0;
+
+ /*
+ * Set PORTSC correctly so we can read/write ULPI registers for
+ * identification purposes
+ */
+ hw_phymode_configure(ci);
+
+ ci->ulpi_ops.read = ci_ulpi_read;
+ ci->ulpi_ops.write = ci_ulpi_write;
+ ci->ulpi = ulpi_register_interface(ci->dev, &ci->ulpi_ops);
+ if (IS_ERR(ci->ulpi))
+ dev_err(ci->dev, "failed to register ULPI interface");
+
+ return PTR_ERR_OR_ZERO(ci->ulpi);
+}
+
+void ci_ulpi_exit(struct ci_hdrc *ci)
+{
+ if (ci->ulpi) {
+ ulpi_unregister_interface(ci->ulpi);
+ ci->ulpi = NULL;
+ }
+}
+
+int ci_ulpi_resume(struct ci_hdrc *ci)
+{
+ int cnt = 100000;
+
+ while (cnt-- > 0) {
+ if (hw_read(ci, OP_ULPI_VIEWPORT, ULPI_SYNC_STATE))
+ return 0;
+ udelay(1);
+ }
+
+ return -ETIMEDOUT;
+}
--
2.9.0.rc2.8.ga28705d
[toc] | [prev] | [next] | [standalone]
| From | Stephen Boyd <stephen.boyd@linaro.org> |
|---|---|
| Date | 2016-09-07 23:50 +0200 |
| Subject | [PATCH v4 03/22] usb: ulpi: Support device discovery via DT |
| Message-ID | <seSTf-5pg-17@gated-at.bofh.it> |
| In reply to | #1478633 |
The qcom HSIC ULPI phy doesn't have any bits set in the vendor or
product ID registers. This makes it impossible to make a ULPI
driver match against the ID registers. Add support to discover
the ULPI phys via DT help alleviate this problem. In the DT case,
we'll look for a ULPI bus node underneath the device registering
the ULPI viewport (or the parent of that device to support
chipidea's device layout) and then match up the phy node
underneath that with the ULPI device that's created.
The side benefit of this is that we can use standard properties
in the phy node like clks, regulators, gpios, etc. because we
don't have firmware like ACPI to turn these things on for us. And
we can use the DT phy binding to point our phy consumer to the
phy provider.
The ULPI bus code supports native enumeration by reading the
vendor ID and product ID registers at device creation time, but
we can't be certain that those register reads will succeed if the
phy is not powered up. To avoid any problems with reading the ID
registers before the phy is powered we fallback to DT matching
when the ID reads fail.
If the ULPI spec had some generic power sequencing for these
registers we could put that into the ULPI bus layer and power up
the device before reading the ID registers. Unfortunately this
doesn't exist and the power sequence is usually device specific.
By having the device matched up with DT we can avoid this
problem.
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Cc: <devicetree@vger.kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
---
Documentation/devicetree/bindings/usb/ulpi.txt | 20 +++++++
drivers/usb/common/ulpi.c | 77 ++++++++++++++++++++++++--
2 files changed, 92 insertions(+), 5 deletions(-)
create mode 100644 Documentation/devicetree/bindings/usb/ulpi.txt
diff --git a/Documentation/devicetree/bindings/usb/ulpi.txt b/Documentation/devicetree/bindings/usb/ulpi.txt
new file mode 100644
index 000000000000..ca179dc4bd50
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/ulpi.txt
@@ -0,0 +1,20 @@
+ULPI bus binding
+----------------
+
+Phys that are behind a ULPI connection can be described with the following
+binding. The host controller shall have a "ulpi" named node as a child, and
+that node shall have one enabled node underneath it representing the ulpi
+device on the bus.
+
+EXAMPLE
+-------
+
+usb {
+ compatible = "vendor,usb-controller";
+
+ ulpi {
+ phy {
+ compatible = "vendor,phy";
+ };
+ };
+};
diff --git a/drivers/usb/common/ulpi.c b/drivers/usb/common/ulpi.c
index 01c0c0477a9e..24689e05a3df 100644
--- a/drivers/usb/common/ulpi.c
+++ b/drivers/usb/common/ulpi.c
@@ -16,6 +16,9 @@
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/acpi.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/clk/clk-conf.h>
/* -------------------------------------------------------------------------- */
@@ -39,6 +42,10 @@ static int ulpi_match(struct device *dev, struct device_driver *driver)
struct ulpi *ulpi = to_ulpi_dev(dev);
const struct ulpi_device_id *id;
+ /* Some ULPI devices don't have a vendor id so rely on OF match */
+ if (ulpi->id.vendor == 0)
+ return of_driver_match_device(dev, driver);
+
for (id = drv->id_table; id->vendor; id++)
if (id->vendor == ulpi->id.vendor &&
id->product == ulpi->id.product)
@@ -50,6 +57,11 @@ static int ulpi_match(struct device *dev, struct device_driver *driver)
static int ulpi_uevent(struct device *dev, struct kobj_uevent_env *env)
{
struct ulpi *ulpi = to_ulpi_dev(dev);
+ int ret;
+
+ ret = of_device_uevent_modalias(dev, env);
+ if (ret != -ENODEV)
+ return ret;
if (add_uevent_var(env, "MODALIAS=ulpi:v%04xp%04x",
ulpi->id.vendor, ulpi->id.product))
@@ -60,6 +72,11 @@ static int ulpi_uevent(struct device *dev, struct kobj_uevent_env *env)
static int ulpi_probe(struct device *dev)
{
struct ulpi_driver *drv = to_ulpi_driver(dev->driver);
+ int ret;
+
+ ret = of_clk_set_defaults(dev->of_node, false);
+ if (ret < 0)
+ return ret;
return drv->probe(to_ulpi_dev(dev));
}
@@ -87,8 +104,13 @@ static struct bus_type ulpi_bus = {
static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
+ int len;
struct ulpi *ulpi = to_ulpi_dev(dev);
+ len = of_device_get_modalias(dev, buf, PAGE_SIZE - 1);
+ if (len != -ENODEV)
+ return len;
+
return sprintf(buf, "ulpi:v%04xp%04x\n",
ulpi->id.vendor, ulpi->id.product);
}
@@ -152,21 +174,44 @@ EXPORT_SYMBOL_GPL(ulpi_unregister_driver);
/* -------------------------------------------------------------------------- */
-static int ulpi_register(struct device *dev, struct ulpi *ulpi)
+static int ulpi_of_register(struct ulpi *ulpi)
+{
+ struct device_node *np = NULL, *child;
+
+ /* Find a ulpi bus underneath the parent or the parent of the parent */
+ if (ulpi->dev.parent->of_node)
+ np = of_find_node_by_name(ulpi->dev.parent->of_node, "ulpi");
+ else if (ulpi->dev.parent->parent && ulpi->dev.parent->parent->of_node)
+ np = of_find_node_by_name(ulpi->dev.parent->parent->of_node,
+ "ulpi");
+ if (!np)
+ return 0;
+
+ child = of_get_next_available_child(np, NULL);
+ of_node_put(np);
+ if (!child)
+ return -EINVAL;
+
+ ulpi->dev.of_node = child;
+
+ return 0;
+}
+
+static int ulpi_read_id(struct ulpi *ulpi)
{
int ret;
/* Test the interface */
ret = ulpi_write(ulpi, ULPI_SCRATCH, 0xaa);
if (ret < 0)
- return ret;
+ goto err;
ret = ulpi_read(ulpi, ULPI_SCRATCH);
if (ret < 0)
- return ret;
+ goto err;
if (ret != 0xaa)
- return -ENODEV;
+ goto err;
ulpi->id.vendor = ulpi_read(ulpi, ULPI_VENDOR_ID_LOW);
ulpi->id.vendor |= ulpi_read(ulpi, ULPI_VENDOR_ID_HIGH) << 8;
@@ -174,6 +219,21 @@ static int ulpi_register(struct device *dev, struct ulpi *ulpi)
ulpi->id.product = ulpi_read(ulpi, ULPI_PRODUCT_ID_LOW);
ulpi->id.product |= ulpi_read(ulpi, ULPI_PRODUCT_ID_HIGH) << 8;
+ /* Some ULPI devices don't have a vendor id so rely on OF match */
+ if (ulpi->id.vendor == 0)
+ goto err;
+
+ request_module("ulpi:v%04xp%04x", ulpi->id.vendor, ulpi->id.product);
+
+ return 0;
+err:
+ return of_device_request_module(&ulpi->dev);
+}
+
+static int ulpi_register(struct device *dev, struct ulpi *ulpi)
+{
+ int ret;
+
ulpi->dev.parent = dev;
ulpi->dev.bus = &ulpi_bus;
ulpi->dev.type = &ulpi_dev_type;
@@ -181,7 +241,13 @@ static int ulpi_register(struct device *dev, struct ulpi *ulpi)
ACPI_COMPANION_SET(&ulpi->dev, ACPI_COMPANION(dev));
- request_module("ulpi:v%04xp%04x", ulpi->id.vendor, ulpi->id.product);
+ ret = ulpi_of_register(ulpi);
+ if (ret)
+ return ret;
+
+ ret = ulpi_read_id(ulpi);
+ if (ret)
+ return ret;
ret = device_register(&ulpi->dev);
if (ret)
@@ -232,6 +298,7 @@ EXPORT_SYMBOL_GPL(ulpi_register_interface);
*/
void ulpi_unregister_interface(struct ulpi *ulpi)
{
+ of_node_put(ulpi->dev.of_node);
device_unregister(&ulpi->dev);
}
EXPORT_SYMBOL_GPL(ulpi_unregister_interface);
--
2.9.0.rc2.8.ga28705d
[toc] | [prev] | [next] | [standalone]
| From | Rob Herring <robh+dt@kernel.org> |
|---|---|
| Date | 2016-09-08 03:20 +0200 |
| Subject | Re: [PATCH v4 03/22] usb: ulpi: Support device discovery via DT |
| Message-ID | <seWau-7zT-15@gated-at.bofh.it> |
| In reply to | #1478644 |
On Wed, Sep 7, 2016 at 4:35 PM, Stephen Boyd <stephen.boyd@linaro.org> wrote:
> The qcom HSIC ULPI phy doesn't have any bits set in the vendor or
> product ID registers. This makes it impossible to make a ULPI
> driver match against the ID registers. Add support to discover
> the ULPI phys via DT help alleviate this problem. In the DT case,
> we'll look for a ULPI bus node underneath the device registering
> the ULPI viewport (or the parent of that device to support
> chipidea's device layout) and then match up the phy node
> underneath that with the ULPI device that's created.
>
> The side benefit of this is that we can use standard properties
> in the phy node like clks, regulators, gpios, etc. because we
> don't have firmware like ACPI to turn these things on for us. And
> we can use the DT phy binding to point our phy consumer to the
> phy provider.
>
> The ULPI bus code supports native enumeration by reading the
> vendor ID and product ID registers at device creation time, but
> we can't be certain that those register reads will succeed if the
> phy is not powered up. To avoid any problems with reading the ID
> registers before the phy is powered we fallback to DT matching
> when the ID reads fail.
>
> If the ULPI spec had some generic power sequencing for these
> registers we could put that into the ULPI bus layer and power up
> the device before reading the ID registers. Unfortunately this
> doesn't exist and the power sequence is usually device specific.
> By having the device matched up with DT we can avoid this
> problem.
>
> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com>
> Cc: <devicetree@vger.kernel.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
> ---
> Documentation/devicetree/bindings/usb/ulpi.txt | 20 +++++++
> drivers/usb/common/ulpi.c | 77 ++++++++++++++++++++++++--
> 2 files changed, 92 insertions(+), 5 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/usb/ulpi.txt
Acked-by: Rob Herring <robh@kernel.org>
But one concern below.
> -static int ulpi_register(struct device *dev, struct ulpi *ulpi)
> +static int ulpi_of_register(struct ulpi *ulpi)
> +{
> + struct device_node *np = NULL, *child;
> +
> + /* Find a ulpi bus underneath the parent or the parent of the parent */
parent of the parent is called the grandparent.
> + if (ulpi->dev.parent->of_node)
> + np = of_find_node_by_name(ulpi->dev.parent->of_node, "ulpi");
> + else if (ulpi->dev.parent->parent && ulpi->dev.parent->parent->of_node)
> + np = of_find_node_by_name(ulpi->dev.parent->parent->of_node,
First setting "parent = ulpi->dev.parent" would make this a bit easier
on the eyes.
When is it valid to be the grandparent? The binding doesn't mention that.
Rob
[toc] | [prev] | [next] | [standalone]
| From | Stephen Boyd <stephen.boyd@linaro.org> |
|---|---|
| Date | 2016-09-07 23:50 +0200 |
| Subject | [PATCH v4 04/22] usb: chipidea: Only read/write OTGSC from one place |
| Message-ID | <seSTf-5pg-19@gated-at.bofh.it> |
| In reply to | #1478633 |
With the id and vbus detection done via extcon we need to make
sure we poll the status of OTGSC properly by considering what the
extcon is saying, and not just what the register is saying. Let's
move this hw_wait_reg() function to the only place it's used and
simplify it for polling the OTGSC register. Then we can make
certain we only use the hw_read_otgsc() API to read OTGSC, which
will make sure we properly handle extcon events.
Acked-by: Peter Chen <peter.chen@nxp.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: "Ivan T. Ivanov" <iivanov.xz@gmail.com>
Fixes: 3ecb3e09b042 ("usb: chipidea: Use extcon framework for VBUS and ID detect")
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
---
drivers/usb/chipidea/ci.h | 3 ---
drivers/usb/chipidea/core.c | 32 --------------------------------
drivers/usb/chipidea/otg.c | 34 ++++++++++++++++++++++++++++++----
3 files changed, 30 insertions(+), 39 deletions(-)
diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
index cd414559040f..05bc4d631cb9 100644
--- a/drivers/usb/chipidea/ci.h
+++ b/drivers/usb/chipidea/ci.h
@@ -428,9 +428,6 @@ int hw_port_test_set(struct ci_hdrc *ci, u8 mode);
u8 hw_port_test_get(struct ci_hdrc *ci);
-int hw_wait_reg(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask,
- u32 value, unsigned int timeout_ms);
-
void ci_platform_configure(struct ci_hdrc *ci);
int dbg_create_files(struct ci_hdrc *ci);
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 69426e644d17..01390e02ee53 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -516,38 +516,6 @@ int hw_device_reset(struct ci_hdrc *ci)
return 0;
}
-/**
- * hw_wait_reg: wait the register value
- *
- * Sometimes, it needs to wait register value before going on.
- * Eg, when switch to device mode, the vbus value should be lower
- * than OTGSC_BSV before connects to host.
- *
- * @ci: the controller
- * @reg: register index
- * @mask: mast bit
- * @value: the bit value to wait
- * @timeout_ms: timeout in millisecond
- *
- * This function returns an error code if timeout
- */
-int hw_wait_reg(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask,
- u32 value, unsigned int timeout_ms)
-{
- unsigned long elapse = jiffies + msecs_to_jiffies(timeout_ms);
-
- while (hw_read(ci, reg, mask) != value) {
- if (time_after(jiffies, elapse)) {
- dev_err(ci->dev, "timeout waiting for %08x in %d\n",
- mask, reg);
- return -ETIMEDOUT;
- }
- msleep(20);
- }
-
- return 0;
-}
-
static irqreturn_t ci_irq(int irq, void *data)
{
struct ci_hdrc *ci = data;
diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c
index 03b6743461d1..a829607c3e4d 100644
--- a/drivers/usb/chipidea/otg.c
+++ b/drivers/usb/chipidea/otg.c
@@ -104,7 +104,31 @@ void ci_handle_vbus_change(struct ci_hdrc *ci)
usb_gadget_vbus_disconnect(&ci->gadget);
}
-#define CI_VBUS_STABLE_TIMEOUT_MS 5000
+/**
+ * When we switch to device mode, the vbus value should be lower
+ * than OTGSC_BSV before connecting to host.
+ *
+ * @ci: the controller
+ *
+ * This function returns an error code if timeout
+ */
+static int hw_wait_vbus_lower_bsv(struct ci_hdrc *ci)
+{
+ unsigned long elapse = jiffies + msecs_to_jiffies(5000);
+ u32 mask = OTGSC_BSV;
+
+ while (hw_read_otgsc(ci, mask)) {
+ if (time_after(jiffies, elapse)) {
+ dev_err(ci->dev, "timeout waiting for %08x in OTGSC\n",
+ mask);
+ return -ETIMEDOUT;
+ }
+ msleep(20);
+ }
+
+ return 0;
+}
+
static void ci_handle_id_switch(struct ci_hdrc *ci)
{
enum ci_role role = ci_otg_role(ci);
@@ -116,9 +140,11 @@ static void ci_handle_id_switch(struct ci_hdrc *ci)
ci_role_stop(ci);
if (role == CI_ROLE_GADGET)
- /* wait vbus lower than OTGSC_BSV */
- hw_wait_reg(ci, OP_OTGSC, OTGSC_BSV, 0,
- CI_VBUS_STABLE_TIMEOUT_MS);
+ /*
+ * wait vbus lower than OTGSC_BSV before connecting
+ * to host
+ */
+ hw_wait_vbus_lower_bsv(ci);
ci_role_start(ci, role);
}
--
2.9.0.rc2.8.ga28705d
[toc] | [prev] | [next] | [standalone]
| From | Stephen Boyd <stephen.boyd@linaro.org> |
|---|---|
| Date | 2016-09-07 23:50 +0200 |
| Subject | [PATCH v4 02/22] of: device: Export of_device_{get_modalias,uvent_modalias} to modules |
| Message-ID | <seSTf-5pg-23@gated-at.bofh.it> |
| In reply to | #1478633 |
The ULPI bus can be built as a module, and it will soon be
calling these functions when it supports probing devices from DT.
Export them so they can be used by the ULPI module.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
---
drivers/of/device.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/of/device.c b/drivers/of/device.c
index 8a22a253a830..6719ab35b62e 100644
--- a/drivers/of/device.c
+++ b/drivers/of/device.c
@@ -225,6 +225,7 @@ ssize_t of_device_get_modalias(struct device *dev, char *str, ssize_t len)
return tsize;
}
+EXPORT_SYMBOL_GPL(of_device_get_modalias);
int of_device_request_module(struct device *dev)
{
@@ -290,6 +291,7 @@ void of_device_uevent(struct device *dev, struct kobj_uevent_env *env)
}
mutex_unlock(&of_mutex);
}
+EXPORT_SYMBOL_GPL(of_device_uevent_modalias);
int of_device_uevent_modalias(struct device *dev, struct kobj_uevent_env *env)
{
--
2.9.0.rc2.8.ga28705d
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| From | Rob Herring <robh+dt@kernel.org> |
|---|---|
| Date | 2016-09-08 03:00 +0200 |
| Subject | Re: [PATCH v4 02/22] of: device: Export of_device_{get_modalias,uvent_modalias} to modules |
| Message-ID | <seVR8-7eA-3@gated-at.bofh.it> |
| In reply to | #1478646 |
On Wed, Sep 7, 2016 at 4:34 PM, Stephen Boyd <stephen.boyd@linaro.org> wrote: > The ULPI bus can be built as a module, and it will soon be > calling these functions when it supports probing devices from DT. > Export them so they can be used by the ULPI module. > > Cc: Rob Herring <robh+dt@kernel.org> > Cc: <devicetree@vger.kernel.org> > Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> > --- > drivers/of/device.c | 2 ++ > 1 file changed, 2 insertions(+) Acked-by: Rob Herring <robh@kernel.org>
[toc] | [prev] | [next] | [standalone]
| From | Peter Chen <hzpeterchen@gmail.com> |
|---|---|
| Date | 2016-09-08 04:10 +0200 |
| Message-ID | <seWWR-85x-13@gated-at.bofh.it> |
| In reply to | #1478633 |
On Thu, Sep 8, 2016 at 5:34 AM, Stephen Boyd <stephen.boyd@linaro.org> wrote:
> The state of USB ChipIdea support on Qualcomm's platforms is not great.
> The DT description of these devices requires up to three different nodes
> for what amounts to be the same hardware block, when there should really
> only be one. Furthermore, the "phy" driver that is in mainline (phy-msm-usb.c)
> duplicates the OTG state machine and touches the ci controller wrapper
> registers when it should really be focused on the phy and the ULPI accesses
> needed to get the phy working. There's also a slimmed down phy driver for
> the msm8916 platform, but really the phy hardware is the same as other MSMs,
> so we have two drivers doing pretty much the same thing. This leads to a
> situtaion where we have the chipidea core driver, the "phy" driver, and
> sometimes the ehci-msm.c driver operating the same device all at the same
> time with very little coordination. This just isn't very safe and is
> confusing from a driver perspective when trying to figure out who does what.
> Finally, there isn't any HSIC support on platforms like apq8074 so we
> should add that.
>
> This patch series updates the ChipIdea driver and the MSM wrapper
> (ci_hdrc_msm.c) to properly handle the PHY and wrapper bits at the right
> times in the right places. To get there, we update the ChipIdea core to
> have support for the ULPI phy bus introduced by Heikki. Along the way
> we fix bugs with the extcon handling for peripheral and OTG mode controllers
> and move the parts of phy-usb-msm.c that are touching the CI controller
> wrapper into the wrapper driver (ci_hdrc_msm.c). Finally we add support
> for the HSIC phy based on the ULPI bus and rewrite the HS phy driver
> (phy-usb-msm.c) as a standard ULPI phy driver.
>
> Once this series is accepted, we should be able to delete the phy-usb-msm.c,
> phy-qcom-8x16-usb.c, and ehci-msm.c drivers from the tree and use the ULPI
> based phy driver (which also lives in drivers/phy/ instead of drivers/usb/phy/)
> and the chipidea host core instead.
>
> I've also sent separate patches for other minor pieces to make this
> all work. The full tree can be found here[3], hacks and all to get
> things working. I've tested this on the db410c, apq8074 dragonboard,
> and ifc6410 with configfs gadgets and otg cables.
>
> Patches based on v4.8-rc1
>
> Changes from v3:
>
> * Picked up Acks from Peter
>
> * Updated extcon consolidation patch per Peter's comments
>
> * Folded in simplification from Heikki for ULPI DT matching
>
I find the kbuild dependency error when compile your series, I remembered
someone met it before, would you have a solution:
GEN ./Makefile
scripts/kconfig/conf --silentoldconfig Kconfig
drivers/usb/Kconfig:39:error: recursive dependency detected!
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
drivers/usb/Kconfig:39: symbol USB is selected by MOUSE_APPLETOUCH
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
drivers/input/mouse/Kconfig:187: symbol MOUSE_APPLETOUCH depends on INPUT
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
drivers/input/Kconfig:8: symbol INPUT is selected by VT
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
drivers/tty/Kconfig:12: symbol VT is selected by FB_STI
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
drivers/video/fbdev/Kconfig:674: symbol FB_STI depends on FB
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
drivers/video/fbdev/Kconfig:5: symbol FB is selected by DRM_KMS_FB_HELPER
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
drivers/gpu/drm/Kconfig:42: symbol DRM_KMS_FB_HELPER is selected by
DRM_KMS_CMA_HELPER
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
drivers/gpu/drm/Kconfig:98: symbol DRM_KMS_CMA_HELPER is selected by DRM_IMX
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
drivers/gpu/drm/imx/Kconfig:1: symbol DRM_IMX depends on IMX_IPUV3_CORE
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
drivers/gpu/ipu-v3/Kconfig:1: symbol IMX_IPUV3_CORE depends on RESET_CONTROLLER
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
drivers/reset/Kconfig:4: symbol RESET_CONTROLLER is selected by USB_CHIPIDEA
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
drivers/usb/chipidea/Kconfig:1: symbol USB_CHIPIDEA depends on USB_EHCI_HCD
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
drivers/usb/host/Kconfig:84: symbol USB_EHCI_HCD depends on USB
#
Peter
> Changes from v2:
>
> * Added SoC specific compatibles in phy bindings
>
> * Dropped AVVIS patch for OTG statemachine
>
> * New patch to consolidate extcon handlers
>
> * Picked up Acks from Peter
>
> * Rebased onto v4.8-rc1
>
> * Reworked ULPI OF code to look at vid == 0 instead of pid == 0
>
> * Dropped ULPI bindings for vid and pid overrides
>
> Changes from v1:
>
> * Reworked ULPI device probing to keep using vendor/product ids that
> come from DT if needed and falls back to OF style match when product id
> is 0
>
> * PHY init later patch was rejected so that moved to a quirk flag and
> the msm wrapper started managing the phy on/off
>
> * Updated clk requirements for HSIC phy in binding doc
>
> * Added optional clk in wrapper for "housekeeping" found on older qcom
> platforms
>
> * Bug fix to OTGSC polling function
>
> * Changed runtime PM patch to set as active instead of get/put
>
> TODO:
> * DMA fails on arm64 so we need something like [1] to make it work.
>
> * The db410c needs a driver to toggle the onboard switch to connect
> the usb hub instead of micro port when the usb cable is disconnected
>
> * apq8064 platforms need a vbus regulator to really use otg and I haven't
> tried out the RPM based regulators yet
>
> * The HSIC phy on the apq8074 dragonboard is connected to a usb4604
> device which requires the i2c driver to probe and send an i2c
> sequence before the HSIC controller enumerates or HSIC doesn't work.
> Right now I have a hack to force the controller to probe defer
> once so that usb4604 probes first. This needs a more proper solution
> like having the DT describe a linkage between the controller and
> the usb device so we can enforce probe ordering.
>
> * OTG support requires a working VBUS supply on apq8074 dragonboard
> and that requires changes to the smbb_charger driver to support
> the OTG OVP switch as a regulator[2]. This series needs revival
> on the list so that OTG works properly on that board.
>
> [1] https://lkml.org/lkml/2016/2/22/7
> [2] http://lkml.kernel.org/g/1449621618-11900-1-git-send-email-tim.bird@sonymobile.com
> [3] https://git.linaro.org/people/stephen.boyd/linux.git/shortlog/refs/heads/usb-hsic-8074
>
>
> Stephen Boyd (22):
> of: device: Support loading a module with OF based modalias
> of: device: Export of_device_{get_modalias,uvent_modalias} to modules
> usb: ulpi: Support device discovery via DT
> usb: chipidea: Only read/write OTGSC from one place
> usb: chipidea: Handle extcon events properly
> usb: chipidea: Add platform flag for wrapper phy management
> usb: chipidea: Notify events when switching host mode
> usb: chipidea: Remove locking in ci_udc_start()
> usb: chipidea: Add support for ULPI PHY bus
> usb: chipidea: Consolidate extcon notifiers
> usb: chipidea: msm: Mark device as runtime pm active
> usb: chipidea: msm: Rely on core to override AHBBURST
> usb: chipidea: msm: Use hw_write_id_reg() instead of writel
> usb: chipidea: msm: Add proper clk and reset support
> usb: chipidea: msm: Mux over secondary phy at the right time
> usb: chipidea: msm: Restore wrapper settings after reset
> usb: chipidea: msm: Make platform data driver local instead of global
> usb: chipidea: msm: Add reset controller for PHY POR bit
> usb: chipidea: msm: Handle phy power states
> usb: chipidea: msm: Be silent on probe defer errors
> phy: Add support for Qualcomm's USB HSIC phy
> phy: Add support for Qualcomm's USB HS phy
>
> .../devicetree/bindings/phy/qcom,usb-hs-phy.txt | 83 ++++++
> .../devicetree/bindings/phy/qcom,usb-hsic-phy.txt | 65 +++++
> Documentation/devicetree/bindings/usb/ulpi.txt | 20 ++
> drivers/of/device.c | 25 ++
> drivers/phy/Kconfig | 15 ++
> drivers/phy/Makefile | 2 +
> drivers/phy/phy-qcom-usb-hs.c | 289 +++++++++++++++++++++
> drivers/phy/phy-qcom-usb-hsic.c | 160 ++++++++++++
> drivers/usb/chipidea/Kconfig | 8 +
> drivers/usb/chipidea/Makefile | 1 +
> drivers/usb/chipidea/ci.h | 22 +-
> drivers/usb/chipidea/ci_hdrc_msm.c | 280 +++++++++++++++++---
> drivers/usb/chipidea/core.c | 122 ++++-----
> drivers/usb/chipidea/host.c | 10 +
> drivers/usb/chipidea/otg.c | 86 +++++-
> drivers/usb/chipidea/udc.c | 3 -
> drivers/usb/chipidea/ulpi.c | 113 ++++++++
> drivers/usb/common/ulpi.c | 77 +++++-
> include/linux/of_device.h | 6 +
> include/linux/usb/chipidea.h | 9 +-
> 20 files changed, 1259 insertions(+), 137 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt
> create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
> create mode 100644 Documentation/devicetree/bindings/usb/ulpi.txt
> create mode 100644 drivers/phy/phy-qcom-usb-hs.c
> create mode 100644 drivers/phy/phy-qcom-usb-hsic.c
> create mode 100644 drivers/usb/chipidea/ulpi.c
>
> --
> 2.9.0.rc2.8.ga28705d
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
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| From | Peter Chen <hzpeterchen@gmail.com> |
|---|---|
| Date | 2016-09-09 02:50 +0200 |
| Subject | Re: [PATCH v4 00/22] Support qcom's HSIC USB and rewrite USB2 HS support |
| Message-ID | <sfib0-4rd-11@gated-at.bofh.it> |
| In reply to | #1478733 |
On Thu, Sep 08, 2016 at 02:13:28PM -0700, Stephen Boyd wrote: > Quoting Peter Chen (2016-09-07 19:06:45) > > On Thu, Sep 8, 2016 at 5:34 AM, Stephen Boyd <stephen.boyd@linaro.org> wrote: > > > The state of USB ChipIdea support on Qualcomm's platforms is not great. > > > The DT description of these devices requires up to three different nodes > > > for what amounts to be the same hardware block, when there should really > > > only be one. Furthermore, the "phy" driver that is in mainline (phy-msm-usb.c) > > > duplicates the OTG state machine and touches the ci controller wrapper > > > registers when it should really be focused on the phy and the ULPI accesses > > > needed to get the phy working. There's also a slimmed down phy driver for > > > the msm8916 platform, but really the phy hardware is the same as other MSMs, > > > so we have two drivers doing pretty much the same thing. This leads to a > > > situtaion where we have the chipidea core driver, the "phy" driver, and > > > sometimes the ehci-msm.c driver operating the same device all at the same > > > time with very little coordination. This just isn't very safe and is > > > confusing from a driver perspective when trying to figure out who does what. > > > Finally, there isn't any HSIC support on platforms like apq8074 so we > > > should add that. > > > > > > This patch series updates the ChipIdea driver and the MSM wrapper > > > (ci_hdrc_msm.c) to properly handle the PHY and wrapper bits at the right > > > times in the right places. To get there, we update the ChipIdea core to > > > have support for the ULPI phy bus introduced by Heikki. Along the way > > > we fix bugs with the extcon handling for peripheral and OTG mode controllers > > > and move the parts of phy-usb-msm.c that are touching the CI controller > > > wrapper into the wrapper driver (ci_hdrc_msm.c). Finally we add support > > > for the HSIC phy based on the ULPI bus and rewrite the HS phy driver > > > (phy-usb-msm.c) as a standard ULPI phy driver. > > > > > > Once this series is accepted, we should be able to delete the phy-usb-msm.c, > > > phy-qcom-8x16-usb.c, and ehci-msm.c drivers from the tree and use the ULPI > > > based phy driver (which also lives in drivers/phy/ instead of drivers/usb/phy/) > > > and the chipidea host core instead. > > > > > > I've also sent separate patches for other minor pieces to make this > > > all work. The full tree can be found here[3], hacks and all to get > > > things working. I've tested this on the db410c, apq8074 dragonboard, > > > and ifc6410 with configfs gadgets and otg cables. > > > > > > Patches based on v4.8-rc1 > > > > > > Changes from v3: > > > > > > * Picked up Acks from Peter > > > > > > * Updated extcon consolidation patch per Peter's comments > > > > > > * Folded in simplification from Heikki for ULPI DT matching > > > > > > > I find the kbuild dependency error when compile your series, I remembered > > someone met it before, would you have a solution: > > Yes. Should I send it through the drm maintainers? > Yes, please add me at cc list, thanks. Peter > ---8<--- > From: Stephen Boyd <stephen.boyd@linaro.org> > Subject: [PATCH] gpu: Remove depends on RESET_CONTROLLER when not a provider > > These GPU drivers only depend on the RESET_CONTROLLER config > option to fix build issues that existed when there weren't stub > reset APIs for reset controller consumers. Given that these > drivers aren't providing any reset controllers themselves, they > don't actually depend on the API to build (just to function) so > they don't need to depend on it. Remove the dependency to fix > recursive build errors like the following: > > drivers/usb/Kconfig:39:error: recursive dependency detected! > drivers/usb/Kconfig:39: symbol USB is selected by MOUSE_APPLETOUCH > drivers/input/mouse/Kconfig:187: symbol MOUSE_APPLETOUCH depends on INPUT > drivers/input/Kconfig:8: symbol INPUT is selected by VT > drivers/tty/Kconfig:12: symbol VT is selected by FB_STI > drivers/video/fbdev/Kconfig:674: symbol FB_STI depends on FB > drivers/video/fbdev/Kconfig:5: symbol FB is selected by DRM_KMS_FB_HELPER > drivers/gpu/drm/Kconfig:42: symbol DRM_KMS_FB_HELPER is selected by DRM_KMS_CMA_HELPER > drivers/gpu/drm/Kconfig:98: symbol DRM_KMS_CMA_HELPER is selected by DRM_IMX > drivers/gpu/drm/imx/Kconfig:1: symbol DRM_IMX depends on IMX_IPUV3_CORE > drivers/gpu/ipu-v3/Kconfig:1: symbol IMX_IPUV3_CORE depends on RESET_CONTROLLER > drivers/reset/Kconfig:4: symbol RESET_CONTROLLER is selected by USB_CHIPIDEA > drivers/usb/chipidea/Kconfig:1: symbol USB_CHIPIDEA depends on USB_EHCI_HCD > drivers/usb/host/Kconfig:84: symbol USB_EHCI_HCD depends on USB > > Cc: Arnd Bergmann <arnd@arndb.de> > Cc: David Airlie <airlied@linux.ie> > Cc: <dri-devel@lists.freedesktop.org> > Cc: Heiko Stuebner <heiko@sntech.de> > Cc: Mark Yao <mark.yao@rock-chips.com> > Cc: Philipp Zabel <p.zabel@pengutronix.de> > Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> > --- > drivers/gpu/drm/rockchip/Kconfig | 1 - > drivers/gpu/drm/tegra/Kconfig | 1 - > drivers/gpu/ipu-v3/Kconfig | 1 - > 3 files changed, 3 deletions(-) > > diff --git a/drivers/gpu/drm/rockchip/Kconfig b/drivers/gpu/drm/rockchip/Kconfig > index 3c58669a06ce..6f7f9c59f05b 100644 > --- a/drivers/gpu/drm/rockchip/Kconfig > +++ b/drivers/gpu/drm/rockchip/Kconfig > @@ -1,7 +1,6 @@ > config DRM_ROCKCHIP > tristate "DRM Support for Rockchip" > depends on DRM && ROCKCHIP_IOMMU > - depends on RESET_CONTROLLER > select DRM_GEM_CMA_HELPER > select DRM_KMS_HELPER > select DRM_PANEL > diff --git a/drivers/gpu/drm/tegra/Kconfig b/drivers/gpu/drm/tegra/Kconfig > index 63ebb154b9b5..bbf5a4b7e0b6 100644 > --- a/drivers/gpu/drm/tegra/Kconfig > +++ b/drivers/gpu/drm/tegra/Kconfig > @@ -3,7 +3,6 @@ config DRM_TEGRA > depends on ARCH_TEGRA || (ARM && COMPILE_TEST) > depends on COMMON_CLK > depends on DRM > - depends on RESET_CONTROLLER > select DRM_KMS_HELPER > select DRM_MIPI_DSI > select DRM_PANEL > diff --git a/drivers/gpu/ipu-v3/Kconfig b/drivers/gpu/ipu-v3/Kconfig > index aefdff95356d..08766c6e7856 100644 > --- a/drivers/gpu/ipu-v3/Kconfig > +++ b/drivers/gpu/ipu-v3/Kconfig > @@ -1,7 +1,6 @@ > config IMX_IPUV3_CORE > tristate "IPUv3 core support" > depends on SOC_IMX5 || SOC_IMX6Q || ARCH_MULTIPLATFORM > - depends on RESET_CONTROLLER > select GENERIC_IRQ_CHIP > help > Choose this if you have a i.MX5/6 system and want to use the Image > -- > 2.9.0.rc2.8.ga28705d -- Best Regards, Peter Chen
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