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| Started by | Gerd Hoffmann <kraxel@redhat.com> |
|---|---|
| First post | 2016-09-07 12:40 +0200 |
| Last post | 2016-09-09 11:10 +0200 |
| Articles | 6 — 3 participants |
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[PATCH 1/8] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node. Gerd Hoffmann <kraxel@redhat.com> - 2016-09-07 12:40 +0200
Re: [PATCH 1/8] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node. Stefan Wahren <stefan.wahren@i2se.com> - 2016-09-07 20:20 +0200
Re: [PATCH 1/8] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node. Eric Anholt <eric@anholt.net> - 2016-09-07 21:00 +0200
Re: [PATCH 1/8] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node. Gerd Hoffmann <kraxel@redhat.com> - 2016-09-08 09:50 +0200
Re: [PATCH 1/8] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node. Stefan Wahren <stefan.wahren@i2se.com> - 2016-09-08 20:00 +0200
Re: [PATCH 1/8] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node. Gerd Hoffmann <kraxel@redhat.com> - 2016-09-09 11:10 +0200
| From | Gerd Hoffmann <kraxel@redhat.com> |
|---|---|
| Date | 2016-09-07 12:40 +0200 |
| Subject | [PATCH 1/8] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node. |
| Message-ID | <seIqT-6Zc-53@gated-at.bofh.it> |
From: Eric Anholt <eric@anholt.net>
The BCM2835-ARM-Peripherals.pdf documentation specifies what the
function selects do for the pins, and there are a bunch of obvious
groupings to be made. With these created, we'll be able to replace
bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
references to specific groups we want enabled.
Signed-off-by: Eric Anholt <eric@anholt.net>
---
arch/arm/boot/dts/bcm283x.dtsi | 170 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 170 insertions(+)
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 4d9f3ab..acb616f 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -131,6 +131,176 @@
interrupt-controller;
#interrupt-cells = <2>;
+
+ /* Defines pin muxing groups according to
+ * BCM2835-ARM-Peripherals.pdf page 102.
+ *
+ * While each pin can have its mux selected
+ * for various functions individually, some
+ * groups only make sense to switch to a
+ * particular function together.
+ */
+ i2c0_gpio0: i2c0_gpio0 {
+ brcm,pins = <0 1>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ i2c1_gpio2: i2c1_gpio2 {
+ brcm,pins = <2 3>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk0_gpio4: gpclk0_gpio4 {
+ brcm,pins = <4>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk1_gpio5: gpclk1_gpio5 {
+ brcm,pins = <5>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk2_gpio6: gpclk2_gpio6 {
+ brcm,pins = <6>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ spi0_gpio7: spi0_gpio7 {
+ brcm,pins = <7 8 9 10 11>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm0_gpio12: pwm0_gpio12 {
+ brcm,pins = <12>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio13: pwm1_gpio13 {
+ brcm,pins = <13>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ uart0_gpio14: uart0_gpio14 {
+ brcm,pins = <14 15>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pcm_gpio18: pcm_gpio18 {
+ brcm,pins = <18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ i2c0_gpio32: i2c0_gpio32 {
+ brcm,pins = <32 34>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ spio0_gpio35: spio0_gpio35 {
+ brcm,pins = <35 36 37 38 39>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm0_gpio40: pwm0_gpio40 {
+ brcm,pins = <40>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio41: pwm1_gpio41 {
+ brcm,pins = <41>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk1_gpio42: gpclk1_gpio42 {
+ brcm,pins = <42>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk2_gpio43: gpclk2_gpio43 {
+ brcm,pins = <43>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ gpclk1_gpio44: gpclk1_gpio44 {
+ brcm,pins = <44>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ pwm1_gpio45: pwm1_gpio45 {
+ brcm,pins = <45>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+ i2c0_gpio44: i2c0_gpio44 {
+ brcm,pins = <44 45>;
+ brcm,function = <BCM2835_FSEL_ALT1>;
+ };
+ pcm_gpio28: pcm_gpio28 {
+ brcm,pins = <28 29 30 31>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+ uart1_gpio36: uart1_gpio36 {
+ brcm,pins = <36 37 38 39>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+ i2c1_gpio44: i2c1_gpio44 {
+ brcm,pins = <44 45>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
+ /* Separate from the uart0_gpio14 group
+ * because it conflicts with spi1_gpio16, and
+ * people often run uart0 on the two pins
+ * without flow contrl.
+ */
+ uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
+ brcm,pins = <16 17>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ i2c_slave_gpio18: i2c_slave_gpio18 {
+ brcm,pins = <18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ emmc_gpio22: emmc_gpio22 {
+ brcm,pins = <22 23 24 25 26 27>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ uart0_gpio30: uart0_gpio30 {
+ brcm,pins = <30 31>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 {
+ brcm,pins = <32 33>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ spi1_gpio16: spi1_gpio16 {
+ brcm,pins = <16 17 18 19 20 21>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+ jtag_gpio22: jtag_gpio22 {
+ brcm,pins = <22 23 24 25 26 27>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+ spi2_gpio40: spi2_gpio40 {
+ brcm,pins = <40 41 42 43 44 45>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+ jtag_gpio4: jtag_gpio4 {
+ brcm,pins = <4 5 6 12 13>;
+ brcm,function = <BCM2835_FSEL_ALT4>;
+ };
+ uart1_gpio14: uart1_gpio14 {
+ brcm,pins = <14 15>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_ctsrts_gpio16: uart1_ctsrts_gpio16 {
+ brcm,pins = <16 17>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ pwm0_gpio18: pwm0_gpio18 {
+ brcm,pins = <18>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ pwm1_gpio19: pwm1_gpio19 {
+ brcm,pins = <19>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_gpio32: uart1_gpio32 {
+ brcm,pins = <32 33>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
+ brcm,pins = <30 31>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_gpio40: uart1_gpio40 {
+ brcm,pins = <40 41>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
+ uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 {
+ brcm,pins = <42 43>;
+ brcm,function = <BCM2835_FSEL_ALT5>;
+ };
};
uart0: serial@7e201000 {
--
1.8.3.1
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| From | Stefan Wahren <stefan.wahren@i2se.com> |
|---|---|
| Date | 2016-09-07 20:20 +0200 |
| Subject | Re: [PATCH 1/8] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node. |
| Message-ID | <sePC1-3ed-7@gated-at.bofh.it> |
| In reply to | #1478165 |
Hi Gerd, > Gerd Hoffmann <kraxel@redhat.com> hat am 7. September 2016 um 12:31 > geschrieben: > > > From: Eric Anholt <eric@anholt.net> > > The BCM2835-ARM-Peripherals.pdf documentation specifies what the > function selects do for the pins, and there are a bunch of obvious > groupings to be made. With these created, we'll be able to replace > bcm2835-rpi.dtsi's main "set all of these pins to alt0" with > references to specific groups we want enabled. on IMX/MXS platform it's unwanted to add all possible muxes in the dtsi file. So i would suggest to add only the actually used muxes. That makes it easier to maintain. Regards Stefan
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| From | Eric Anholt <eric@anholt.net> |
|---|---|
| Date | 2016-09-07 21:00 +0200 |
| Message-ID | <seQeJ-3wO-15@gated-at.bofh.it> |
| In reply to | #1478538 |
[Multipart message — attachments visible in raw view] — view raw
Stefan Wahren <stefan.wahren@i2se.com> writes: > Hi Gerd, > >> Gerd Hoffmann <kraxel@redhat.com> hat am 7. September 2016 um 12:31 >> geschrieben: >> >> >> From: Eric Anholt <eric@anholt.net> >> >> The BCM2835-ARM-Peripherals.pdf documentation specifies what the >> function selects do for the pins, and there are a bunch of obvious >> groupings to be made. With these created, we'll be able to replace >> bcm2835-rpi.dtsi's main "set all of these pins to alt0" with >> references to specific groups we want enabled. > > on IMX/MXS platform it's unwanted to add all possible muxes in the dtsi file. So > i would suggest to add only the actually used muxes. That makes it easier to > maintain. On the other hand, I find that having to go back to the docs for determining the fsels is worse than just verifying and defining them here all at once. Maintaining has also gotten harder because our DTs are split across 32 and 64-bit ARM, so rpi3 changes that require adding one of these pinmux definitions back to the dtsi would require painful cross-branch merges.
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| From | Gerd Hoffmann <kraxel@redhat.com> |
|---|---|
| Date | 2016-09-08 09:50 +0200 |
| Subject | Re: [PATCH 1/8] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node. |
| Message-ID | <sf2fU-2RT-25@gated-at.bofh.it> |
| In reply to | #1478560 |
On Mi, 2016-09-07 at 11:50 -0700, Eric Anholt wrote: > Stefan Wahren <stefan.wahren@i2se.com> writes: > > > Hi Gerd, > > > >> Gerd Hoffmann <kraxel@redhat.com> hat am 7. September 2016 um 12:31 > >> geschrieben: > >> > >> > >> From: Eric Anholt <eric@anholt.net> > >> > >> The BCM2835-ARM-Peripherals.pdf documentation specifies what the > >> function selects do for the pins, and there are a bunch of obvious > >> groupings to be made. With these created, we'll be able to replace > >> bcm2835-rpi.dtsi's main "set all of these pins to alt0" with > >> references to specific groups we want enabled. > > > > on IMX/MXS platform it's unwanted to add all possible muxes in the dtsi file. So > > i would suggest to add only the actually used muxes. That makes it easier to > > maintain. > > On the other hand, I find that having to go back to the docs for > determining the fsels is worse than just verifying and defining them > here all at once. Agreeing here. IMO it is nice to have them all even if unused for documentation purposes. > Maintaining has also gotten harder because our DTs > are split across 32 and 64-bit ARM, so rpi3 changes that require adding > one of these pinmux definitions back to the dtsi would require painful > cross-branch merges. It'll also easily cause merge conflicts. cheers, Gerd
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| From | Stefan Wahren <stefan.wahren@i2se.com> |
|---|---|
| Date | 2016-09-08 20:00 +0200 |
| Subject | Re: [PATCH 1/8] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node. |
| Message-ID | <sfbMe-o9-17@gated-at.bofh.it> |
| In reply to | #1478165 |
Hi Gerd,
> Gerd Hoffmann <kraxel@redhat.com> hat am 7. September 2016 um 12:31
> geschrieben:
>
>
> From: Eric Anholt <eric@anholt.net>
>
> The BCM2835-ARM-Peripherals.pdf documentation specifies what the
> function selects do for the pins, and there are a bunch of obvious
> groupings to be made. With these created, we'll be able to replace
> bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
> references to specific groups we want enabled.
>
> Signed-off-by: Eric Anholt <eric@anholt.net>
> ---
> arch/arm/boot/dts/bcm283x.dtsi | 170
> +++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 170 insertions(+)
>
> diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
> index 4d9f3ab..acb616f 100644
> --- a/arch/arm/boot/dts/bcm283x.dtsi
> +++ b/arch/arm/boot/dts/bcm283x.dtsi
> @@ -131,6 +131,176 @@
>
> interrupt-controller;
> #interrupt-cells = <2>;
> +
> + /* Defines pin muxing groups according to
> + * BCM2835-ARM-Peripherals.pdf page 102.
> + *
> + * While each pin can have its mux selected
> + * for various functions individually, some
> + * groups only make sense to switch to a
> + * particular function together.
> + */
> ...
> + i2c0_gpio32: i2c0_gpio32 {
> + brcm,pins = <32 34>;
> + brcm,function = <BCM2835_FSEL_ALT0>;
> + };
> + spio0_gpio35: spio0_gpio35 {
> + brcm,pins = <35 36 37 38 39>;
> + brcm,function = <BCM2835_FSEL_ALT0>;
> + };
s/spio0/spi0
> + pwm0_gpio40: pwm0_gpio40 {
> + brcm,pins = <40>;
> + brcm,function = <BCM2835_FSEL_ALT0>;
> + };
> ...
> + uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 {
> + brcm,pins = <42 43>;
> + brcm,function = <BCM2835_FSEL_ALT5>;
> + };
Please sort all pinctrl nodes by label.
According to this page [1] the pinctrl group for parallel display interface is
missing. Is it intended?
[1] - http://elinux.org/RPi_BCM2835_GPIOs
> };
>
> uart0: serial@7e201000 {
> --
> 1.8.3.1
>
>
> _______________________________________________
> linux-rpi-kernel mailing list
> linux-rpi-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rpi-kernel
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| From | Gerd Hoffmann <kraxel@redhat.com> |
|---|---|
| Date | 2016-09-09 11:10 +0200 |
| Subject | Re: [PATCH 1/8] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node. |
| Message-ID | <sfpYR-VU-25@gated-at.bofh.it> |
| In reply to | #1479408 |
Hi,
> According to this page [1] the pinctrl group for parallel display interface is
> missing. Is it intended?
>
> [1] - http://elinux.org/RPi_BCM2835_GPIOs
Just an oversight I guess. Eric?
Does this look correct?
+ dpi_gpio4: dpi_gpio4 {
+ brcm,pins = <4 5 6 7 8 9 10 11 12 13
+ 14 15 16 17 18 19 20 21
+ 22 23 24 25 26 27>;
+ brcm,function = <BCM2835_FSEL_ALT2>;
+ };
thanks,
Gerd
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