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[tip:ras/core] x86/mce: Drop X86_FEATURE_MCE_RECOVERY and the related model string test

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  [tip:ras/core] x86/mce: Drop X86_FEATURE_MCE_RECOVERY and the  related model string test tip-bot for Tony Luck <tipbot@zytor.com> - 2016-09-05 12:00 +0200

#1476251 — [tip:ras/core] x86/mce: Drop X86_FEATURE_MCE_RECOVERY and the related model string test

Commit-ID:  ffb173e657fa8123bffa2a169e124b4bca0b5bc4
Gitweb:     http://git.kernel.org/tip/ffb173e657fa8123bffa2a169e124b4bca0b5bc4
Author:     Tony Luck <tony.luck@intel.com>
AuthorDate: Thu, 1 Sep 2016 11:39:33 -0700
Committer:  Thomas Gleixner <tglx@linutronix.de>
CommitDate: Mon, 5 Sep 2016 11:47:31 +0200

x86/mce: Drop X86_FEATURE_MCE_RECOVERY and the related model string test

We now have a better way to determine if we are running on a cpu that
supports machine check recovery. Free up this feature bit.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Acked-by: Borislav Petkov <bp@suse.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Boris Petkov <bp@suse.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: http://lkml.kernel.org/r/d5db39e08d46cf1012d94d3902275d08ba931926.1472754712.git.tony.luck@intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

---
 arch/x86/include/asm/cpufeatures.h |  1 -
 arch/x86/kernel/cpu/mcheck/mce.c   | 11 -----------
 2 files changed, 12 deletions(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 92a8308..1188bc8 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -106,7 +106,6 @@
 #define X86_FEATURE_APERFMPERF	( 3*32+28) /* APERFMPERF */
 #define X86_FEATURE_EAGER_FPU	( 3*32+29) /* "eagerfpu" Non lazy FPU restore */
 #define X86_FEATURE_NONSTOP_TSC_S3 ( 3*32+30) /* TSC doesn't stop in S3 state */
-#define X86_FEATURE_MCE_RECOVERY ( 3*32+31) /* cpu has recoverable machine checks */
 
 /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
 #define X86_FEATURE_XMM3	( 4*32+ 0) /* "pni" SSE-3 */
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index acccebc..7f3f0e1 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1634,17 +1634,6 @@ static int __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
 
 		if (c->x86 == 6 && c->x86_model == 45)
 			quirk_no_way_out = quirk_sandybridge_ifu;
-		/*
-		 * MCG_CAP.MCG_SER_P is necessary but not sufficient to know
-		 * whether this processor will actually generate recoverable
-		 * machine checks. Check to see if this is an E7 model Xeon.
-		 * We can't do a model number check because E5 and E7 use the
-		 * same model number. E5 doesn't support recovery, E7 does.
-		 */
-		if (mca_cfg.recovery || (mca_cfg.ser &&
-			!strncmp(c->x86_model_id,
-				 "Intel(R) Xeon(R) CPU E7-", 24)))
-			set_cpu_cap(c, X86_FEATURE_MCE_RECOVERY);
 	}
 	if (cfg->monarch_timeout < 0)
 		cfg->monarch_timeout = 0;

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