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[PATCH 8/9] staging: sm750fb: fix line length coding style issue in ddk750_chip.c

Started byMoshe Green <mgmoshes@gmail.com>
First post2016-08-30 21:10 +0200
Last post2016-08-30 21:10 +0200
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  [PATCH 8/9] staging: sm750fb: fix line length coding style issue in  ddk750_chip.c Moshe Green <mgmoshes@gmail.com> - 2016-08-30 21:10 +0200

#1472783 — [PATCH 8/9] staging: sm750fb: fix line length coding style issue in ddk750_chip.c

FromMoshe Green <mgmoshes@gmail.com>
Date2016-08-30 21:10 +0200
Subject[PATCH 8/9] staging: sm750fb: fix line length coding style issue in ddk750_chip.c
Message-ID<sbWA1-tT-1@gated-at.bofh.it>
Fix a line length warning found by the checkpatch.pl tool in
ddk750_chip.c.

Signed-off-by: Moshe Green <mgmoshes@gmail.com>
---
 drivers/staging/sm750fb/ddk750_chip.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c
index c59fe22..07c2537 100644
--- a/drivers/staging/sm750fb/ddk750_chip.c
+++ b/drivers/staging/sm750fb/ddk750_chip.c
@@ -332,7 +332,9 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
 	request = request_orig / 1000;
 	input = pll->inputFreq / 1000;
 
-	/* for MXCLK register , no POD provided, so need be treated differently	*/
+	/* for MXCLK register,
+	 * no POD provided, so need be treated differently.
+	 */
 	if (pll->clockType == MXCLK_PLL)
 		max_d = 3;
 
-- 
2.7.4

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