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[RFC PATCH v2 10/10] dt-bindings: Document devicetree binding for ARM SPE

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  [RFC PATCH v2 10/10] dt-bindings: Document devicetree binding for ARM SPE Will Deacon <will.deacon@arm.com> - 2017-01-13 17:10 +0100
    Re: [RFC PATCH v2 10/10] dt-bindings: Document devicetree binding  for ARM SPE Mark Rutland <mark.rutland@arm.com> - 2017-01-13 19:50 +0100
      Re: [RFC PATCH v2 10/10] dt-bindings: Document devicetree binding  for ARM SPE Will Deacon <will.deacon@arm.com> - 2017-01-16 12:00 +0100

#1558531 — [RFC PATCH v2 10/10] dt-bindings: Document devicetree binding for ARM SPE

This patch documents the devicetree binding in use for ARM SPE.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
---
 Documentation/devicetree/bindings/arm/spe-pmu.txt | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/spe-pmu.txt

diff --git a/Documentation/devicetree/bindings/arm/spe-pmu.txt b/Documentation/devicetree/bindings/arm/spe-pmu.txt
new file mode 100644
index 000000000000..d6540b491af4
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/spe-pmu.txt
@@ -0,0 +1,20 @@
+* ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU)
+
+ARMv8.2 introduces the optional Statistical Profiling Extension for collecting
+performance sample data using an in-memory trace buffer.
+
+** SPE Required properties:
+
+- compatible : should be one of:
+	       "arm,arm-spe-pmu-v1"
+
+- interrupts : Exactly 1 PPI must be listed. For heterogeneous systems where
+               SPE is only supported on a subset of the CPUs, please consult
+	       the arm,gic-v3 binding for details on describing a PPI partition.
+
+** Example:
+
+spe-pmu {
+        compatible = "arm,arm-spe-pmu-v1";
+        interrupts = <GIC_PPI 05 IRQ_TYPE_EDGE_RISING &part1>;
+};
-- 
2.1.4

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#1558671 — Re: [RFC PATCH v2 10/10] dt-bindings: Document devicetree binding for ARM SPE

On Fri, Jan 13, 2017 at 04:03:49PM +0000, Will Deacon wrote:
> This patch documents the devicetree binding in use for ARM SPE.
> 
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Rob Herring <robh@kernel.org>
> Signed-off-by: Will Deacon <will.deacon@arm.com>
> ---
>  Documentation/devicetree/bindings/arm/spe-pmu.txt | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/spe-pmu.txt
> 
> diff --git a/Documentation/devicetree/bindings/arm/spe-pmu.txt b/Documentation/devicetree/bindings/arm/spe-pmu.txt
> new file mode 100644
> index 000000000000..d6540b491af4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/spe-pmu.txt
> @@ -0,0 +1,20 @@
> +* ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU)
> +
> +ARMv8.2 introduces the optional Statistical Profiling Extension for collecting
> +performance sample data using an in-memory trace buffer.
> +
> +** SPE Required properties:
> +
> +- compatible : should be one of:
> +	       "arm,arm-spe-pmu-v1"

The second "arm" here doesn't seem to add much. Should that be "armv8.2"
instead?

That would roughly match what we do with the architected timers to
describe the specific architectural version.

Otherwise, this looks fine to me.

Thanks,
Mark.

> +- interrupts : Exactly 1 PPI must be listed. For heterogeneous systems where
> +               SPE is only supported on a subset of the CPUs, please consult
> +	       the arm,gic-v3 binding for details on describing a PPI partition.
> +
> +** Example:
> +
> +spe-pmu {
> +        compatible = "arm,arm-spe-pmu-v1";
> +        interrupts = <GIC_PPI 05 IRQ_TYPE_EDGE_RISING &part1>;
> +};
> -- 
> 2.1.4
> 

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#1559634 — Re: [RFC PATCH v2 10/10] dt-bindings: Document devicetree binding for ARM SPE

On Fri, Jan 13, 2017 at 06:43:52PM +0000, Mark Rutland wrote:
> On Fri, Jan 13, 2017 at 04:03:49PM +0000, Will Deacon wrote:
> > This patch documents the devicetree binding in use for ARM SPE.
> > 
> > Cc: Mark Rutland <mark.rutland@arm.com>
> > Cc: Rob Herring <robh@kernel.org>
> > Signed-off-by: Will Deacon <will.deacon@arm.com>
> > ---
> >  Documentation/devicetree/bindings/arm/spe-pmu.txt | 20 ++++++++++++++++++++
> >  1 file changed, 20 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/arm/spe-pmu.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/arm/spe-pmu.txt b/Documentation/devicetree/bindings/arm/spe-pmu.txt
> > new file mode 100644
> > index 000000000000..d6540b491af4
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/arm/spe-pmu.txt
> > @@ -0,0 +1,20 @@
> > +* ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU)
> > +
> > +ARMv8.2 introduces the optional Statistical Profiling Extension for collecting
> > +performance sample data using an in-memory trace buffer.
> > +
> > +** SPE Required properties:
> > +
> > +- compatible : should be one of:
> > +	       "arm,arm-spe-pmu-v1"
> 
> The second "arm" here doesn't seem to add much. Should that be "armv8.2"
> instead?

I don't think armv8.2 is particularly helpful, because that effectively ties
together the SPE version and the architecture version, which I don't think
is strictly required. The reason I added it was so that you could describe
a partner implementation as something like:

  acme,arm-spe-pmu-v1

and know that it was acme's implementation of an ARM architectural feature.

If I drop the second "arm", I was worried that it might conflict with other
namespaces (e.g. acme's signal-processing-element's power-management-unit).

What do you reckon?

Will

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