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Groups > linux.kernel > #1551811 > unrolled thread

[PATCH v7 0/8] Add PWM and IIO timer drivers for STM32

Started byBenjamin Gaignard <benjamin.gaignard@linaro.org>
First post2017-01-05 10:30 +0100
Last post2017-01-13 13:40 +0100
Articles 9 — 3 participants

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Contents

  [PATCH v7 0/8] Add PWM and IIO timer drivers for STM32 Benjamin Gaignard <benjamin.gaignard@linaro.org> - 2017-01-05 10:30 +0100
    [PATCH v7 2/8] MFD: add STM32 Timers driver Benjamin Gaignard <benjamin.gaignard@linaro.org> - 2017-01-05 10:30 +0100
      Re: [PATCH v7 2/8] MFD: add STM32 Timers driver Rob Herring <robh@kernel.org> - 2017-01-09 19:10 +0100
        Re: [PATCH v7 2/8] MFD: add STM32 Timers driver Benjamin Gaignard <benjamin.gaignard@linaro.org> - 2017-01-10 10:00 +0100
    [PATCH v7 1/8] MFD: add bindings for STM32 Timers driver Benjamin Gaignard <benjamin.gaignard@linaro.org> - 2017-01-05 10:30 +0100
      Re: [PATCH v7 1/8] MFD: add bindings for STM32 Timers driver Rob Herring <robh@kernel.org> - 2017-01-09 19:10 +0100
    Re: [PATCH v7 0/8] Add PWM and IIO timer drivers for STM32 Lee Jones <lee.jones@linaro.org> - 2017-01-05 15:50 +0100
      Re: [PATCH v7 0/8] Add PWM and IIO timer drivers for STM32 Benjamin Gaignard <benjamin.gaignard@linaro.org> - 2017-01-06 09:00 +0100
        Re: [PATCH v7 0/8] Add PWM and IIO timer drivers for STM32 Benjamin Gaignard <benjamin.gaignard@linaro.org> - 2017-01-13 13:40 +0100

#1551811 — [PATCH v7 0/8] Add PWM and IIO timer drivers for STM32

FromBenjamin Gaignard <benjamin.gaignard@linaro.org>
Date2017-01-05 10:30 +0100
Subject[PATCH v7 0/8] Add PWM and IIO timer drivers for STM32
Message-ID<sWcwW-Vl-7@gated-at.bofh.it>
version 7:
- rebase on v4.10-rc2
- remove iio_device code from driver and keep only the trigger part

version 6:
- rename stm32-gptimer in stm32-timers.
- change "st,stm32-gptimer" compatible to "st,stm32-timers".
- modify "st,breakinput" parameter in pwm part.
- split DT patch in 2

version 5:
- fix comments done on version 4
- rebased on kernel 4.9-rc8
- change nodes names and re-order then by addresses

version 4:
- fix comments done on version 3
- don't use interrupts anymore in IIO timer
- detect hardware capabilities at probe time to simplify binding

version 3:
- no change on mfd and pwm divers patches
- add cross reference between bindings
- change compatible to "st,stm32-timer-trigger"
- fix attributes access rights
- use string instead of int for master_mode and slave_mode
- document device attributes in sysfs-bus-iio-timer-stm32
- update DT with the new compatible

version 2:
- keep only one compatible per driver
- use DT parameters to describe hardware block configuration:
  - pwm channels, complementary output, counter size, break input
  - triggers accepted and create by IIO timers
- change DT to limite use of reference to the node
- interrupt is now in IIO timer driver
- rename stm32-mfd-timer to stm32-timers (for general purpose timer)

The following patches enable PWM and IIO Timer features for STM32 platforms.

Those two features are mixed into the registers of the same hardware block
(named general purpose timer) which lead to introduce a multifunctions driver 
on the top of them to be able to share the registers.

In STM32f4 14 instances of timer hardware block exist, even if they all have
the same register mapping they could have a different number of pwm channels
and/or different triggers capabilities. We use various parameters in DT to 
describe the differences between hardware blocks

The MFD (stm32-timers.c) takes care of clock and register mapping
by using regmap. stm32_timers structure is provided to its sub-node to
share those information.

PWM driver is implemented into pwm-stm32.c. Depending of the instance we may
have up to 4 channels, sometime with complementary outputs or 32 bits counter
instead of 16 bits. Some hardware blocks may also have a break input function
which allows to stop pwm depending of a level, defined in devicetree, on an
external pin.

IIO timer driver (stm32-timer-trigger.c and stm32-timer-trigger.h) define a list
of hardware triggers usable by hardware blocks like ADC, DAC or other timers. 

The matrix of possible connections between blocks is quite complex so we use 
trigger names and is_stm32_iio_timer_trigger() function to be sure that
triggers are valid and configure the IPs.

At run time IIO timer hardware blocks can configure (through "master_mode" 
IIO device attribute) which internal signal (counter enable, reset,
comparison block, etc...) is used to generate the trigger.

Benjamin Gaignard (8):
  MFD: add bindings for STM32 Timers driver
  MFD: add STM32 Timers driver
  PWM: add pwm-stm32 DT bindings
  PWM: add PWM driver for STM32 plaftorm
  IIO: add bindings for STM32 timer trigger driver
  IIO: add STM32 timer trigger driver
  ARM: dts: stm32: add Timers driver for stm32f429 MCU
  ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-disco

 .../ABI/testing/sysfs-bus-iio-timer-stm32          |  29 ++
 .../bindings/iio/timer/stm32-timer-trigger.txt     |  23 ++
 .../devicetree/bindings/mfd/stm32-timers.txt       |  46 +++
 .../devicetree/bindings/pwm/pwm-stm32.txt          |  33 ++
 arch/arm/boot/dts/stm32f429.dtsi                   | 275 +++++++++++++
 arch/arm/boot/dts/stm32f469-disco.dts              |  28 ++
 drivers/iio/Kconfig                                |   1 -
 drivers/iio/trigger/Kconfig                        |  10 +
 drivers/iio/trigger/Makefile                       |   1 +
 drivers/iio/trigger/stm32-timer-trigger.c          | 340 ++++++++++++++++
 drivers/mfd/Kconfig                                |  11 +
 drivers/mfd/Makefile                               |   2 +
 drivers/mfd/stm32-timers.c                         |  80 ++++
 drivers/pwm/Kconfig                                |   9 +
 drivers/pwm/Makefile                               |   1 +
 drivers/pwm/pwm-stm32.c                            | 434 +++++++++++++++++++++
 include/linux/iio/timer/stm32-timer-trigger.h      |  62 +++
 include/linux/mfd/stm32-timers.h                   |  71 ++++
 18 files changed, 1455 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-timer-stm32
 create mode 100644 Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt
 create mode 100644 Documentation/devicetree/bindings/mfd/stm32-timers.txt
 create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32.txt
 create mode 100644 drivers/iio/trigger/stm32-timer-trigger.c
 create mode 100644 drivers/mfd/stm32-timers.c
 create mode 100644 drivers/pwm/pwm-stm32.c
 create mode 100644 include/linux/iio/timer/stm32-timer-trigger.h
 create mode 100644 include/linux/mfd/stm32-timers.h

-- 
1.9.1

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#1551812 — [PATCH v7 2/8] MFD: add STM32 Timers driver

FromBenjamin Gaignard <benjamin.gaignard@linaro.org>
Date2017-01-05 10:30 +0100
Subject[PATCH v7 2/8] MFD: add STM32 Timers driver
Message-ID<sWcwX-Vl-47@gated-at.bofh.it>
In reply to#1551811
This hardware block could at used at same time for PWM generation
and IIO timers.
PWM and IIO timer configuration are mixed in the same registers
so we need a multi fonction driver to be able to share those registers.

version 7:
- rebase on v4.10-rc2

version 6:
- rename files to stm32-timers
- rename functions to stm32_timers_xxx

version 5:
- fix Lee comments about detect function
- add missing dependency on REGMAP_MMIO

version 4:
- add a function to detect Auto Reload Register (ARR) size
- rename the structure shared with other drivers

version 2:
- rename driver "stm32-gptimer" to be align with SoC documentation
- only keep one compatible
- use of_platform_populate() instead of devm_mfd_add_devices()

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
---
 .../devicetree/bindings/mfd/stm32-timers.txt       |  2 +-
 drivers/mfd/Kconfig                                | 11 +++
 drivers/mfd/Makefile                               |  2 +
 drivers/mfd/stm32-timers.c                         | 80 ++++++++++++++++++++++
 include/linux/mfd/stm32-timers.h                   | 71 +++++++++++++++++++
 5 files changed, 165 insertions(+), 1 deletion(-)
 create mode 100644 drivers/mfd/stm32-timers.c
 create mode 100644 include/linux/mfd/stm32-timers.h

diff --git a/Documentation/devicetree/bindings/mfd/stm32-timers.txt b/Documentation/devicetree/bindings/mfd/stm32-timers.txt
index a73301d..897e7c2 100644
--- a/Documentation/devicetree/bindings/mfd/stm32-timers.txt
+++ b/Documentation/devicetree/bindings/mfd/stm32-timers.txt
@@ -12,7 +12,7 @@ Required parameters:
 
 - reg:			Physical base address and length of the controller's
 			registers.
-- clock-names: 		Set to "int".
+- clock-names:		Set to "int".
 - clocks: 		Phandle to the clock used by the timer module.
 			For Clk properties, please refer to ../clock/clock-bindings.txt
 
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 4ce3b6f..d0c14b8 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -1621,6 +1621,17 @@ config MFD_STW481X
 	  in various ST Microelectronics and ST-Ericsson embedded
 	  Nomadik series.
 
+config MFD_STM32_TIMERS
+	tristate "Support for STM32 Timers"
+	depends on (ARCH_STM32 && OF) || COMPILE_TEST
+	select MFD_CORE
+	select REGMAP
+	select REGMAP_MMIO
+	help
+	  Select this option to enable STM32 timers driver used
+	  for PWM and IIO Timer. This driver allow to share the
+	  registers between the others drivers.
+
 menu "Multimedia Capabilities Port drivers"
 	depends on ARCH_SA1100
 
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index dda4d4f..876ca86 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -212,3 +212,5 @@ obj-$(CONFIG_MFD_MT6397)	+= mt6397-core.o
 
 obj-$(CONFIG_MFD_ALTERA_A10SR)	+= altera-a10sr.o
 obj-$(CONFIG_MFD_SUN4I_GPADC)	+= sun4i-gpadc.o
+
+obj-$(CONFIG_MFD_STM32_TIMERS) 	+= stm32-timers.o
diff --git a/drivers/mfd/stm32-timers.c b/drivers/mfd/stm32-timers.c
new file mode 100644
index 0000000..41bd901
--- /dev/null
+++ b/drivers/mfd/stm32-timers.c
@@ -0,0 +1,80 @@
+/*
+ * Copyright (C) STMicroelectronics 2016
+ *
+ * Author: Benjamin Gaignard <benjamin.gaignard@st.com>
+ *
+ * License terms:  GNU General Public License (GPL), version 2
+ */
+
+#include <linux/mfd/stm32-timers.h>
+#include <linux/module.h>
+#include <linux/of_platform.h>
+#include <linux/reset.h>
+
+static const struct regmap_config stm32_timers_regmap_cfg = {
+	.reg_bits = 32,
+	.val_bits = 32,
+	.reg_stride = sizeof(u32),
+	.max_register = 0x400,
+};
+
+static void stm32_timers_get_arr_size(struct stm32_timers *ddata)
+{
+	/*
+	 * Only the available bits will be written so when readback
+	 * we get the maximum value of auto reload register
+	 */
+	regmap_write(ddata->regmap, TIM_ARR, ~0L);
+	regmap_read(ddata->regmap, TIM_ARR, &ddata->max_arr);
+	regmap_write(ddata->regmap, TIM_ARR, 0x0);
+}
+
+static int stm32_timers_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct stm32_timers *ddata;
+	struct resource *res;
+	void __iomem *mmio;
+
+	ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL);
+	if (!ddata)
+		return -ENOMEM;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	mmio = devm_ioremap_resource(dev, res);
+	if (IS_ERR(mmio))
+		return PTR_ERR(mmio);
+
+	ddata->regmap = devm_regmap_init_mmio_clk(dev, "int", mmio,
+						  &stm32_timers_regmap_cfg);
+	if (IS_ERR(ddata->regmap))
+		return PTR_ERR(ddata->regmap);
+
+	ddata->clk = devm_clk_get(dev, NULL);
+	if (IS_ERR(ddata->clk))
+		return PTR_ERR(ddata->clk);
+
+	stm32_timers_get_arr_size(ddata);
+
+	platform_set_drvdata(pdev, ddata);
+
+	return of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
+}
+
+static const struct of_device_id stm32_timers_of_match[] = {
+	{ .compatible = "st,stm32-timers", },
+	{ /* end node */ },
+};
+MODULE_DEVICE_TABLE(of, stm32_timers_of_match);
+
+static struct platform_driver stm32_timers_driver = {
+	.probe = stm32_timers_probe,
+	.driver	= {
+		.name = "stm32-timers",
+		.of_match_table = stm32_timers_of_match,
+	},
+};
+module_platform_driver(stm32_timers_driver);
+
+MODULE_DESCRIPTION("STMicroelectronics STM32 Timers");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/mfd/stm32-timers.h b/include/linux/mfd/stm32-timers.h
new file mode 100644
index 0000000..d030004
--- /dev/null
+++ b/include/linux/mfd/stm32-timers.h
@@ -0,0 +1,71 @@
+/*
+ * Copyright (C) STMicroelectronics 2016
+ *
+ * Author: Benjamin Gaignard <benjamin.gaignard@st.com>
+ *
+ * License terms:  GNU General Public License (GPL), version 2
+ */
+
+#ifndef _LINUX_STM32_GPTIMER_H_
+#define _LINUX_STM32_GPTIMER_H_
+
+#include <linux/clk.h>
+#include <linux/regmap.h>
+
+#define TIM_CR1		0x00	/* Control Register 1      */
+#define TIM_CR2		0x04	/* Control Register 2      */
+#define TIM_SMCR	0x08	/* Slave mode control reg  */
+#define TIM_DIER	0x0C	/* DMA/interrupt register  */
+#define TIM_SR		0x10	/* Status register	   */
+#define TIM_EGR		0x14	/* Event Generation Reg    */
+#define TIM_CCMR1	0x18	/* Capt/Comp 1 Mode Reg    */
+#define TIM_CCMR2	0x1C	/* Capt/Comp 2 Mode Reg    */
+#define TIM_CCER	0x20	/* Capt/Comp Enable Reg    */
+#define TIM_PSC		0x28	/* Prescaler               */
+#define TIM_ARR		0x2c	/* Auto-Reload Register    */
+#define TIM_CCR1	0x34	/* Capt/Comp Register 1    */
+#define TIM_CCR2	0x38	/* Capt/Comp Register 2    */
+#define TIM_CCR3	0x3C	/* Capt/Comp Register 3    */
+#define TIM_CCR4	0x40	/* Capt/Comp Register 4    */
+#define TIM_BDTR	0x44	/* Break and Dead-Time Reg */
+
+#define TIM_CR1_CEN	BIT(0)	/* Counter Enable	   */
+#define TIM_CR1_ARPE	BIT(7)	/* Auto-reload Preload Ena */
+#define TIM_CR2_MMS	(BIT(4) | BIT(5) | BIT(6)) /* Master mode selection */
+#define TIM_SMCR_SMS	(BIT(0) | BIT(1) | BIT(2)) /* Slave mode selection */
+#define TIM_SMCR_TS	(BIT(4) | BIT(5) | BIT(6)) /* Trigger selection */
+#define TIM_DIER_UIE	BIT(0)	/* Update interrupt	   */
+#define TIM_SR_UIF	BIT(0)	/* Update interrupt flag   */
+#define TIM_EGR_UG	BIT(0)	/* Update Generation       */
+#define TIM_CCMR_PE	BIT(3)	/* Channel Preload Enable  */
+#define TIM_CCMR_M1	(BIT(6) | BIT(5))  /* Channel PWM Mode 1 */
+#define TIM_CCER_CC1E	BIT(0)	/* Capt/Comp 1  out Ena    */
+#define TIM_CCER_CC1P	BIT(1)	/* Capt/Comp 1  Polarity   */
+#define TIM_CCER_CC1NE	BIT(2)	/* Capt/Comp 1N out Ena    */
+#define TIM_CCER_CC1NP	BIT(3)	/* Capt/Comp 1N Polarity   */
+#define TIM_CCER_CC2E	BIT(4)	/* Capt/Comp 2  out Ena    */
+#define TIM_CCER_CC3E	BIT(8)	/* Capt/Comp 3  out Ena    */
+#define TIM_CCER_CC4E	BIT(12)	/* Capt/Comp 4  out Ena    */
+#define TIM_CCER_CCXE	(BIT(0) | BIT(4) | BIT(8) | BIT(12))
+#define TIM_BDTR_BKE	BIT(12) /* Break input enable	   */
+#define TIM_BDTR_BKP	BIT(13) /* Break input polarity	   */
+#define TIM_BDTR_AOE	BIT(14)	/* Automatic Output Enable */
+#define TIM_BDTR_MOE	BIT(15)	/* Main Output Enable      */
+#define TIM_BDTR_BKF	(BIT(16) | BIT(17) | BIT(18) | BIT(19))
+#define TIM_BDTR_BK2F	(BIT(20) | BIT(21) | BIT(22) | BIT(23))
+#define TIM_BDTR_BK2E	BIT(24) /* Break 2 input enable	   */
+#define TIM_BDTR_BK2P	BIT(25) /* Break 2 input polarity  */
+
+#define MAX_TIM_PSC		0xFFFF
+#define TIM_CR2_MMS_SHIFT	4
+#define TIM_SMCR_TS_SHIFT	4
+#define TIM_BDTR_BKF_MASK	0xF
+#define TIM_BDTR_BKF_SHIFT	16
+#define TIM_BDTR_BK2F_SHIFT	20
+
+struct stm32_timers {
+	struct clk *clk;
+	struct regmap *regmap;
+	u32 max_arr;
+};
+#endif
-- 
1.9.1

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#1554565 — Re: [PATCH v7 2/8] MFD: add STM32 Timers driver

FromRob Herring <robh@kernel.org>
Date2017-01-09 19:10 +0100
SubjectRe: [PATCH v7 2/8] MFD: add STM32 Timers driver
Message-ID<sXMym-7wx-21@gated-at.bofh.it>
In reply to#1551812
On Thu, Jan 05, 2017 at 10:25:38AM +0100, Benjamin Gaignard wrote:
> This hardware block could at used at same time for PWM generation
> and IIO timers.
> PWM and IIO timer configuration are mixed in the same registers
> so we need a multi fonction driver to be able to share those registers.
> 
> version 7:
> - rebase on v4.10-rc2
> 
> version 6:
> - rename files to stm32-timers
> - rename functions to stm32_timers_xxx
> 
> version 5:
> - fix Lee comments about detect function
> - add missing dependency on REGMAP_MMIO
> 
> version 4:
> - add a function to detect Auto Reload Register (ARR) size
> - rename the structure shared with other drivers
> 
> version 2:
> - rename driver "stm32-gptimer" to be align with SoC documentation
> - only keep one compatible
> - use of_platform_populate() instead of devm_mfd_add_devices()
> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
> ---
>  .../devicetree/bindings/mfd/stm32-timers.txt       |  2 +-
>  drivers/mfd/Kconfig                                | 11 +++
>  drivers/mfd/Makefile                               |  2 +
>  drivers/mfd/stm32-timers.c                         | 80 ++++++++++++++++++++++
>  include/linux/mfd/stm32-timers.h                   | 71 +++++++++++++++++++
>  5 files changed, 165 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/mfd/stm32-timers.c
>  create mode 100644 include/linux/mfd/stm32-timers.h
> 
> diff --git a/Documentation/devicetree/bindings/mfd/stm32-timers.txt b/Documentation/devicetree/bindings/mfd/stm32-timers.txt
> index a73301d..897e7c2 100644
> --- a/Documentation/devicetree/bindings/mfd/stm32-timers.txt
> +++ b/Documentation/devicetree/bindings/mfd/stm32-timers.txt
> @@ -12,7 +12,7 @@ Required parameters:
>  
>  - reg:			Physical base address and length of the controller's
>  			registers.
> -- clock-names: 		Set to "int".
> +- clock-names:		Set to "int".

This hunk should be dropped or moved to previous patch.

>  - clocks: 		Phandle to the clock used by the timer module.
>  			For Clk properties, please refer to ../clock/clock-bindings.txt
>

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#1555055 — Re: [PATCH v7 2/8] MFD: add STM32 Timers driver

FromBenjamin Gaignard <benjamin.gaignard@linaro.org>
Date2017-01-10 10:00 +0100
SubjectRe: [PATCH v7 2/8] MFD: add STM32 Timers driver
Message-ID<sY0rD-7yf-5@gated-at.bofh.it>
In reply to#1554565
2017-01-09 19:00 GMT+01:00 Rob Herring <robh@kernel.org>:
> On Thu, Jan 05, 2017 at 10:25:38AM +0100, Benjamin Gaignard wrote:
>> This hardware block could at used at same time for PWM generation
>> and IIO timers.
>> PWM and IIO timer configuration are mixed in the same registers
>> so we need a multi fonction driver to be able to share those registers.
>>
>> version 7:
>> - rebase on v4.10-rc2
>>
>> version 6:
>> - rename files to stm32-timers
>> - rename functions to stm32_timers_xxx
>>
>> version 5:
>> - fix Lee comments about detect function
>> - add missing dependency on REGMAP_MMIO
>>
>> version 4:
>> - add a function to detect Auto Reload Register (ARR) size
>> - rename the structure shared with other drivers
>>
>> version 2:
>> - rename driver "stm32-gptimer" to be align with SoC documentation
>> - only keep one compatible
>> - use of_platform_populate() instead of devm_mfd_add_devices()
>>
>> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
>> ---
>>  .../devicetree/bindings/mfd/stm32-timers.txt       |  2 +-
>>  drivers/mfd/Kconfig                                | 11 +++
>>  drivers/mfd/Makefile                               |  2 +
>>  drivers/mfd/stm32-timers.c                         | 80 ++++++++++++++++++++++
>>  include/linux/mfd/stm32-timers.h                   | 71 +++++++++++++++++++
>>  5 files changed, 165 insertions(+), 1 deletion(-)
>>  create mode 100644 drivers/mfd/stm32-timers.c
>>  create mode 100644 include/linux/mfd/stm32-timers.h
>>
>> diff --git a/Documentation/devicetree/bindings/mfd/stm32-timers.txt b/Documentation/devicetree/bindings/mfd/stm32-timers.txt
>> index a73301d..897e7c2 100644
>> --- a/Documentation/devicetree/bindings/mfd/stm32-timers.txt
>> +++ b/Documentation/devicetree/bindings/mfd/stm32-timers.txt
>> @@ -12,7 +12,7 @@ Required parameters:
>>
>>  - reg:                       Physical base address and length of the controller's
>>                       registers.
>> -- clock-names:               Set to "int".
>> +- clock-names:               Set to "int".
>
> This hunk should be dropped or moved to previous patch.

I will move it in the previous patch

>
>>  - clocks:            Phandle to the clock used by the timer module.
>>                       For Clk properties, please refer to ../clock/clock-bindings.txt
>>



-- 
Benjamin Gaignard

Graphic Study Group

Linaro.org │ Open source software for ARM SoCs

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#1551814 — [PATCH v7 1/8] MFD: add bindings for STM32 Timers driver

FromBenjamin Gaignard <benjamin.gaignard@linaro.org>
Date2017-01-05 10:30 +0100
Subject[PATCH v7 1/8] MFD: add bindings for STM32 Timers driver
Message-ID<sWcwW-Vl-43@gated-at.bofh.it>
In reply to#1551811
Add bindings information for STM32 Timers

version 6:
- rename stm32-gtimer to stm32-timers
- change compatible
- add description about the IPs

version 2:
- rename stm32-mfd-timer to stm32-gptimer
- only keep one compatible string

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
---
 .../devicetree/bindings/mfd/stm32-timers.txt       | 46 ++++++++++++++++++++++
 1 file changed, 46 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/stm32-timers.txt

diff --git a/Documentation/devicetree/bindings/mfd/stm32-timers.txt b/Documentation/devicetree/bindings/mfd/stm32-timers.txt
new file mode 100644
index 0000000..a73301d
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/stm32-timers.txt
@@ -0,0 +1,46 @@
+STM32 Timers driver bindings
+
+This IP provides 3 types of timer along with PWM functionality:
+- advanced-control timers consist of a 16-bit auto-reload counter driven by a programmable
+  prescaler, break input feature, PWM outputs and complementary PWM ouputs channels.
+- general-purpose timers consist of a 16-bit or 32-bit auto-reload counter driven by a
+  programmable prescaler and PWM outputs.
+- basic timers consist of a 16-bit auto-reload counter driven by a programmable prescaler.
+
+Required parameters:
+- compatible: must be "st,stm32-timers"
+
+- reg:			Physical base address and length of the controller's
+			registers.
+- clock-names: 		Set to "int".
+- clocks: 		Phandle to the clock used by the timer module.
+			For Clk properties, please refer to ../clock/clock-bindings.txt
+
+Optional parameters:
+- resets:		Phandle to the parent reset controller.
+			See ../reset/st,stm32-rcc.txt
+
+Optional subnodes:
+- pwm:			See ../pwm/pwm-stm32.txt
+- timer:		See ../iio/timer/stm32-timer-trigger.txt
+
+Example:
+	timers@40010000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "st,stm32-timers";
+		reg = <0x40010000 0x400>;
+		clocks = <&rcc 0 160>;
+		clock-names = "clk_int";
+
+		pwm {
+			compatible = "st,stm32-pwm";
+			pinctrl-0	= <&pwm1_pins>;
+			pinctrl-names	= "default";
+		};
+
+		timer {
+			compatible = "st,stm32-timer-trigger";
+			reg = <0>;
+		};
+	};
-- 
1.9.1

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#1554560 — Re: [PATCH v7 1/8] MFD: add bindings for STM32 Timers driver

FromRob Herring <robh@kernel.org>
Date2017-01-09 19:10 +0100
SubjectRe: [PATCH v7 1/8] MFD: add bindings for STM32 Timers driver
Message-ID<sXMyl-7wx-1@gated-at.bofh.it>
In reply to#1551814
On Thu, Jan 05, 2017 at 10:25:37AM +0100, Benjamin Gaignard wrote:
> Add bindings information for STM32 Timers
> 
> version 6:
> - rename stm32-gtimer to stm32-timers
> - change compatible
> - add description about the IPs
> 
> version 2:
> - rename stm32-mfd-timer to stm32-gptimer
> - only keep one compatible string
> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
> ---
>  .../devicetree/bindings/mfd/stm32-timers.txt       | 46 ++++++++++++++++++++++
>  1 file changed, 46 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mfd/stm32-timers.txt

Acked-by: Rob Herring <robh@kernel.org>

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#1552024

FromLee Jones <lee.jones@linaro.org>
Date2017-01-05 15:50 +0100
Message-ID<sWhwB-4ll-7@gated-at.bofh.it>
In reply to#1551811
On Thu, 05 Jan 2017, Benjamin Gaignard wrote:

> version 7:
> - rebase on v4.10-rc2
> - remove iio_device code from driver and keep only the trigger part
> 
> version 6:
> - rename stm32-gptimer in stm32-timers.
> - change "st,stm32-gptimer" compatible to "st,stm32-timers".
> - modify "st,breakinput" parameter in pwm part.
> - split DT patch in 2
> 
> version 5:
> - fix comments done on version 4
> - rebased on kernel 4.9-rc8
> - change nodes names and re-order then by addresses
> 
> version 4:
> - fix comments done on version 3
> - don't use interrupts anymore in IIO timer
> - detect hardware capabilities at probe time to simplify binding
> 
> version 3:
> - no change on mfd and pwm divers patches
> - add cross reference between bindings
> - change compatible to "st,stm32-timer-trigger"
> - fix attributes access rights
> - use string instead of int for master_mode and slave_mode
> - document device attributes in sysfs-bus-iio-timer-stm32
> - update DT with the new compatible
> 
> version 2:
> - keep only one compatible per driver
> - use DT parameters to describe hardware block configuration:
>   - pwm channels, complementary output, counter size, break input
>   - triggers accepted and create by IIO timers
> - change DT to limite use of reference to the node
> - interrupt is now in IIO timer driver
> - rename stm32-mfd-timer to stm32-timers (for general purpose timer)
> 
> The following patches enable PWM and IIO Timer features for STM32 platforms.
> 
> Those two features are mixed into the registers of the same hardware block
> (named general purpose timer) which lead to introduce a multifunctions driver 
> on the top of them to be able to share the registers.
> 
> In STM32f4 14 instances of timer hardware block exist, even if they all have
> the same register mapping they could have a different number of pwm channels
> and/or different triggers capabilities. We use various parameters in DT to 
> describe the differences between hardware blocks
> 
> The MFD (stm32-timers.c) takes care of clock and register mapping
> by using regmap. stm32_timers structure is provided to its sub-node to
> share those information.
> 
> PWM driver is implemented into pwm-stm32.c. Depending of the instance we may
> have up to 4 channels, sometime with complementary outputs or 32 bits counter
> instead of 16 bits. Some hardware blocks may also have a break input function
> which allows to stop pwm depending of a level, defined in devicetree, on an
> external pin.
> 
> IIO timer driver (stm32-timer-trigger.c and stm32-timer-trigger.h) define a list
> of hardware triggers usable by hardware blocks like ADC, DAC or other timers. 
> 
> The matrix of possible connections between blocks is quite complex so we use 
> trigger names and is_stm32_iio_timer_trigger() function to be sure that
> triggers are valid and configure the IPs.
> 
> At run time IIO timer hardware blocks can configure (through "master_mode" 
> IIO device attribute) which internal signal (counter enable, reset,
> comparison block, etc...) is used to generate the trigger.
> 
> Benjamin Gaignard (8):
>   MFD: add bindings for STM32 Timers driver
>   MFD: add STM32 Timers driver
>   PWM: add pwm-stm32 DT bindings
>   PWM: add PWM driver for STM32 plaftorm
>   IIO: add bindings for STM32 timer trigger driver
>   IIO: add STM32 timer trigger driver
>   ARM: dts: stm32: add Timers driver for stm32f429 MCU
>   ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-disco

Any reason why you've dropped all your Acks?

I don't really want to review it again if little is different.

How much MFD related code has changed since the last review?

>  .../ABI/testing/sysfs-bus-iio-timer-stm32          |  29 ++
>  .../bindings/iio/timer/stm32-timer-trigger.txt     |  23 ++
>  .../devicetree/bindings/mfd/stm32-timers.txt       |  46 +++
>  .../devicetree/bindings/pwm/pwm-stm32.txt          |  33 ++
>  arch/arm/boot/dts/stm32f429.dtsi                   | 275 +++++++++++++
>  arch/arm/boot/dts/stm32f469-disco.dts              |  28 ++
>  drivers/iio/Kconfig                                |   1 -
>  drivers/iio/trigger/Kconfig                        |  10 +
>  drivers/iio/trigger/Makefile                       |   1 +
>  drivers/iio/trigger/stm32-timer-trigger.c          | 340 ++++++++++++++++
>  drivers/mfd/Kconfig                                |  11 +
>  drivers/mfd/Makefile                               |   2 +
>  drivers/mfd/stm32-timers.c                         |  80 ++++
>  drivers/pwm/Kconfig                                |   9 +
>  drivers/pwm/Makefile                               |   1 +
>  drivers/pwm/pwm-stm32.c                            | 434 +++++++++++++++++++++
>  include/linux/iio/timer/stm32-timer-trigger.h      |  62 +++
>  include/linux/mfd/stm32-timers.h                   |  71 ++++
>  18 files changed, 1455 insertions(+), 1 deletion(-)
>  create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-timer-stm32
>  create mode 100644 Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt
>  create mode 100644 Documentation/devicetree/bindings/mfd/stm32-timers.txt
>  create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32.txt
>  create mode 100644 drivers/iio/trigger/stm32-timer-trigger.c
>  create mode 100644 drivers/mfd/stm32-timers.c
>  create mode 100644 drivers/pwm/pwm-stm32.c
>  create mode 100644 include/linux/iio/timer/stm32-timer-trigger.h
>  create mode 100644 include/linux/mfd/stm32-timers.h
> 

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

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#1552583

FromBenjamin Gaignard <benjamin.gaignard@linaro.org>
Date2017-01-06 09:00 +0100
Message-ID<sWxBn-6Us-3@gated-at.bofh.it>
In reply to#1552024
2017-01-05 15:49 GMT+01:00 Lee Jones <lee.jones@linaro.org>:
> On Thu, 05 Jan 2017, Benjamin Gaignard wrote:
>
>> version 7:
>> - rebase on v4.10-rc2
>> - remove iio_device code from driver and keep only the trigger part
>>
>> version 6:
>> - rename stm32-gptimer in stm32-timers.
>> - change "st,stm32-gptimer" compatible to "st,stm32-timers".
>> - modify "st,breakinput" parameter in pwm part.
>> - split DT patch in 2
>>
>> version 5:
>> - fix comments done on version 4
>> - rebased on kernel 4.9-rc8
>> - change nodes names and re-order then by addresses
>>
>> version 4:
>> - fix comments done on version 3
>> - don't use interrupts anymore in IIO timer
>> - detect hardware capabilities at probe time to simplify binding
>>
>> version 3:
>> - no change on mfd and pwm divers patches
>> - add cross reference between bindings
>> - change compatible to "st,stm32-timer-trigger"
>> - fix attributes access rights
>> - use string instead of int for master_mode and slave_mode
>> - document device attributes in sysfs-bus-iio-timer-stm32
>> - update DT with the new compatible
>>
>> version 2:
>> - keep only one compatible per driver
>> - use DT parameters to describe hardware block configuration:
>>   - pwm channels, complementary output, counter size, break input
>>   - triggers accepted and create by IIO timers
>> - change DT to limite use of reference to the node
>> - interrupt is now in IIO timer driver
>> - rename stm32-mfd-timer to stm32-timers (for general purpose timer)
>>
>> The following patches enable PWM and IIO Timer features for STM32 platforms.
>>
>> Those two features are mixed into the registers of the same hardware block
>> (named general purpose timer) which lead to introduce a multifunctions driver
>> on the top of them to be able to share the registers.
>>
>> In STM32f4 14 instances of timer hardware block exist, even if they all have
>> the same register mapping they could have a different number of pwm channels
>> and/or different triggers capabilities. We use various parameters in DT to
>> describe the differences between hardware blocks
>>
>> The MFD (stm32-timers.c) takes care of clock and register mapping
>> by using regmap. stm32_timers structure is provided to its sub-node to
>> share those information.
>>
>> PWM driver is implemented into pwm-stm32.c. Depending of the instance we may
>> have up to 4 channels, sometime with complementary outputs or 32 bits counter
>> instead of 16 bits. Some hardware blocks may also have a break input function
>> which allows to stop pwm depending of a level, defined in devicetree, on an
>> external pin.
>>
>> IIO timer driver (stm32-timer-trigger.c and stm32-timer-trigger.h) define a list
>> of hardware triggers usable by hardware blocks like ADC, DAC or other timers.
>>
>> The matrix of possible connections between blocks is quite complex so we use
>> trigger names and is_stm32_iio_timer_trigger() function to be sure that
>> triggers are valid and configure the IPs.
>>
>> At run time IIO timer hardware blocks can configure (through "master_mode"
>> IIO device attribute) which internal signal (counter enable, reset,
>> comparison block, etc...) is used to generate the trigger.
>>
>> Benjamin Gaignard (8):
>>   MFD: add bindings for STM32 Timers driver
>>   MFD: add STM32 Timers driver
>>   PWM: add pwm-stm32 DT bindings
>>   PWM: add PWM driver for STM32 plaftorm
>>   IIO: add bindings for STM32 timer trigger driver
>>   IIO: add STM32 timer trigger driver
>>   ARM: dts: stm32: add Timers driver for stm32f429 MCU
>>   ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-disco
>
> Any reason why you've dropped all your Acks?
>
> I don't really want to review it again if little is different.
>
> How much MFD related code has changed since the last review?

All my apologies I forgot to add your Acks for MFD parts.

Sorry for that

>
>>  .../ABI/testing/sysfs-bus-iio-timer-stm32          |  29 ++
>>  .../bindings/iio/timer/stm32-timer-trigger.txt     |  23 ++
>>  .../devicetree/bindings/mfd/stm32-timers.txt       |  46 +++
>>  .../devicetree/bindings/pwm/pwm-stm32.txt          |  33 ++
>>  arch/arm/boot/dts/stm32f429.dtsi                   | 275 +++++++++++++
>>  arch/arm/boot/dts/stm32f469-disco.dts              |  28 ++
>>  drivers/iio/Kconfig                                |   1 -
>>  drivers/iio/trigger/Kconfig                        |  10 +
>>  drivers/iio/trigger/Makefile                       |   1 +
>>  drivers/iio/trigger/stm32-timer-trigger.c          | 340 ++++++++++++++++
>>  drivers/mfd/Kconfig                                |  11 +
>>  drivers/mfd/Makefile                               |   2 +
>>  drivers/mfd/stm32-timers.c                         |  80 ++++
>>  drivers/pwm/Kconfig                                |   9 +
>>  drivers/pwm/Makefile                               |   1 +
>>  drivers/pwm/pwm-stm32.c                            | 434 +++++++++++++++++++++
>>  include/linux/iio/timer/stm32-timer-trigger.h      |  62 +++
>>  include/linux/mfd/stm32-timers.h                   |  71 ++++
>>  18 files changed, 1455 insertions(+), 1 deletion(-)
>>  create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-timer-stm32
>>  create mode 100644 Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt
>>  create mode 100644 Documentation/devicetree/bindings/mfd/stm32-timers.txt
>>  create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32.txt
>>  create mode 100644 drivers/iio/trigger/stm32-timer-trigger.c
>>  create mode 100644 drivers/mfd/stm32-timers.c
>>  create mode 100644 drivers/pwm/pwm-stm32.c
>>  create mode 100644 include/linux/iio/timer/stm32-timer-trigger.h
>>  create mode 100644 include/linux/mfd/stm32-timers.h
>>
>
> --
> Lee Jones
> Linaro STMicroelectronics Landing Team Lead
> Linaro.org │ Open source software for ARM SoCs
> Follow Linaro: Facebook | Twitter | Blog



-- 
Benjamin Gaignard

Graphic Study Group

Linaro.org │ Open source software for ARM SoCs

Follow Linaro: Facebook | Twitter | Blog

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#1558372

FromBenjamin Gaignard <benjamin.gaignard@linaro.org>
Date2017-01-13 13:40 +0100
Message-ID<sZ9jb-Rn-13@gated-at.bofh.it>
In reply to#1552583
2017-01-06 8:58 GMT+01:00 Benjamin Gaignard <benjamin.gaignard@linaro.org>:
> 2017-01-05 15:49 GMT+01:00 Lee Jones <lee.jones@linaro.org>:
>> On Thu, 05 Jan 2017, Benjamin Gaignard wrote:
>>
>>> version 7:
>>> - rebase on v4.10-rc2
>>> - remove iio_device code from driver and keep only the trigger part

Version 7 got ACK for MFD (binding and driver), PWM (bindings), IIO (driver).

I would like to progress on this series but I there is still 2 blocking points:
1) usage of reg in IIO driver as an hardware block index, Rob does it
sound reasonable for you ?
2) PWM driver haven't receive comments (neither ack), Thierry do you
think you will be able to find time to review it ?

Benjamin

>>>
>>> version 6:
>>> - rename stm32-gptimer in stm32-timers.
>>> - change "st,stm32-gptimer" compatible to "st,stm32-timers".
>>> - modify "st,breakinput" parameter in pwm part.
>>> - split DT patch in 2
>>>
>>> version 5:
>>> - fix comments done on version 4
>>> - rebased on kernel 4.9-rc8
>>> - change nodes names and re-order then by addresses
>>>
>>> version 4:
>>> - fix comments done on version 3
>>> - don't use interrupts anymore in IIO timer
>>> - detect hardware capabilities at probe time to simplify binding
>>>
>>> version 3:
>>> - no change on mfd and pwm divers patches
>>> - add cross reference between bindings
>>> - change compatible to "st,stm32-timer-trigger"
>>> - fix attributes access rights
>>> - use string instead of int for master_mode and slave_mode
>>> - document device attributes in sysfs-bus-iio-timer-stm32
>>> - update DT with the new compatible
>>>
>>> version 2:
>>> - keep only one compatible per driver
>>> - use DT parameters to describe hardware block configuration:
>>>   - pwm channels, complementary output, counter size, break input
>>>   - triggers accepted and create by IIO timers
>>> - change DT to limite use of reference to the node
>>> - interrupt is now in IIO timer driver
>>> - rename stm32-mfd-timer to stm32-timers (for general purpose timer)
>>>
>>> The following patches enable PWM and IIO Timer features for STM32 platforms.
>>>
>>> Those two features are mixed into the registers of the same hardware block
>>> (named general purpose timer) which lead to introduce a multifunctions driver
>>> on the top of them to be able to share the registers.
>>>
>>> In STM32f4 14 instances of timer hardware block exist, even if they all have
>>> the same register mapping they could have a different number of pwm channels
>>> and/or different triggers capabilities. We use various parameters in DT to
>>> describe the differences between hardware blocks
>>>
>>> The MFD (stm32-timers.c) takes care of clock and register mapping
>>> by using regmap. stm32_timers structure is provided to its sub-node to
>>> share those information.
>>>
>>> PWM driver is implemented into pwm-stm32.c. Depending of the instance we may
>>> have up to 4 channels, sometime with complementary outputs or 32 bits counter
>>> instead of 16 bits. Some hardware blocks may also have a break input function
>>> which allows to stop pwm depending of a level, defined in devicetree, on an
>>> external pin.
>>>
>>> IIO timer driver (stm32-timer-trigger.c and stm32-timer-trigger.h) define a list
>>> of hardware triggers usable by hardware blocks like ADC, DAC or other timers.
>>>
>>> The matrix of possible connections between blocks is quite complex so we use
>>> trigger names and is_stm32_iio_timer_trigger() function to be sure that
>>> triggers are valid and configure the IPs.
>>>
>>> At run time IIO timer hardware blocks can configure (through "master_mode"
>>> IIO device attribute) which internal signal (counter enable, reset,
>>> comparison block, etc...) is used to generate the trigger.
>>>
>>> Benjamin Gaignard (8):
>>>   MFD: add bindings for STM32 Timers driver
>>>   MFD: add STM32 Timers driver
>>>   PWM: add pwm-stm32 DT bindings
>>>   PWM: add PWM driver for STM32 plaftorm
>>>   IIO: add bindings for STM32 timer trigger driver
>>>   IIO: add STM32 timer trigger driver
>>>   ARM: dts: stm32: add Timers driver for stm32f429 MCU
>>>   ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-disco
>>
>> Any reason why you've dropped all your Acks?
>>
>> I don't really want to review it again if little is different.
>>
>> How much MFD related code has changed since the last review?
>
> All my apologies I forgot to add your Acks for MFD parts.
>
> Sorry for that
>
>>
>>>  .../ABI/testing/sysfs-bus-iio-timer-stm32          |  29 ++
>>>  .../bindings/iio/timer/stm32-timer-trigger.txt     |  23 ++
>>>  .../devicetree/bindings/mfd/stm32-timers.txt       |  46 +++
>>>  .../devicetree/bindings/pwm/pwm-stm32.txt          |  33 ++
>>>  arch/arm/boot/dts/stm32f429.dtsi                   | 275 +++++++++++++
>>>  arch/arm/boot/dts/stm32f469-disco.dts              |  28 ++
>>>  drivers/iio/Kconfig                                |   1 -
>>>  drivers/iio/trigger/Kconfig                        |  10 +
>>>  drivers/iio/trigger/Makefile                       |   1 +
>>>  drivers/iio/trigger/stm32-timer-trigger.c          | 340 ++++++++++++++++
>>>  drivers/mfd/Kconfig                                |  11 +
>>>  drivers/mfd/Makefile                               |   2 +
>>>  drivers/mfd/stm32-timers.c                         |  80 ++++
>>>  drivers/pwm/Kconfig                                |   9 +
>>>  drivers/pwm/Makefile                               |   1 +
>>>  drivers/pwm/pwm-stm32.c                            | 434 +++++++++++++++++++++
>>>  include/linux/iio/timer/stm32-timer-trigger.h      |  62 +++
>>>  include/linux/mfd/stm32-timers.h                   |  71 ++++
>>>  18 files changed, 1455 insertions(+), 1 deletion(-)
>>>  create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-timer-stm32
>>>  create mode 100644 Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt
>>>  create mode 100644 Documentation/devicetree/bindings/mfd/stm32-timers.txt
>>>  create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32.txt
>>>  create mode 100644 drivers/iio/trigger/stm32-timer-trigger.c
>>>  create mode 100644 drivers/mfd/stm32-timers.c
>>>  create mode 100644 drivers/pwm/pwm-stm32.c
>>>  create mode 100644 include/linux/iio/timer/stm32-timer-trigger.h
>>>  create mode 100644 include/linux/mfd/stm32-timers.h
>>>
>>
>> --
>> Lee Jones
>> Linaro STMicroelectronics Landing Team Lead
>> Linaro.org │ Open source software for ARM SoCs
>> Follow Linaro: Facebook | Twitter | Blog
>
>
>
> --
> Benjamin Gaignard
>
> Graphic Study Group
>
> Linaro.org │ Open source software for ARM SoCs
>
> Follow Linaro: Facebook | Twitter | Blog



-- 
Benjamin Gaignard

Graphic Study Group

Linaro.org │ Open source software for ARM SoCs

Follow Linaro: Facebook | Twitter | Blog

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