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| Started by | Maxime Ripard <maxime.ripard@free-electrons.com> |
|---|---|
| First post | 2017-01-09 17:50 +0100 |
| Last post | 2017-01-10 02:00 +0100 |
| Articles | 3 — 2 participants |
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[PATCH v2 0/6] arm64: allwinner: a64: Enable MMC support Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-09 17:50 +0100
[PATCH v2 5/6] arm64: allwinner: a64: Add MMC pinctrl nodes Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-09 17:50 +0100
Re: [PATCH v2 5/6] arm64: allwinner: a64: Add MMC pinctrl nodes André Przywara <andre.przywara@arm.com> - 2017-01-10 02:00 +0100
| From | Maxime Ripard <maxime.ripard@free-electrons.com> |
|---|---|
| Date | 2017-01-09 17:50 +0100 |
| Subject | [PATCH v2 0/6] arm64: allwinner: a64: Enable MMC support |
| Message-ID | <sXLiW-6zl-5@gated-at.bofh.it> |
Hi, Here is a second attempt at getting the MMC controllers running, the first having been done by Andre. This has been tested on a board with one SDIO device (a Marvell WiFi chip) and a Kingston eMMC with 1.8V IOs. For SDIO, the HS DDR mode works just fine. There's a little bit of work to get to SDR104, but that will come eventually. For the eMMC, HS200 with the voltage switch works. HS400 doesn't at the moment, but since it's significantly more complex, and at the same time Allwinner recommends to limit its frequency to 100MHz, this doesn't have any benefits. If there's any at some point, this can be added later. Let me know what you think, Maxime Andre Przywara (1): arm64: allwinner: a64: Add MMC nodes Maxime Ripard (5): mmc: sunxi: Always set signal delay to 0 for A64 mmc: sunxi: Enable the new timings for the A64 MMC controllers mmc: sunxi: Add EMMC (MMC2) controller compatible arm64: allwinner: a64: Add MMC pinctrl nodes arm64: allwinner: a64: Increase the MMC max frequency arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 67 ++++++++++++++++++++- drivers/mmc/host/sunxi-mmc.c | 63 +++++++++---------- 2 files changed, 97 insertions(+), 33 deletions(-) base-commit: f9ca9b952ee139fbb9cd4d354a33f440bc1049cd -- git-series 0.8.11
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| From | Maxime Ripard <maxime.ripard@free-electrons.com> |
|---|---|
| Date | 2017-01-09 17:50 +0100 |
| Subject | [PATCH v2 5/6] arm64: allwinner: a64: Add MMC pinctrl nodes |
| Message-ID | <sXLiX-6zl-47@gated-at.bofh.it> |
| In reply to | #1554488 |
The A64 only has a single set of pins for each MMC controller. Since we
already have boards that require all of them, let's add them to the DTSI.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 25 ++++++++++++++++++++-
1 file changed, 25 insertions(+), 0 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 143e9706438f..8e149498e096 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -205,6 +205,31 @@
function = "i2c1";
};
+ mmc0_pins: mmc0-pins {
+ pins = "PF0", "PF1", "PF2", "PF3",
+ "PF4", "PF5";
+ function = "mmc0";
+ drive-strength = <30>;
+ bias-pull-up;
+ };
+
+ mmc1_pins: mmc1-pins {
+ pins = "PG0", "PG1", "PG2", "PG3",
+ "PG4", "PG5";
+ function = "mmc1";
+ drive-strength = <30>;
+ bias-pull-up;
+ };
+
+ mmc2_pins: mmc2-pins {
+ pins = "PC1", "PC5", "PC6", "PC8", "PC9",
+ "PC10","PC11", "PC12", "PC13",
+ "PC14", "PC15", "PC16";
+ function = "mmc2";
+ drive-strength = <30>;
+ bias-pull-up;
+ };
+
uart0_pins_a: uart0@0 {
pins = "PB8", "PB9";
function = "uart0";
--
git-series 0.8.11
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| From | André Przywara <andre.przywara@arm.com> |
|---|---|
| Date | 2017-01-10 02:00 +0100 |
| Subject | Re: [PATCH v2 5/6] arm64: allwinner: a64: Add MMC pinctrl nodes |
| Message-ID | <sXSX7-2HO-5@gated-at.bofh.it> |
| In reply to | #1554491 |
On 09/01/17 16:46, Maxime Ripard wrote:
> The A64 only has a single set of pins for each MMC controller. Since we
> already have boards that require all of them, let's add them to the DTSI.
This matches my reworked version from the previous series, so:
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Cheers,
Andre.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 25 ++++++++++++++++++++-
> 1 file changed, 25 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index 143e9706438f..8e149498e096 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -205,6 +205,31 @@
> function = "i2c1";
> };
>
> + mmc0_pins: mmc0-pins {
> + pins = "PF0", "PF1", "PF2", "PF3",
> + "PF4", "PF5";
> + function = "mmc0";
> + drive-strength = <30>;
> + bias-pull-up;
> + };
> +
> + mmc1_pins: mmc1-pins {
> + pins = "PG0", "PG1", "PG2", "PG3",
> + "PG4", "PG5";
> + function = "mmc1";
> + drive-strength = <30>;
> + bias-pull-up;
> + };
> +
> + mmc2_pins: mmc2-pins {
> + pins = "PC1", "PC5", "PC6", "PC8", "PC9",
> + "PC10","PC11", "PC12", "PC13",
> + "PC14", "PC15", "PC16";
> + function = "mmc2";
> + drive-strength = <30>;
> + bias-pull-up;
> + };
> +
> uart0_pins_a: uart0@0 {
> pins = "PB8", "PB9";
> function = "uart0";
>
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