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Groups > linux.kernel > #1553347 > unrolled thread

[PATCH v2 0/9] Use mmio-sram driver for Keystone MSMC RAM

Started bySuman Anna <s-anna@ti.com>
First post2017-01-06 23:40 +0100
Last post2017-01-07 21:40 +0100
Articles 10 — 2 participants

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  [PATCH v2 0/9] Use mmio-sram driver for Keystone MSMC RAM Suman Anna <s-anna@ti.com> - 2017-01-06 23:40 +0100
    [PATCH v2 8/9] ARM: dts: keystone-k2e: Reserve MSM RAM for boot monitor Suman Anna <s-anna@ti.com> - 2017-01-06 23:40 +0100
    [PATCH v2 9/9] ARM: dts: keystone-k2g: Reserve MSM RAM for boot monitor Suman Anna <s-anna@ti.com> - 2017-01-06 23:40 +0100
    [PATCH v2 3/9] ARM: dts: keystone-k2e: Add MSM RAM node Suman Anna <s-anna@ti.com> - 2017-01-06 23:40 +0100
    [PATCH v2 4/9] ARM: dts: keystone-k2g: Add MSM RAM node Suman Anna <s-anna@ti.com> - 2017-01-06 23:40 +0100
    [PATCH v2 6/9] ARM: dts: keystone-k2hk: Reserve MSM RAM for boot monitor Suman Anna <s-anna@ti.com> - 2017-01-06 23:40 +0100
    [PATCH v2 7/9] ARM: dts: keystone-k2l: Reserve MSM RAM for boot monitor Suman Anna <s-anna@ti.com> - 2017-01-06 23:40 +0100
    [PATCH v2 1/9] ARM: dts: keystone-k2hk: Add MSM RAM node Suman Anna <s-anna@ti.com> - 2017-01-06 23:40 +0100
    [PATCH v2 2/9] ARM: dts: keystone-k2l: Add MSM RAM node Suman Anna <s-anna@ti.com> - 2017-01-06 23:40 +0100
    Re: [PATCH v2 0/9] Use mmio-sram driver for Keystone MSMC RAM "santosh.shilimkar@oracle.com" <santosh.shilimkar@oracle.com> - 2017-01-07 21:40 +0100

#1553347 — [PATCH v2 0/9] Use mmio-sram driver for Keystone MSMC RAM

FromSuman Anna <s-anna@ti.com>
Date2017-01-06 23:40 +0100
Subject[PATCH v2 0/9] Use mmio-sram driver for Keystone MSMC RAM
Message-ID<sWKRZ-8g7-85@gated-at.bofh.it>
Hi,

The Keystone 2 family of SoCs have an on-chip RAM called the
Multicore Shared Memory (MSM) RAM. This RAM is accessible through
the Multicore Shared Memory Controller (MSMC). This series represents
these on-chip RAMs as sram nodes so that the memory allocations
can be managed by the in-kernel mmio-sram driver.

This is v2 of the previous series [1], and now includes 4 additional
patches that reserve the portions of the MSMC RAM used by the
Keystone Boot Monitor. The first 5 patches are essentially the same
as in v1, with minor commit description updates for using the proper
SoC names, but no code changes.

Patches baselined on 4.10-rc1.

regards
Suman

[1] http://marc.info/?l=linux-arm-kernel&m=147277092730387&w=2

Suman Anna (9):
  ARM: dts: keystone-k2hk: Add MSM RAM node
  ARM: dts: keystone-k2l: Add MSM RAM node
  ARM: dts: keystone-k2e: Add MSM RAM node
  ARM: dts: keystone-k2g: Add MSM RAM node
  ARM: configs: keystone: Enable Generic on-chip SRAM driver
  ARM: dts: keystone-k2hk: Reserve MSM RAM for boot monitor
  ARM: dts: keystone-k2l: Reserve MSM RAM for boot monitor
  ARM: dts: keystone-k2e: Reserve MSM RAM for boot monitor
  ARM: dts: keystone-k2g: Reserve MSM RAM for boot monitor

 arch/arm/boot/dts/keystone-k2e.dtsi  | 12 ++++++++++++
 arch/arm/boot/dts/keystone-k2g.dtsi  | 12 ++++++++++++
 arch/arm/boot/dts/keystone-k2hk.dtsi | 12 ++++++++++++
 arch/arm/boot/dts/keystone-k2l.dtsi  | 12 ++++++++++++
 arch/arm/configs/keystone_defconfig  |  1 +
 5 files changed, 49 insertions(+)

-- 
2.10.2

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#1553351 — [PATCH v2 8/9] ARM: dts: keystone-k2e: Reserve MSM RAM for boot monitor

FromSuman Anna <s-anna@ti.com>
Date2017-01-06 23:40 +0100
Subject[PATCH v2 8/9] ARM: dts: keystone-k2e: Reserve MSM RAM for boot monitor
Message-ID<sWLkZ-8sx-3@gated-at.bofh.it>
In reply to#1553347
The Keystone 2 boot monitor uses 32 KB of the MSM RAM @ 0x0c1f0000
on 66AK2E SoCs, so add a reserved child node for the same.

This address is aligned to the values used within the latest boot
monitor firmware [1] as of commit cf8b431e8b3b ("soc: Move load
address to end of MSMC").

[1] git://git.ti.com/processor-firmware/ks2-boot-monitor.git

Signed-off-by: Suman Anna <s-anna@ti.com>
---
 arch/arm/boot/dts/keystone-k2e.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/keystone-k2e.dtsi b/arch/arm/boot/dts/keystone-k2e.dtsi
index 256dcc87f36a..9d1d8a64d10e 100644
--- a/arch/arm/boot/dts/keystone-k2e.dtsi
+++ b/arch/arm/boot/dts/keystone-k2e.dtsi
@@ -88,6 +88,10 @@
 			ranges = <0x0 0x0c000000 0x200000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
+
+			sram-bm@1f0000 {
+				reg = <0x001f0000 0x8000>;
+			};
 		};
 
 		dspgpio0: keystone_dsp_gpio@02620240 {
-- 
2.10.2

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#1553352 — [PATCH v2 9/9] ARM: dts: keystone-k2g: Reserve MSM RAM for boot monitor

FromSuman Anna <s-anna@ti.com>
Date2017-01-06 23:40 +0100
Subject[PATCH v2 9/9] ARM: dts: keystone-k2g: Reserve MSM RAM for boot monitor
Message-ID<sWLkZ-8sx-7@gated-at.bofh.it>
In reply to#1553347
The Keystone 2 boot monitor uses 32 KB of the MSM RAM @ 0x0c0f7000
on 66AK2G SoCs, so add a reserved child node for the same.

This address is aligned to the values used within the latest boot
monitor firmware [1] as of commit cf8b431e8b3b ("soc: Move load
address to end of MSMC").

[1] git://git.ti.com/processor-firmware/ks2-boot-monitor.git

Signed-off-by: Suman Anna <s-anna@ti.com>
---
 arch/arm/boot/dts/keystone-k2g.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi b/arch/arm/boot/dts/keystone-k2g.dtsi
index e63e57e03b7c..c36d168bc874 100644
--- a/arch/arm/boot/dts/keystone-k2g.dtsi
+++ b/arch/arm/boot/dts/keystone-k2g.dtsi
@@ -83,6 +83,10 @@
 			ranges = <0x0 0x0c000000 0x100000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
+
+			sram-bm@f7000 {
+				reg = <0x000f7000 0x8000>;
+			};
 		};
 
 		k2g_pinctrl: pinmux@02621000 {
-- 
2.10.2

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#1553357 — [PATCH v2 3/9] ARM: dts: keystone-k2e: Add MSM RAM node

FromSuman Anna <s-anna@ti.com>
Date2017-01-06 23:40 +0100
Subject[PATCH v2 3/9] ARM: dts: keystone-k2e: Add MSM RAM node
Message-ID<sWLl0-8sx-23@gated-at.bofh.it>
In reply to#1553347
Add the RAM managed by the Multicire Shared Memory Controller (MSMC)
as a mmio-sram node. The 66AK2E SoCs have 2 MB of such memory. Any
specific MSM memory range needed by a software module ought to be
reserved using an appropriate child node.

Signed-off-by: Suman Anna <s-anna@ti.com>
---
v2: No code changes, SoC name in commit message corrected to use 66AK2E

 arch/arm/boot/dts/keystone-k2e.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/keystone-k2e.dtsi b/arch/arm/boot/dts/keystone-k2e.dtsi
index 497c417db5b6..256dcc87f36a 100644
--- a/arch/arm/boot/dts/keystone-k2e.dtsi
+++ b/arch/arm/boot/dts/keystone-k2e.dtsi
@@ -82,6 +82,14 @@
 			};
 		};
 
+		msm_ram: msmram@0c000000 {
+			compatible = "mmio-sram";
+			reg = <0x0c000000 0x200000>;
+			ranges = <0x0 0x0c000000 0x200000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+		};
+
 		dspgpio0: keystone_dsp_gpio@02620240 {
 			compatible = "ti,keystone-dsp-gpio";
 			gpio-controller;
-- 
2.10.2

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#1553363 — [PATCH v2 4/9] ARM: dts: keystone-k2g: Add MSM RAM node

FromSuman Anna <s-anna@ti.com>
Date2017-01-06 23:40 +0100
Subject[PATCH v2 4/9] ARM: dts: keystone-k2g: Add MSM RAM node
Message-ID<sWLl0-8sx-41@gated-at.bofh.it>
In reply to#1553347
Add the RAM managed by the Multicore Shared Memory Controller (MSMC)
as a mmio-sram node. The 66AK2G SoCs have 1 MB of such memory. Any
specific MSM memory range needed by a software module ought to be
reserved using an appropriate child node.

Signed-off-by: Suman Anna <s-anna@ti.com>
---
v2: No code changes, SoC name in commit message corrected to use 66AK2G

 arch/arm/boot/dts/keystone-k2g.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi b/arch/arm/boot/dts/keystone-k2g.dtsi
index 63c7cf0c6b6d..e63e57e03b7c 100644
--- a/arch/arm/boot/dts/keystone-k2g.dtsi
+++ b/arch/arm/boot/dts/keystone-k2g.dtsi
@@ -77,6 +77,14 @@
 		ranges = <0x0 0x0 0x0 0xc0000000>;
 		dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
 
+		msm_ram: msmram@0c000000 {
+			compatible = "mmio-sram";
+			reg = <0x0c000000 0x100000>;
+			ranges = <0x0 0x0c000000 0x100000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+		};
+
 		k2g_pinctrl: pinmux@02621000 {
 			compatible = "pinctrl-single";
 			reg = <0x02621000 0x410>;
-- 
2.10.2

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#1553366 — [PATCH v2 6/9] ARM: dts: keystone-k2hk: Reserve MSM RAM for boot monitor

FromSuman Anna <s-anna@ti.com>
Date2017-01-06 23:40 +0100
Subject[PATCH v2 6/9] ARM: dts: keystone-k2hk: Reserve MSM RAM for boot monitor
Message-ID<sWLl0-8sx-39@gated-at.bofh.it>
In reply to#1553347
The Keystone 2 boot monitor uses 32 KB of the MSM RAM @ 0x0c5f0000
on 66AK2H SoCs, so add a reserved child node for the same.

This address is aligned to the values used within the latest boot
monitor firmware [1] as of commit cf8b431e8b3b ("soc: Move load
address to end of MSMC").

[1] git://git.ti.com/processor-firmware/ks2-boot-monitor.git

Signed-off-by: Suman Anna <s-anna@ti.com>
---
 arch/arm/boot/dts/keystone-k2hk.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/keystone-k2hk.dtsi b/arch/arm/boot/dts/keystone-k2hk.dtsi
index 39e88d815235..e0780f111537 100644
--- a/arch/arm/boot/dts/keystone-k2hk.dtsi
+++ b/arch/arm/boot/dts/keystone-k2hk.dtsi
@@ -52,6 +52,10 @@
 			ranges = <0x0 0x0c000000 0x600000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
+
+			sram-bm@5f0000 {
+				reg = <0x5f0000 0x8000>;
+			};
 		};
 
 		dspgpio0: keystone_dsp_gpio@02620240 {
-- 
2.10.2

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#1553371 — [PATCH v2 7/9] ARM: dts: keystone-k2l: Reserve MSM RAM for boot monitor

FromSuman Anna <s-anna@ti.com>
Date2017-01-06 23:40 +0100
Subject[PATCH v2 7/9] ARM: dts: keystone-k2l: Reserve MSM RAM for boot monitor
Message-ID<sWLl0-8sx-49@gated-at.bofh.it>
In reply to#1553347
The Keystone 2 boot monitor uses 32 KB of the MSM RAM @ 0x0c1f8000
on 66AK2L SoCs, so add a reserved child node for the same.

This address is aligned to the values used within the latest boot
monitor firmware [1] as of commit cf8b431e8b3b ("soc: Move load
address to end of MSMC").

[1] git://git.ti.com/processor-firmware/ks2-boot-monitor.git

Signed-off-by: Suman Anna <s-anna@ti.com>
---
 arch/arm/boot/dts/keystone-k2l.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/keystone-k2l.dtsi b/arch/arm/boot/dts/keystone-k2l.dtsi
index edc08de4e196..b58015737a35 100644
--- a/arch/arm/boot/dts/keystone-k2l.dtsi
+++ b/arch/arm/boot/dts/keystone-k2l.dtsi
@@ -210,6 +210,10 @@
 			ranges = <0x0 0x0c000000 0x200000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
+
+			sram-bm@1f8000 {
+				reg = <0x001f8000 0x8000>;
+			};
 		};
 
 		dspgpio0: keystone_dsp_gpio@02620240 {
-- 
2.10.2

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#1553376 — [PATCH v2 1/9] ARM: dts: keystone-k2hk: Add MSM RAM node

FromSuman Anna <s-anna@ti.com>
Date2017-01-06 23:40 +0100
Subject[PATCH v2 1/9] ARM: dts: keystone-k2hk: Add MSM RAM node
Message-ID<sWLl1-8sx-73@gated-at.bofh.it>
In reply to#1553347
Add the RAM managed by the Multicore Shared Memory Controller (MSMC)
as a mmio-sram node. The 66AK2H SoCs have 6 MB of such memory. Any
specific MSM memory range needed by a software module ought to be
reserved using an appropriate child node.

Signed-off-by: Suman Anna <s-anna@ti.com>
---
v2: No code changes, SoC name in commit message corrected to use 66AK2H

 arch/arm/boot/dts/keystone-k2hk.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/keystone-k2hk.dtsi b/arch/arm/boot/dts/keystone-k2hk.dtsi
index 8f67fa8df936..39e88d815235 100644
--- a/arch/arm/boot/dts/keystone-k2hk.dtsi
+++ b/arch/arm/boot/dts/keystone-k2hk.dtsi
@@ -46,6 +46,14 @@
 	soc {
 		/include/ "keystone-k2hk-clocks.dtsi"
 
+		msm_ram: msmram@0c000000 {
+			compatible = "mmio-sram";
+			reg = <0x0c000000 0x600000>;
+			ranges = <0x0 0x0c000000 0x600000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+		};
+
 		dspgpio0: keystone_dsp_gpio@02620240 {
 			compatible = "ti,keystone-dsp-gpio";
 			gpio-controller;
-- 
2.10.2

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#1553377 — [PATCH v2 2/9] ARM: dts: keystone-k2l: Add MSM RAM node

FromSuman Anna <s-anna@ti.com>
Date2017-01-06 23:40 +0100
Subject[PATCH v2 2/9] ARM: dts: keystone-k2l: Add MSM RAM node
Message-ID<sWLl1-8sx-83@gated-at.bofh.it>
In reply to#1553347
Add the RAM managed by the Multicore Shared Memory Controller (MSMC)
as a mmio-sram node. The 66AK2L SoCs have 2 MB of such memory. Any
specific MSM memory range needed by a software module ought to be
reserved using an appropriate child node.

Signed-off-by: Suman Anna <s-anna@ti.com>
---
v2: No code changes, SoC name in commit message corrected to use 66AK2L

 arch/arm/boot/dts/keystone-k2l.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/keystone-k2l.dtsi b/arch/arm/boot/dts/keystone-k2l.dtsi
index 0c5e74e79ba2..edc08de4e196 100644
--- a/arch/arm/boot/dts/keystone-k2l.dtsi
+++ b/arch/arm/boot/dts/keystone-k2l.dtsi
@@ -204,6 +204,14 @@
 			};
 		};
 
+		msm_ram: msmram@0c000000 {
+			compatible = "mmio-sram";
+			reg = <0x0c000000 0x200000>;
+			ranges = <0x0 0x0c000000 0x200000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+		};
+
 		dspgpio0: keystone_dsp_gpio@02620240 {
 			compatible = "ti,keystone-dsp-gpio";
 			gpio-controller;
-- 
2.10.2

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#1553738

From"santosh.shilimkar@oracle.com" <santosh.shilimkar@oracle.com>
Date2017-01-07 21:40 +0100
Message-ID<sX5Wp-586-15@gated-at.bofh.it>
In reply to#1553347
On 1/6/17 1:57 PM, Suman Anna wrote:
> Hi,
>
> The Keystone 2 family of SoCs have an on-chip RAM called the
> Multicore Shared Memory (MSM) RAM. This RAM is accessible through
> the Multicore Shared Memory Controller (MSMC). This series represents
> these on-chip RAMs as sram nodes so that the memory allocations
> can be managed by the in-kernel mmio-sram driver.
>
> This is v2 of the previous series [1], and now includes 4 additional
> patches that reserve the portions of the MSMC RAM used by the
> Keystone Boot Monitor. The first 5 patches are essentially the same
> as in v1, with minor commit description updates for using the proper
> SoC names, but no code changes.
>
> Patches baselined on 4.10-rc1.
>
Applied. Should start showing up next soon. thanks !!

Regards,
Santosh

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