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[PATCH v2 0/4] TI DA8xx/OMAPL13x/AM17xx/AM18xx/C66x UART

Started byDavid Lechner <david@lechnology.com>
First post2017-01-04 21:40 +0100
Last post2017-01-05 18:20 +0100
Articles 5 — 3 participants

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  [PATCH v2 0/4] TI DA8xx/OMAPL13x/AM17xx/AM18xx/C66x UART David Lechner <david@lechnology.com> - 2017-01-04 21:40 +0100
    [PATCH v2 4/4] ARM: dts: keystone: Add "ti,da830-uart" compatible string David Lechner <david@lechnology.com> - 2017-01-04 21:40 +0100
      Re: [PATCH v2 4/4] ARM: dts: keystone: Add "ti,da830-uart" compatible  string Santosh Shilimkar <santosh.shilimkar@oracle.com> - 2017-01-04 23:10 +0100
        Re: [PATCH v2 4/4] ARM: dts: keystone: Add "ti,da830-uart" compatible  string Sekhar Nori <nsekhar@ti.com> - 2017-01-05 10:10 +0100
          Re: [PATCH v2 4/4] ARM: dts: keystone: Add "ti,da830-uart" compatible  string Santosh Shilimkar <santosh.shilimkar@oracle.com> - 2017-01-05 18:20 +0100

#1551248 — [PATCH v2 0/4] TI DA8xx/OMAPL13x/AM17xx/AM18xx/C66x UART

FromDavid Lechner <david@lechnology.com>
Date2017-01-04 21:40 +0100
Subject[PATCH v2 0/4] TI DA8xx/OMAPL13x/AM17xx/AM18xx/C66x UART
Message-ID<sW0vL-1fa-7@gated-at.bofh.it>
This series adds a new UART port type for TI DA8xx/OMAPL13x/AM17xx/AM18xx/C66x
UART. This SoCs have a non-standard register for UART power management that
needs special handling in the UART driver.

v2 changes:
* Added references to C66x SoC in various places, which I assume is an OK
  shorthand for TI Keystone processors.
* New patch for Keystone device tree. This is untested as I don't have any
  Keystone boards.


David Lechner (4):
  doc: DT: Add ti,da830-uart to serial/8250 bindings
  serial: 8250: Add new port type for TI
    DA8xx/OMAPL13x/AM17xx/AM18xx/C66x
  ARM: da850: Add ti,da830-uart compatible for serial ports
  ARM: dts: keystone: Add "ti,da830-uart" compatible string

 Documentation/devicetree/bindings/serial/8250.txt |  1 +
 arch/arm/boot/dts/da850.dtsi                      |  9 ++++++---
 arch/arm/boot/dts/keystone-k2g.dtsi               |  2 +-
 arch/arm/boot/dts/keystone-k2l.dtsi               |  4 ++--
 arch/arm/boot/dts/keystone.dtsi                   |  4 ++--
 drivers/tty/serial/8250/8250_of.c                 |  1 +
 drivers/tty/serial/8250/8250_port.c               | 22 ++++++++++++++++++++++
 include/uapi/linux/serial_core.h                  |  3 ++-
 include/uapi/linux/serial_reg.h                   |  8 ++++++++
 9 files changed, 45 insertions(+), 9 deletions(-)

-- 
2.7.4

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#1551249 — [PATCH v2 4/4] ARM: dts: keystone: Add "ti,da830-uart" compatible string

FromDavid Lechner <david@lechnology.com>
Date2017-01-04 21:40 +0100
Subject[PATCH v2 4/4] ARM: dts: keystone: Add "ti,da830-uart" compatible string
Message-ID<sW0vM-1fa-21@gated-at.bofh.it>
In reply to#1551248
The TI Keystone SoCs have extra UART registers beyond the standard 8250
registers, so we need a new compatible string to indicate this. Also, at
least one of these registers uses the full 32 bits, so we need to specify
reg-io-width in addition to reg-shift.

"ns16550a" is left in the compatible specification since it does work as
long as the bootloader configures the SoC UART power management registers.

Signed-off-by: David Lechner <david@lechnology.com>
---

v2 changes:
* This is a new patch in v2


 arch/arm/boot/dts/keystone-k2g.dtsi | 2 +-
 arch/arm/boot/dts/keystone-k2l.dtsi | 4 ++--
 arch/arm/boot/dts/keystone.dtsi     | 4 ++--
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi b/arch/arm/boot/dts/keystone-k2g.dtsi
index 63c7cf0c..7d7b9a8 100644
--- a/arch/arm/boot/dts/keystone-k2g.dtsi
+++ b/arch/arm/boot/dts/keystone-k2g.dtsi
@@ -90,7 +90,7 @@
 		};
 
 		uart0: serial@02530c00 {
-			compatible = "ns16550a";
+			compatible = "ti,da830-uart", "ns16550a";
 			current-speed = <115200>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
diff --git a/arch/arm/boot/dts/keystone-k2l.dtsi b/arch/arm/boot/dts/keystone-k2l.dtsi
index 0c5e74e..e91633f 100644
--- a/arch/arm/boot/dts/keystone-k2l.dtsi
+++ b/arch/arm/boot/dts/keystone-k2l.dtsi
@@ -35,7 +35,7 @@
 		/include/ "keystone-k2l-clocks.dtsi"
 
 		uart2: serial@02348400 {
-			compatible = "ns16550a";
+			compatible = "ti,da830-uart", "ns16550a";
 			current-speed = <115200>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
@@ -45,7 +45,7 @@
 		};
 
 		uart3:	serial@02348800 {
-			compatible = "ns16550a";
+			compatible = "ti,da830-uart", "ns16550a";
 			current-speed = <115200>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index 02708ba..9152610 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -98,7 +98,7 @@
 		/include/ "keystone-clocks.dtsi"
 
 		uart0: serial@02530c00 {
-			compatible = "ns16550a";
+			compatible = "ti,da830-uart", "ns16550a";
 			current-speed = <115200>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
@@ -108,7 +108,7 @@
 		};
 
 		uart1:	serial@02531000 {
-			compatible = "ns16550a";
+			compatible = "ti,da830-uart", "ns16550a";
 			current-speed = <115200>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
-- 
2.7.4

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#1551439 — Re: [PATCH v2 4/4] ARM: dts: keystone: Add "ti,da830-uart" compatible string

FromSantosh Shilimkar <santosh.shilimkar@oracle.com>
Date2017-01-04 23:10 +0100
SubjectRe: [PATCH v2 4/4] ARM: dts: keystone: Add "ti,da830-uart" compatible string
Message-ID<sW1US-2ik-41@gated-at.bofh.it>
In reply to#1551249
On 1/4/2017 12:30 PM, David Lechner wrote:
> The TI Keystone SoCs have extra UART registers beyond the standard 8250
> registers, so we need a new compatible string to indicate this. Also, at
> least one of these registers uses the full 32 bits, so we need to specify
> reg-io-width in addition to reg-shift.
>
> "ns16550a" is left in the compatible specification since it does work as
> long as the bootloader configures the SoC UART power management registers.
>
NAK!!
We can't break the booting boards with existing boot loaders.
I suggest you to first get the driver updated to take care of
the UART PM register and then enable the support for it.

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#1551785 — Re: [PATCH v2 4/4] ARM: dts: keystone: Add "ti,da830-uart" compatible string

FromSekhar Nori <nsekhar@ti.com>
Date2017-01-05 10:10 +0100
SubjectRe: [PATCH v2 4/4] ARM: dts: keystone: Add "ti,da830-uart" compatible string
Message-ID<sWcdA-Is-43@gated-at.bofh.it>
In reply to#1551439
Hi Santosh,

On Thursday 05 January 2017 03:30 AM, Santosh Shilimkar wrote:
> On 1/4/2017 12:30 PM, David Lechner wrote:
>> The TI Keystone SoCs have extra UART registers beyond the standard 8250
>> registers, so we need a new compatible string to indicate this. Also, at
>> least one of these registers uses the full 32 bits, so we need to specify
>> reg-io-width in addition to reg-shift.
>>
>> "ns16550a" is left in the compatible specification since it does work as
>> long as the bootloader configures the SoC UART power management
>> registers.
>>
> NAK!!
> We can't break the booting boards with existing boot loaders.

Sorry, but it not clear to me how this breaks booting with older
bootloaders? If older DTB is ROM'ed, it will continue to work because of
match with ns16550a.

I just verified boot on K2E with these patches applied and using 2016.05
based U-Boot from a TI release.

http://pastebin.ubuntu.com/23744719/

> I suggest you to first get the driver updated to take care of
> the UART PM register and then enable the support for it.

Isn't that what patch 2/4 is doing?

Thanks,
Sekhar

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#1552140 — Re: [PATCH v2 4/4] ARM: dts: keystone: Add "ti,da830-uart" compatible string

FromSantosh Shilimkar <santosh.shilimkar@oracle.com>
Date2017-01-05 18:20 +0100
SubjectRe: [PATCH v2 4/4] ARM: dts: keystone: Add "ti,da830-uart" compatible string
Message-ID<sWjRM-5ZY-45@gated-at.bofh.it>
In reply to#1551785
On 1/5/2017 1:04 AM, Sekhar Nori wrote:
> Hi Santosh,
>
> On Thursday 05 January 2017 03:30 AM, Santosh Shilimkar wrote:
>> On 1/4/2017 12:30 PM, David Lechner wrote:
>>> The TI Keystone SoCs have extra UART registers beyond the standard 8250
>>> registers, so we need a new compatible string to indicate this. Also, at
>>> least one of these registers uses the full 32 bits, so we need to specify
>>> reg-io-width in addition to reg-shift.
>>>
>>> "ns16550a" is left in the compatible specification since it does work as
>>> long as the bootloader configures the SoC UART power management
>>> registers.
>>>
>> NAK!!
>> We can't break the booting boards with existing boot loaders.
>
> Sorry, but it not clear to me how this breaks booting with older
> bootloaders? If older DTB is ROM'ed, it will continue to work because of
> match with ns16550a.
>
> I just verified boot on K2E with these patches applied and using 2016.05
> based U-Boot from a TI release.
>
> http://pastebin.ubuntu.com/23744719/
>
Thanks for test. As long as it doesn't break the boot, am fine
with it.

>> I suggest you to first get the driver updated to take care of
>> the UART PM register and then enable the support for it.
>
> Isn't that what patch 2/4 is doing?
>
I see that now. Thanks for clarifying.

Serial patch needs to go via Greg's tree. I will pick up the
DTS bits.

Regards,
Santosh

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