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[PATCH v3 01/10] arm64: MAINTAINERS: hisi: Add hisilicon SoC PMU support

Started byAnurup M <anurupvasu@gmail.com>
First post2017-01-02 07:50 +0100
Last post2017-01-02 07:50 +0100
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  [PATCH v3 01/10] arm64: MAINTAINERS: hisi: Add hisilicon SoC PMU support Anurup M <anurupvasu@gmail.com> - 2017-01-02 07:50 +0100

#1548964 — [PATCH v3 01/10] arm64: MAINTAINERS: hisi: Add hisilicon SoC PMU support

FromAnurup M <anurupvasu@gmail.com>
Date2017-01-02 07:50 +0100
Subject[PATCH v3 01/10] arm64: MAINTAINERS: hisi: Add hisilicon SoC PMU support
Message-ID<sV4Bs-2ML-13@gated-at.bofh.it>
Add support for Hisilicon SoC hardware event counters
for HIP05/06/07 chip versions.

Signed-off-by: Anurup M <anurup.m@huawei.com>
---
 MAINTAINERS | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index b224caa..fca339e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5725,6 +5725,15 @@ S:	Maintained
 F:	drivers/net/ethernet/hisilicon/
 F:	Documentation/devicetree/bindings/net/hisilicon*.txt
 
+HISILICON SOC PMU
+M:	Anurup M <anurup.m@huawei.com>
+W:	http://www.hisilicon.com
+S:	Supported
+F:	drivers/perf/hisilicon/
+F:	Documentation/perf/hisi-pmu.txt
+F:	Documentation/devicetree/bindings/arm/hisilicon/pmu.txt
+F:	Documentation/devicetree/bindings/arm/hisilicon/djtag.txt
+
 HISILICON ROCE DRIVER
 M:	Lijun Ou <oulijun@huawei.com>
 M:	Wei Hu(Xavier) <xavier.huwei@huawei.com>
-- 
2.1.4

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