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[PATCH V5] i2c: designware: fix wrong Tx/Rx FIFO for ACPI

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  [PATCH V5] i2c: designware: fix wrong Tx/Rx FIFO for ACPI Tin Huynh <tnhuynh@apm.com> - 2016-12-14 10:30 +0100
    Re: [PATCH V5] i2c: designware: fix wrong Tx/Rx FIFO for ACPI Jarkko Nikula <jarkko.nikula@linux.intel.com> - 2016-12-14 12:30 +0100
    Re: [PATCH V5] i2c: designware: fix wrong Tx/Rx FIFO for ACPI Mika Westerberg <mika.westerberg@linux.intel.com> - 2016-12-14 13:00 +0100
    Re: [PATCH V5] i2c: designware: fix wrong Tx/Rx FIFO for ACPI Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-12-15 19:10 +0100
    Re: [PATCH V5] i2c: designware: fix wrong Tx/Rx FIFO for ACPI Wolfram Sang <wsa@the-dreams.de> - 2016-12-17 19:40 +0100

#1541788 — [PATCH V5] i2c: designware: fix wrong Tx/Rx FIFO for ACPI

ACPI always sets Tx/Rx FIFO to 32. This configuration will
cause problem if the IP core supports a FIFO size of less than 32.
The driver should read the FIFO size from the IP and select the smaller
one of the two.

Signed-off-by: Tin Huynh <tnhuynh@apm.com>

---
 drivers/i2c/busses/i2c-designware-platdrv.c |   31 ++++++++++++++++++++------
 1 files changed, 24 insertions(+), 7 deletions(-)

Change from V4:
 -Change else condition and add some comments to clarify new approach.

Change from V3:
 -Use uppercase of FIFO instead of lowercase.
 -Correct else condition when IP core return 0 of FIFO.

Change from V2:
 -Add a helper function to set FIFO size.

Change from V1:
 -Revert the default 32 for FIFO, read parameter from IP core
 and pick the smaller one of the two.
 -Correct the title to describe new approach.

diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
index 0b42a12..682adc3 100644
--- a/drivers/i2c/busses/i2c-designware-platdrv.c
+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
@@ -150,6 +150,29 @@ static int i2c_dw_plat_prepare_clk(struct dw_i2c_dev *i_dev, bool prepare)
 	return 0;
 }
 
+static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev, int id)
+{
+	u32 param, tx_fifo_depth, rx_fifo_depth;
+
+	/*
+	 * Try to detect the FIFO depth if not set by interface driver,
+	 * the depth could be from 2 to 256 from HW spec.
+	 */
+	param = i2c_dw_read_comp_param(dev);
+	tx_fifo_depth = ((param >> 16) & 0xff) + 1;
+	rx_fifo_depth = ((param >> 8)  & 0xff) + 1;
+	if (!dev->tx_fifo_depth) {
+		dev->tx_fifo_depth = tx_fifo_depth;
+		dev->rx_fifo_depth = rx_fifo_depth;
+		dev->adapter.nr = id;
+	} else if (tx_fifo_depth >= 2) {
+		dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
+				tx_fifo_depth);
+		dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
+				rx_fifo_depth);
+	}
+}
+
 static int dw_i2c_plat_probe(struct platform_device *pdev)
 {
 	struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
@@ -246,13 +269,7 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
 				1000000);
 	}
 
-	if (!dev->tx_fifo_depth) {
-		u32 param1 = i2c_dw_read_comp_param(dev);
-
-		dev->tx_fifo_depth = ((param1 >> 16) & 0xff) + 1;
-		dev->rx_fifo_depth = ((param1 >> 8)  & 0xff) + 1;
-		dev->adapter.nr = pdev->id;
-	}
+	dw_i2c_set_fifo_size(dev, pdev->id);
 
 	adap = &dev->adapter;
 	adap->owner = THIS_MODULE;
-- 
1.7.1

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#1541859

On 12/14/2016 11:23 AM, Tin Huynh wrote:
> ACPI always sets Tx/Rx FIFO to 32. This configuration will
> cause problem if the IP core supports a FIFO size of less than 32.
> The driver should read the FIFO size from the IP and select the smaller
> one of the two.
>
> Signed-off-by: Tin Huynh <tnhuynh@apm.com>
>
> ---
>  drivers/i2c/busses/i2c-designware-platdrv.c |   31 ++++++++++++++++++++------
>  1 files changed, 24 insertions(+), 7 deletions(-)

Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>

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#1541868

On Wed, Dec 14, 2016 at 04:23:58PM +0700, Tin Huynh wrote:
> ACPI always sets Tx/Rx FIFO to 32. This configuration will
> cause problem if the IP core supports a FIFO size of less than 32.
> The driver should read the FIFO size from the IP and select the smaller
> one of the two.
> 
> Signed-off-by: Tin Huynh <tnhuynh@apm.com>

Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>

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#1542953

On Wed, 2016-12-14 at 16:23 +0700, Tin Huynh wrote:
> ACPI always sets Tx/Rx FIFO to 32. This configuration will
> cause problem if the IP core supports a FIFO size of less than 32.
> The driver should read the FIFO size from the IP and select the
> smaller
> one of the two.
> 
> Signed-off-by: Tin Huynh <tnhuynh@apm.com>
> 

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

> ---
>  drivers/i2c/busses/i2c-designware-platdrv.c |   31
> ++++++++++++++++++++------
>  1 files changed, 24 insertions(+), 7 deletions(-)
> 
> Change from V4:
>  -Change else condition and add some comments to clarify new approach.
> 
> Change from V3:
>  -Use uppercase of FIFO instead of lowercase.
>  -Correct else condition when IP core return 0 of FIFO.
> 
> Change from V2:
>  -Add a helper function to set FIFO size.
> 
> Change from V1:
>  -Revert the default 32 for FIFO, read parameter from IP core
>  and pick the smaller one of the two.
>  -Correct the title to describe new approach.
> 
> diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c
> b/drivers/i2c/busses/i2c-designware-platdrv.c
> index 0b42a12..682adc3 100644
> --- a/drivers/i2c/busses/i2c-designware-platdrv.c
> +++ b/drivers/i2c/busses/i2c-designware-platdrv.c
> @@ -150,6 +150,29 @@ static int i2c_dw_plat_prepare_clk(struct
> dw_i2c_dev *i_dev, bool prepare)
>  	return 0;
>  }
>  
> +static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev, int id)
> +{
> +	u32 param, tx_fifo_depth, rx_fifo_depth;
> +
> +	/*
> +	 * Try to detect the FIFO depth if not set by interface
> driver,
> +	 * the depth could be from 2 to 256 from HW spec.
> +	 */
> +	param = i2c_dw_read_comp_param(dev);
> +	tx_fifo_depth = ((param >> 16) & 0xff) + 1;
> +	rx_fifo_depth = ((param >> 8)  & 0xff) + 1;
> +	if (!dev->tx_fifo_depth) {
> +		dev->tx_fifo_depth = tx_fifo_depth;
> +		dev->rx_fifo_depth = rx_fifo_depth;
> +		dev->adapter.nr = id;
> +	} else if (tx_fifo_depth >= 2) {
> +		dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
> +				tx_fifo_depth);
> +		dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
> +				rx_fifo_depth);
> +	}
> +}
> +
>  static int dw_i2c_plat_probe(struct platform_device *pdev)
>  {
>  	struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev-
> >dev);
> @@ -246,13 +269,7 @@ static int dw_i2c_plat_probe(struct
> platform_device *pdev)
>  				1000000);
>  	}
>  
> -	if (!dev->tx_fifo_depth) {
> -		u32 param1 = i2c_dw_read_comp_param(dev);
> -
> -		dev->tx_fifo_depth = ((param1 >> 16) & 0xff) + 1;
> -		dev->rx_fifo_depth = ((param1 >> 8)  & 0xff) + 1;
> -		dev->adapter.nr = pdev->id;
> -	}
> +	dw_i2c_set_fifo_size(dev, pdev->id);
>  
>  	adap = &dev->adapter;
>  	adap->owner = THIS_MODULE;

-- 
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy

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#1544028

[Multipart message — attachments visible in raw view] — view raw

On Wed, Dec 14, 2016 at 04:23:58PM +0700, Tin Huynh wrote:
> ACPI always sets Tx/Rx FIFO to 32. This configuration will
> cause problem if the IP core supports a FIFO size of less than 32.
> The driver should read the FIFO size from the IP and select the smaller
> one of the two.
> 
> Signed-off-by: Tin Huynh <tnhuynh@apm.com>
> 

Applied to for-current, thanks!

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