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[RFC 0/2] powerpc: Perf events on PPC 8xx

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  [RFC 0/2] powerpc: Perf events on PPC 8xx Christophe Leroy <christophe.leroy@c-s.fr> - 2016-12-13 19:20 +0100

#1541364 — [RFC 0/2] powerpc: Perf events on PPC 8xx

This patch set is a first try of implementing some additional
perf events on PPC 8xx.

The first patch of the serie fixes missing MSR RI setting at end of exceptions
The second patch implements the perf counters.

The 8xx has no PMU, however some events can be emulated by other means.

This patch implements the following 4 events:
  cpu-cycles OR cycles                               [Hardware event]
  instructions                                       [Hardware event]
  dTLB-load-misses                                   [Hardware cache event]
  iTLB-load-misses                                   [Hardware cache event]

I have no real clue on how should work perf events, hence the RFC status of
this serie. I have tested it with 'perf stat' and it seems to provide
relevant information.

This serie applies of top of the two following patches:
* powerpc/32: Remove FIX_SRR1
* powerpc/8xx: Implement hw_breakpoint

Christophe Leroy (2):
  powerpc/32: Unset MSR RI in exception epilogs
  powerpc/8xx: Perf events on PPC 8xx

 arch/powerpc/include/asm/ppc_asm.h     |   6 ++
 arch/powerpc/include/asm/reg.h         |   2 +
 arch/powerpc/include/asm/reg_8xx.h     |   4 +
 arch/powerpc/kernel/entry_32.S         |   5 +
 arch/powerpc/kernel/head_8xx.S         |  45 +++++++-
 arch/powerpc/perf/8xx-pmu.c            | 181 +++++++++++++++++++++++++++++++++
 arch/powerpc/perf/Makefile             |   2 +
 arch/powerpc/platforms/Kconfig.cputype |   7 ++
 8 files changed, 249 insertions(+), 3 deletions(-)
 create mode 100644 arch/powerpc/perf/8xx-pmu.c

-- 
2.10.1

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