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Groups > linux.kernel > #1527441 > unrolled thread

[PATCH V6 0/2] Add ACPI support for HiSilicon SoCs Host Controllers

Started byDongdong Liu <liudongdong3@huawei.com>
First post2016-11-22 13:00 +0100
Last post2016-11-23 15:10 +0100
Articles 6 — 4 participants

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Contents

  [PATCH V6 0/2] Add ACPI support for HiSilicon SoCs Host Controllers Dongdong Liu <liudongdong3@huawei.com> - 2016-11-22 13:00 +0100
    [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for HiSilicon SoCs Host Controllers Dongdong Liu <liudongdong3@huawei.com> - 2016-11-22 13:00 +0100
      Re: [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for HiSilicon  SoCs Host Controllers Tomasz Nowicki <tn@semihalf.com> - 2016-11-22 15:00 +0100
        RE: [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for HiSilicon  SoCs Host Controllers Gabriele Paoloni <gabriele.paoloni@huawei.com> - 2016-11-22 16:10 +0100
          Re: [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for HiSilicon  SoCs Host Controllers Graeme Gregory <gg@slimlogic.co.uk> - 2016-11-23 10:50 +0100
            RE: [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for HiSilicon  SoCs Host Controllers Gabriele Paoloni <gabriele.paoloni@huawei.com> - 2016-11-23 15:10 +0100

#1527441 — [PATCH V6 0/2] Add ACPI support for HiSilicon SoCs Host Controllers

FromDongdong Liu <liudongdong3@huawei.com>
Date2016-11-22 13:00 +0100
Subject[PATCH V6 0/2] Add ACPI support for HiSilicon SoCs Host Controllers
Message-ID<sGhU2-6Ds-3@gated-at.bofh.it>
This patchset adds ACPI support for the HiSilicon Hip05/Hip06/Hip07 SoC
PCIe controllers.
The two patches respectively:
        - provides the common function acpi_get_rc_resources() for ARM64
          platform.
        - adds the HiSilicon ACPI specific quirks.

This patchset is based on branch pci/ecam-v6
It can be found here:
https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git(pci/ecam-v6)

This patchset has been tested on HiSilicon D03 board.
The dmesg log, /proc/iomem, and ACPI table information can be found:
https://bugzilla.kernel.org/show_bug.cgi?id=187961

v5 -> v6:
- change the config option to CONFIG_PCI_ECAM_QUIRKS.
- fix some commets about acpi_get_rc_resources().

v4 -> v5:
- obtain rc base addresses from PNP0C02 at the root of the ACPI
  namespace (under \_SB) instead of from sub-device under the RC.
- merge the rewrited get rc resources code by Tomasz.
- delete unused code. 
- drop the PATCH V4 1/2, will rework late as a separate patch.

v3 -> v4:
- rebase on pci/ecam-v6.
- delete the unnecessary link_up check code. 

v2 -> v3:
- rebase against 4.9-rc1 and add Tomasz quirks V6 pathcset. 
- obtain rc base addresses from PNP0C02 as subdevice of PNP0A03 instead of
  hardcode the addresses.
- modify hisi_pcie_acpi_rd_conf/hisi_pcie_acpi_wr_conf() according to
  Arnd comments.

v1 -> v2:
- rebase against Tomasz RFC V5 quirk mechanism
- add ACPI support for the HiSilicon Hip07 SoC PCIe controllers.

Dongdong Liu (2):
  PCI/ACPI: Provide acpi_get_rc_resources() for ARM64 platform
  PCI/ACPI: hisi: Add ACPI support for HiSilicon SoCs Host Controllers

 MAINTAINERS                       |   1 +
 drivers/acpi/pci_mcfg.c           |  13 +++++
 drivers/pci/host/Kconfig          |   7 +++
 drivers/pci/host/Makefile         |   1 +
 drivers/pci/host/pcie-hisi-acpi.c | 119 ++++++++++++++++++++++++++++++++++++++
 drivers/pci/pci-acpi.c            |  69 ++++++++++++++++++++++
 drivers/pci/pci.h                 |   4 ++
 include/linux/pci-ecam.h          |   5 ++
 8 files changed, 219 insertions(+)
 create mode 100644 drivers/pci/host/pcie-hisi-acpi.c

-- 
1.9.1

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#1527445 — [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for HiSilicon SoCs Host Controllers

FromDongdong Liu <liudongdong3@huawei.com>
Date2016-11-22 13:00 +0100
Subject[PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for HiSilicon SoCs Host Controllers
Message-ID<sGhU2-6Ds-21@gated-at.bofh.it>
In reply to#1527441
PCIe controller in Hip05/HIP06/HIP07 SoCs is not ECAM compliant.
It is non ECAM only for the RC bus config space;for any other bus
underneath the root bus we support ECAM access.
Add specific quirks for PCI config space accessors.This involves:
1. New initialization call hisi_pcie_init() to obtain rc base
addresses from PNP0C02 at the root of the ACPI namespace (under \_SB).
2. New entry in common quirk array.

Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
---
 MAINTAINERS                       |   1 +
 drivers/acpi/pci_mcfg.c           |  13 +++++
 drivers/pci/host/Kconfig          |   7 +++
 drivers/pci/host/Makefile         |   1 +
 drivers/pci/host/pcie-hisi-acpi.c | 119 ++++++++++++++++++++++++++++++++++++++
 include/linux/pci-ecam.h          |   5 ++
 6 files changed, 146 insertions(+)
 create mode 100644 drivers/pci/host/pcie-hisi-acpi.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 1cd38a7..b224caa 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9358,6 +9358,7 @@ L:	linux-pci@vger.kernel.org
 S:	Maintained
 F:	Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
 F:	drivers/pci/host/pcie-hisi.c
+F:	drivers/pci/host/pcie-hisi-acpi.c
 
 PCIE DRIVER FOR ROCKCHIP
 M:	Shawn Lin <shawn.lin@rock-chips.com>
diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
index ac21db3..3297c5a 100644
--- a/drivers/acpi/pci_mcfg.c
+++ b/drivers/acpi/pci_mcfg.c
@@ -57,6 +57,19 @@ struct mcfg_fixup {
 	{ "QCOM  ", "QDF2432 ", 1, 5, MCFG_BUS_ANY, &pci_32b_ops },
 	{ "QCOM  ", "QDF2432 ", 1, 6, MCFG_BUS_ANY, &pci_32b_ops },
 	{ "QCOM  ", "QDF2432 ", 1, 7, MCFG_BUS_ANY, &pci_32b_ops },
+#ifdef CONFIG_PCI_ECAM_QUIRKS
+	#define PCI_ACPI_QUIRK_QUAD_DOM(table_id, seg, ops) \
+	{ "HISI  ", table_id, 0, seg + 0, MCFG_BUS_ANY, ops }, \
+	{ "HISI  ", table_id, 0, seg + 1, MCFG_BUS_ANY, ops }, \
+	{ "HISI  ", table_id, 0, seg + 2, MCFG_BUS_ANY, ops }, \
+	{ "HISI  ", table_id, 0, seg + 3, MCFG_BUS_ANY, ops }
+	PCI_ACPI_QUIRK_QUAD_DOM("HIP05   ", 0, &hisi_pcie_ops),
+	PCI_ACPI_QUIRK_QUAD_DOM("HIP06   ", 0, &hisi_pcie_ops),
+	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 0, &hisi_pcie_ops),
+	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 4, &hisi_pcie_ops),
+	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 8, &hisi_pcie_ops),
+	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 12, &hisi_pcie_ops),
+#endif
 };
 
 static char mcfg_oem_id[ACPI_OEM_ID_SIZE];
diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
index ae98644..1fbade5 100644
--- a/drivers/pci/host/Kconfig
+++ b/drivers/pci/host/Kconfig
@@ -301,4 +301,11 @@ config VMD
 	  To compile this driver as a module, choose M here: the
 	  module will be called vmd.
 
+config PCI_ECAM_QUIRKS
+	bool "PCI ECAM quirks for ARM64 platform"
+	depends on PCI_ECAM && ARM64 && ACPI
+	help
+	  Say y here to enable your platform-specific config access that
+	  is not ECAM compliant.
+
 endmenu
diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile
index 084cb49..15435b4 100644
--- a/drivers/pci/host/Makefile
+++ b/drivers/pci/host/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_PCIE_IPROC_BCMA) += pcie-iproc-bcma.o
 obj-$(CONFIG_PCIE_ALTERA) += pcie-altera.o
 obj-$(CONFIG_PCIE_ALTERA_MSI) += pcie-altera-msi.o
 obj-$(CONFIG_PCI_HISI) += pcie-hisi.o
+obj-$(CONFIG_PCI_ECAM_QUIRKS) += pcie-hisi-acpi.o
 obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o
 obj-$(CONFIG_PCI_HOST_THUNDER_ECAM) += pci-thunder-ecam.o
 obj-$(CONFIG_PCI_HOST_THUNDER_PEM) += pci-thunder-pem.o
diff --git a/drivers/pci/host/pcie-hisi-acpi.c b/drivers/pci/host/pcie-hisi-acpi.c
new file mode 100644
index 0000000..8bb43b4
--- /dev/null
+++ b/drivers/pci/host/pcie-hisi-acpi.c
@@ -0,0 +1,119 @@
+/*
+ * PCIe host controller driver for HiSilicon HipXX SoCs
+ *
+ * Copyright (C) 2016 HiSilicon Co., Ltd. http://www.hisilicon.com
+ *
+ * Author: Dongdong Liu <liudongdong3@huawei.com>
+ *         Gabriele Paoloni <gabriele.paoloni@huawei.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/pci.h>
+#include <linux/pci-acpi.h>
+#include <linux/pci-ecam.h>
+#include "../pci.h"
+
+static int hisi_pcie_acpi_rd_conf(struct pci_bus *bus, u32 devfn, int where,
+				  int size, u32 *val)
+{
+	struct pci_config_window *cfg = bus->sysdata;
+	int dev = PCI_SLOT(devfn);
+
+	if (bus->number == cfg->busr.start) {
+		/* access only one slot on each root port */
+		if (dev > 0)
+			return PCIBIOS_DEVICE_NOT_FOUND;
+		else
+			return pci_generic_config_read32(bus, devfn, where,
+							 size, val);
+	}
+
+	return pci_generic_config_read(bus, devfn, where, size, val);
+}
+
+static int hisi_pcie_acpi_wr_conf(struct pci_bus *bus, u32 devfn,
+				  int where, int size, u32 val)
+{
+	struct pci_config_window *cfg = bus->sysdata;
+	int dev = PCI_SLOT(devfn);
+
+	if (bus->number == cfg->busr.start) {
+		/* access only one slot on each root port */
+		if (dev > 0)
+			return PCIBIOS_DEVICE_NOT_FOUND;
+		else
+			return pci_generic_config_write32(bus, devfn, where,
+							  size, val);
+	}
+
+	return pci_generic_config_write(bus, devfn, where, size, val);
+}
+
+static void __iomem *hisi_pcie_map_bus(struct pci_bus *bus, unsigned int devfn,
+				       int where)
+{
+	struct pci_config_window *cfg = bus->sysdata;
+	void __iomem *reg_base = cfg->priv;
+
+	if (bus->number == cfg->busr.start)
+		return reg_base + where;
+	else
+		return pci_ecam_map_bus(bus, devfn, where);
+}
+
+/*
+ * Retrieve RC base and size from PNP0C02 at the root of the ACPI namespace
+ * (under \_SB).
+ * Scope(_SB)
+ * {
+ *   Device (PCI0)
+ *   {
+ *     Name(_HID, "PNP0A08")
+ *     Name(_CID, "PNP0A03")
+ *     Name(_SEG, 0)
+ *     ......
+ *   }
+ *   Device (RES0)
+ *   {
+ *     Name(_HID, "HISI0081")
+ *     Name(_CID, "PNP0C02")
+ *     Name(_UID, 0x0)
+ *     Name(_CRS, ResourceTemplate (){
+ *       Memory32Fixed (ReadWrite, 0xa0090000, 0x10000)
+ *     })
+ *   }
+ *   ......
+ * }
+ */
+static int hisi_pcie_init(struct pci_config_window *cfg)
+{
+	struct acpi_device *adev = to_acpi_device(cfg->parent);
+	struct acpi_pci_root *root = acpi_driver_data(adev);
+	void __iomem *reg_base;
+	struct resource *res;
+
+	res = acpi_get_rc_resources("HISI0081", root->segment);
+	if (!res) {
+		dev_err(&adev->dev, "can't get rc base address");
+		return -ENOMEM;
+	}
+
+	reg_base = devm_ioremap(&adev->dev, res->start, resource_size(res));
+	if (!reg_base)
+		return -ENOMEM;
+
+	cfg->priv = reg_base;
+	return 0;
+}
+
+struct pci_ecam_ops hisi_pcie_ops = {
+	.bus_shift    = 20,
+	.init         =  hisi_pcie_init,
+	.pci_ops      = {
+		.map_bus    = hisi_pcie_map_bus,
+		.read       = hisi_pcie_acpi_rd_conf,
+		.write      = hisi_pcie_acpi_wr_conf,
+	}
+};
diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h
index f5740b7..40fab66 100644
--- a/include/linux/pci-ecam.h
+++ b/include/linux/pci-ecam.h
@@ -67,4 +67,9 @@ void __iomem *pci_ecam_map_bus(struct pci_bus *bus, unsigned int devfn,
 int pci_host_common_probe(struct platform_device *pdev,
 			  struct pci_ecam_ops *ops);
 #endif
+
+#ifdef CONFIG_PCI_ECAM_QUIRKS
+extern struct pci_ecam_ops hisi_pcie_ops;
+#endif
+
 #endif
-- 
1.9.1

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#1527517 — Re: [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for HiSilicon SoCs Host Controllers

FromTomasz Nowicki <tn@semihalf.com>
Date2016-11-22 15:00 +0100
SubjectRe: [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for HiSilicon SoCs Host Controllers
Message-ID<sGjM5-7OO-1@gated-at.bofh.it>
In reply to#1527445
On 22.11.2016 13:08, Dongdong Liu wrote:
> PCIe controller in Hip05/HIP06/HIP07 SoCs is not ECAM compliant.
> It is non ECAM only for the RC bus config space;for any other bus
> underneath the root bus we support ECAM access.
> Add specific quirks for PCI config space accessors.This involves:
> 1. New initialization call hisi_pcie_init() to obtain rc base
> addresses from PNP0C02 at the root of the ACPI namespace (under \_SB).
> 2. New entry in common quirk array.
>
> Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
> Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
> ---
>  MAINTAINERS                       |   1 +
>  drivers/acpi/pci_mcfg.c           |  13 +++++
>  drivers/pci/host/Kconfig          |   7 +++
>  drivers/pci/host/Makefile         |   1 +
>  drivers/pci/host/pcie-hisi-acpi.c | 119 ++++++++++++++++++++++++++++++++++++++
>  include/linux/pci-ecam.h          |   5 ++
>  6 files changed, 146 insertions(+)
>  create mode 100644 drivers/pci/host/pcie-hisi-acpi.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 1cd38a7..b224caa 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -9358,6 +9358,7 @@ L:	linux-pci@vger.kernel.org
>  S:	Maintained
>  F:	Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
>  F:	drivers/pci/host/pcie-hisi.c
> +F:	drivers/pci/host/pcie-hisi-acpi.c
>
>  PCIE DRIVER FOR ROCKCHIP
>  M:	Shawn Lin <shawn.lin@rock-chips.com>
> diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
> index ac21db3..3297c5a 100644
> --- a/drivers/acpi/pci_mcfg.c
> +++ b/drivers/acpi/pci_mcfg.c
> @@ -57,6 +57,19 @@ struct mcfg_fixup {
>  	{ "QCOM  ", "QDF2432 ", 1, 5, MCFG_BUS_ANY, &pci_32b_ops },
>  	{ "QCOM  ", "QDF2432 ", 1, 6, MCFG_BUS_ANY, &pci_32b_ops },
>  	{ "QCOM  ", "QDF2432 ", 1, 7, MCFG_BUS_ANY, &pci_32b_ops },
> +#ifdef CONFIG_PCI_ECAM_QUIRKS
> +	#define PCI_ACPI_QUIRK_QUAD_DOM(table_id, seg, ops) \
> +	{ "HISI  ", table_id, 0, seg + 0, MCFG_BUS_ANY, ops }, \
> +	{ "HISI  ", table_id, 0, seg + 1, MCFG_BUS_ANY, ops }, \
> +	{ "HISI  ", table_id, 0, seg + 2, MCFG_BUS_ANY, ops }, \
> +	{ "HISI  ", table_id, 0, seg + 3, MCFG_BUS_ANY, ops }
> +	PCI_ACPI_QUIRK_QUAD_DOM("HIP05   ", 0, &hisi_pcie_ops),
> +	PCI_ACPI_QUIRK_QUAD_DOM("HIP06   ", 0, &hisi_pcie_ops),
> +	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 0, &hisi_pcie_ops),
> +	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 4, &hisi_pcie_ops),
> +	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 8, &hisi_pcie_ops),
> +	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 12, &hisi_pcie_ops),
> +#endif
>  };
>
>  static char mcfg_oem_id[ACPI_OEM_ID_SIZE];
> diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
> index ae98644..1fbade5 100644
> --- a/drivers/pci/host/Kconfig
> +++ b/drivers/pci/host/Kconfig
> @@ -301,4 +301,11 @@ config VMD
>  	  To compile this driver as a module, choose M here: the
>  	  module will be called vmd.
>
> +config PCI_ECAM_QUIRKS
> +	bool "PCI ECAM quirks for ARM64 platform"
> +	depends on PCI_ECAM && ARM64 && ACPI
> +	help
> +	  Say y here to enable your platform-specific config access that
> +	  is not ECAM compliant.
> +

ARM64 selects PCI_ECAM for ACPI anyway so we can skip it here.

How about selecting PCI_ECAM_QUIRKS from ARM64 Kconfig:

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 30398db..9743186 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -105,6 +105,7 @@ config ARM64
         select OF_EARLY_FLATTREE
         select OF_RESERVED_MEM
         select PCI_ECAM if ACPI
+       select PCI_ECAM_QUIRKS if ACPI
         select POWER_RESET
         select POWER_SUPPLY
         select SPARSE_IRQ

I agree with Bjorn, we should not have to turn on platform-specific 
config options for ARM64 & ACPI.

Thanks,
Tomasz

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#1527588 — RE: [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for HiSilicon SoCs Host Controllers

FromGabriele Paoloni <gabriele.paoloni@huawei.com>
Date2016-11-22 16:10 +0100
SubjectRE: [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for HiSilicon SoCs Host Controllers
Message-ID<sGkRR-lv-59@gated-at.bofh.it>
In reply to#1527517
Hi Tomasz

> -----Original Message-----
> From: Tomasz Nowicki [mailto:tn@semihalf.com]
> Sent: 22 November 2016 13:58
> To: liudongdong (C); helgaas@kernel.org; arnd@arndb.de;
> rafael@kernel.org; Lorenzo.Pieralisi@arm.com; Wangzhou (B);
> pratyush.anand@gmail.com
> Cc: linux-pci@vger.kernel.org; linux-acpi@vger.kernel.org; linux-
> kernel@vger.kernel.org; jcm@redhat.com; Gabriele Paoloni; Chenxin
> (Charles); hanjun.guo@linaro.org; Linuxarm
> Subject: Re: [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for
> HiSilicon SoCs Host Controllers
> 
> On 22.11.2016 13:08, Dongdong Liu wrote:
> > PCIe controller in Hip05/HIP06/HIP07 SoCs is not ECAM compliant.
> > It is non ECAM only for the RC bus config space;for any other bus
> > underneath the root bus we support ECAM access.
> > Add specific quirks for PCI config space accessors.This involves:
> > 1. New initialization call hisi_pcie_init() to obtain rc base
> > addresses from PNP0C02 at the root of the ACPI namespace (under
> \_SB).
> > 2. New entry in common quirk array.
> >
> > Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
> > Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
> > ---
> >  MAINTAINERS                       |   1 +
> >  drivers/acpi/pci_mcfg.c           |  13 +++++
> >  drivers/pci/host/Kconfig          |   7 +++
> >  drivers/pci/host/Makefile         |   1 +
> >  drivers/pci/host/pcie-hisi-acpi.c | 119
> ++++++++++++++++++++++++++++++++++++++
> >  include/linux/pci-ecam.h          |   5 ++
> >  6 files changed, 146 insertions(+)
> >  create mode 100644 drivers/pci/host/pcie-hisi-acpi.c
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 1cd38a7..b224caa 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -9358,6 +9358,7 @@ L:	linux-pci@vger.kernel.org
> >  S:	Maintained
> >  F:	Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
> >  F:	drivers/pci/host/pcie-hisi.c
> > +F:	drivers/pci/host/pcie-hisi-acpi.c
> >
> >  PCIE DRIVER FOR ROCKCHIP
> >  M:	Shawn Lin <shawn.lin@rock-chips.com>
> > diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
> > index ac21db3..3297c5a 100644
> > --- a/drivers/acpi/pci_mcfg.c
> > +++ b/drivers/acpi/pci_mcfg.c
> > @@ -57,6 +57,19 @@ struct mcfg_fixup {
> >  	{ "QCOM  ", "QDF2432 ", 1, 5, MCFG_BUS_ANY, &pci_32b_ops },
> >  	{ "QCOM  ", "QDF2432 ", 1, 6, MCFG_BUS_ANY, &pci_32b_ops },
> >  	{ "QCOM  ", "QDF2432 ", 1, 7, MCFG_BUS_ANY, &pci_32b_ops },
> > +#ifdef CONFIG_PCI_ECAM_QUIRKS
> > +	#define PCI_ACPI_QUIRK_QUAD_DOM(table_id, seg, ops) \
> > +	{ "HISI  ", table_id, 0, seg + 0, MCFG_BUS_ANY, ops }, \
> > +	{ "HISI  ", table_id, 0, seg + 1, MCFG_BUS_ANY, ops }, \
> > +	{ "HISI  ", table_id, 0, seg + 2, MCFG_BUS_ANY, ops }, \
> > +	{ "HISI  ", table_id, 0, seg + 3, MCFG_BUS_ANY, ops }
> > +	PCI_ACPI_QUIRK_QUAD_DOM("HIP05   ", 0, &hisi_pcie_ops),
> > +	PCI_ACPI_QUIRK_QUAD_DOM("HIP06   ", 0, &hisi_pcie_ops),
> > +	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 0, &hisi_pcie_ops),
> > +	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 4, &hisi_pcie_ops),
> > +	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 8, &hisi_pcie_ops),
> > +	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 12, &hisi_pcie_ops),
> > +#endif
> >  };
> >
> >  static char mcfg_oem_id[ACPI_OEM_ID_SIZE];
> > diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
> > index ae98644..1fbade5 100644
> > --- a/drivers/pci/host/Kconfig
> > +++ b/drivers/pci/host/Kconfig
> > @@ -301,4 +301,11 @@ config VMD
> >  	  To compile this driver as a module, choose M here: the
> >  	  module will be called vmd.
> >
> > +config PCI_ECAM_QUIRKS
> > +	bool "PCI ECAM quirks for ARM64 platform"
> > +	depends on PCI_ECAM && ARM64 && ACPI
> > +	help
> > +	  Say y here to enable your platform-specific config access that
> > +	  is not ECAM compliant.
> > +
> 
> ARM64 selects PCI_ECAM for ACPI anyway so we can skip it here.

Yes sure

> 
> How about selecting PCI_ECAM_QUIRKS from ARM64 Kconfig:

I don't think we should assume that ARM64 platforms should
support quirks by default...
i.e. from my perspective the quirk module should go in only
if strictly required by the platform you're working on.

Thoughts?

Thanks

Gab

> 
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 30398db..9743186 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -105,6 +105,7 @@ config ARM64
>          select OF_EARLY_FLATTREE
>          select OF_RESERVED_MEM
>          select PCI_ECAM if ACPI
> +       select PCI_ECAM_QUIRKS if ACPI
>          select POWER_RESET
>          select POWER_SUPPLY
>          select SPARSE_IRQ
> 
> I agree with Bjorn, we should not have to turn on platform-specific
> config options for ARM64 & ACPI.
> 
> Thanks,
> Tomasz

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#1528257 — Re: [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for HiSilicon SoCs Host Controllers

FromGraeme Gregory <gg@slimlogic.co.uk>
Date2016-11-23 10:50 +0100
SubjectRe: [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for HiSilicon SoCs Host Controllers
Message-ID<sGClH-36I-25@gated-at.bofh.it>
In reply to#1527588
On Tue, Nov 22, 2016 at 03:05:29PM +0000, Gabriele Paoloni wrote:
> Hi Tomasz
> 
> > -----Original Message-----
> > From: Tomasz Nowicki [mailto:tn@semihalf.com]
> > Sent: 22 November 2016 13:58
> > To: liudongdong (C); helgaas@kernel.org; arnd@arndb.de;
> > rafael@kernel.org; Lorenzo.Pieralisi@arm.com; Wangzhou (B);
> > pratyush.anand@gmail.com
> > Cc: linux-pci@vger.kernel.org; linux-acpi@vger.kernel.org; linux-
> > kernel@vger.kernel.org; jcm@redhat.com; Gabriele Paoloni; Chenxin
> > (Charles); hanjun.guo@linaro.org; Linuxarm
> > Subject: Re: [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for
> > HiSilicon SoCs Host Controllers
> > 
> > On 22.11.2016 13:08, Dongdong Liu wrote:
> > > PCIe controller in Hip05/HIP06/HIP07 SoCs is not ECAM compliant.
> > > It is non ECAM only for the RC bus config space;for any other bus
> > > underneath the root bus we support ECAM access.
> > > Add specific quirks for PCI config space accessors.This involves:
> > > 1. New initialization call hisi_pcie_init() to obtain rc base
> > > addresses from PNP0C02 at the root of the ACPI namespace (under
> > \_SB).
> > > 2. New entry in common quirk array.
> > >
> > > Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
> > > Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
> > > ---
> > >  MAINTAINERS                       |   1 +
> > >  drivers/acpi/pci_mcfg.c           |  13 +++++
> > >  drivers/pci/host/Kconfig          |   7 +++
> > >  drivers/pci/host/Makefile         |   1 +
> > >  drivers/pci/host/pcie-hisi-acpi.c | 119
> > ++++++++++++++++++++++++++++++++++++++
> > >  include/linux/pci-ecam.h          |   5 ++
> > >  6 files changed, 146 insertions(+)
> > >  create mode 100644 drivers/pci/host/pcie-hisi-acpi.c
> > >
> > > diff --git a/MAINTAINERS b/MAINTAINERS
> > > index 1cd38a7..b224caa 100644
> > > --- a/MAINTAINERS
> > > +++ b/MAINTAINERS
> > > @@ -9358,6 +9358,7 @@ L:	linux-pci@vger.kernel.org
> > >  S:	Maintained
> > >  F:	Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
> > >  F:	drivers/pci/host/pcie-hisi.c
> > > +F:	drivers/pci/host/pcie-hisi-acpi.c
> > >
> > >  PCIE DRIVER FOR ROCKCHIP
> > >  M:	Shawn Lin <shawn.lin@rock-chips.com>
> > > diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
> > > index ac21db3..3297c5a 100644
> > > --- a/drivers/acpi/pci_mcfg.c
> > > +++ b/drivers/acpi/pci_mcfg.c
> > > @@ -57,6 +57,19 @@ struct mcfg_fixup {
> > >  	{ "QCOM  ", "QDF2432 ", 1, 5, MCFG_BUS_ANY, &pci_32b_ops },
> > >  	{ "QCOM  ", "QDF2432 ", 1, 6, MCFG_BUS_ANY, &pci_32b_ops },
> > >  	{ "QCOM  ", "QDF2432 ", 1, 7, MCFG_BUS_ANY, &pci_32b_ops },
> > > +#ifdef CONFIG_PCI_ECAM_QUIRKS
> > > +	#define PCI_ACPI_QUIRK_QUAD_DOM(table_id, seg, ops) \
> > > +	{ "HISI  ", table_id, 0, seg + 0, MCFG_BUS_ANY, ops }, \
> > > +	{ "HISI  ", table_id, 0, seg + 1, MCFG_BUS_ANY, ops }, \
> > > +	{ "HISI  ", table_id, 0, seg + 2, MCFG_BUS_ANY, ops }, \
> > > +	{ "HISI  ", table_id, 0, seg + 3, MCFG_BUS_ANY, ops }
> > > +	PCI_ACPI_QUIRK_QUAD_DOM("HIP05   ", 0, &hisi_pcie_ops),
> > > +	PCI_ACPI_QUIRK_QUAD_DOM("HIP06   ", 0, &hisi_pcie_ops),
> > > +	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 0, &hisi_pcie_ops),
> > > +	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 4, &hisi_pcie_ops),
> > > +	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 8, &hisi_pcie_ops),
> > > +	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 12, &hisi_pcie_ops),
> > > +#endif
> > >  };
> > >
> > >  static char mcfg_oem_id[ACPI_OEM_ID_SIZE];
> > > diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
> > > index ae98644..1fbade5 100644
> > > --- a/drivers/pci/host/Kconfig
> > > +++ b/drivers/pci/host/Kconfig
> > > @@ -301,4 +301,11 @@ config VMD
> > >  	  To compile this driver as a module, choose M here: the
> > >  	  module will be called vmd.
> > >
> > > +config PCI_ECAM_QUIRKS
> > > +	bool "PCI ECAM quirks for ARM64 platform"
> > > +	depends on PCI_ECAM && ARM64 && ACPI
> > > +	help
> > > +	  Say y here to enable your platform-specific config access that
> > > +	  is not ECAM compliant.
> > > +
> > 
> > ARM64 selects PCI_ECAM for ACPI anyway so we can skip it here.
> 
> Yes sure
> 
> > 
> > How about selecting PCI_ECAM_QUIRKS from ARM64 Kconfig:
> 
> I don't think we should assume that ARM64 platforms should
> support quirks by default...
> i.e. from my perspective the quirk module should go in only
> if strictly required by the platform you're working on.
> 
> Thoughts?
> 
> Thanks
> 
No, same kernel multiple machines is the model, code should go in
unconditional.

Graeme

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#1528431 — RE: [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for HiSilicon SoCs Host Controllers

FromGabriele Paoloni <gabriele.paoloni@huawei.com>
Date2016-11-23 15:10 +0100
SubjectRE: [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for HiSilicon SoCs Host Controllers
Message-ID<sGGpk-5Vu-11@gated-at.bofh.it>
In reply to#1528257
Hi Graeme

> -----Original Message-----
> From: Graeme Gregory [mailto:gg@slimlogic.co.uk]
> Sent: 23 November 2016 09:44
> To: Gabriele Paoloni
> Cc: Tomasz Nowicki; liudongdong (C); helgaas@kernel.org; arnd@arndb.de;
> rafael@kernel.org; Lorenzo.Pieralisi@arm.com; Wangzhou (B);
> pratyush.anand@gmail.com; linux-pci@vger.kernel.org; linux-
> acpi@vger.kernel.org; linux-kernel@vger.kernel.org; jcm@redhat.com;
> Chenxin (Charles); hanjun.guo@linaro.org; Linuxarm
> Subject: Re: [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for
> HiSilicon SoCs Host Controllers
> 
> On Tue, Nov 22, 2016 at 03:05:29PM +0000, Gabriele Paoloni wrote:
> > Hi Tomasz
> >
> > > -----Original Message-----
> > > From: Tomasz Nowicki [mailto:tn@semihalf.com]
> > > Sent: 22 November 2016 13:58
> > > To: liudongdong (C); helgaas@kernel.org; arnd@arndb.de;
> > > rafael@kernel.org; Lorenzo.Pieralisi@arm.com; Wangzhou (B);
> > > pratyush.anand@gmail.com
> > > Cc: linux-pci@vger.kernel.org; linux-acpi@vger.kernel.org; linux-
> > > kernel@vger.kernel.org; jcm@redhat.com; Gabriele Paoloni; Chenxin
> > > (Charles); hanjun.guo@linaro.org; Linuxarm
> > > Subject: Re: [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for
> > > HiSilicon SoCs Host Controllers
> > >
> > > On 22.11.2016 13:08, Dongdong Liu wrote:
> > > > PCIe controller in Hip05/HIP06/HIP07 SoCs is not ECAM compliant.
> > > > It is non ECAM only for the RC bus config space;for any other bus
> > > > underneath the root bus we support ECAM access.
> > > > Add specific quirks for PCI config space accessors.This involves:
> > > > 1. New initialization call hisi_pcie_init() to obtain rc base
> > > > addresses from PNP0C02 at the root of the ACPI namespace (under
> > > \_SB).
> > > > 2. New entry in common quirk array.
> > > >
> > > > Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
> > > > Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
> > > > ---
> > > >  MAINTAINERS                       |   1 +
> > > >  drivers/acpi/pci_mcfg.c           |  13 +++++
> > > >  drivers/pci/host/Kconfig          |   7 +++
> > > >  drivers/pci/host/Makefile         |   1 +
> > > >  drivers/pci/host/pcie-hisi-acpi.c | 119
> > > ++++++++++++++++++++++++++++++++++++++
> > > >  include/linux/pci-ecam.h          |   5 ++
> > > >  6 files changed, 146 insertions(+)
> > > >  create mode 100644 drivers/pci/host/pcie-hisi-acpi.c
> > > >
> > > > diff --git a/MAINTAINERS b/MAINTAINERS
> > > > index 1cd38a7..b224caa 100644
> > > > --- a/MAINTAINERS
> > > > +++ b/MAINTAINERS
> > > > @@ -9358,6 +9358,7 @@ L:	linux-pci@vger.kernel.org
> > > >  S:	Maintained
> > > >  F:	Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
> > > >  F:	drivers/pci/host/pcie-hisi.c
> > > > +F:	drivers/pci/host/pcie-hisi-acpi.c
> > > >
> > > >  PCIE DRIVER FOR ROCKCHIP
> > > >  M:	Shawn Lin <shawn.lin@rock-chips.com>
> > > > diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
> > > > index ac21db3..3297c5a 100644
> > > > --- a/drivers/acpi/pci_mcfg.c
> > > > +++ b/drivers/acpi/pci_mcfg.c
> > > > @@ -57,6 +57,19 @@ struct mcfg_fixup {
> > > >  	{ "QCOM  ", "QDF2432 ", 1, 5, MCFG_BUS_ANY, &pci_32b_ops },
> > > >  	{ "QCOM  ", "QDF2432 ", 1, 6, MCFG_BUS_ANY, &pci_32b_ops },
> > > >  	{ "QCOM  ", "QDF2432 ", 1, 7, MCFG_BUS_ANY, &pci_32b_ops },
> > > > +#ifdef CONFIG_PCI_ECAM_QUIRKS
> > > > +	#define PCI_ACPI_QUIRK_QUAD_DOM(table_id, seg, ops) \
> > > > +	{ "HISI  ", table_id, 0, seg + 0, MCFG_BUS_ANY, ops }, \
> > > > +	{ "HISI  ", table_id, 0, seg + 1, MCFG_BUS_ANY, ops }, \
> > > > +	{ "HISI  ", table_id, 0, seg + 2, MCFG_BUS_ANY, ops }, \
> > > > +	{ "HISI  ", table_id, 0, seg + 3, MCFG_BUS_ANY, ops }
> > > > +	PCI_ACPI_QUIRK_QUAD_DOM("HIP05   ", 0, &hisi_pcie_ops),
> > > > +	PCI_ACPI_QUIRK_QUAD_DOM("HIP06   ", 0, &hisi_pcie_ops),
> > > > +	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 0, &hisi_pcie_ops),
> > > > +	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 4, &hisi_pcie_ops),
> > > > +	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 8, &hisi_pcie_ops),
> > > > +	PCI_ACPI_QUIRK_QUAD_DOM("HIP07   ", 12, &hisi_pcie_ops),
> > > > +#endif
> > > >  };
> > > >
> > > >  static char mcfg_oem_id[ACPI_OEM_ID_SIZE];
> > > > diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
> > > > index ae98644..1fbade5 100644
> > > > --- a/drivers/pci/host/Kconfig
> > > > +++ b/drivers/pci/host/Kconfig
> > > > @@ -301,4 +301,11 @@ config VMD
> > > >  	  To compile this driver as a module, choose M here: the
> > > >  	  module will be called vmd.
> > > >
> > > > +config PCI_ECAM_QUIRKS
> > > > +	bool "PCI ECAM quirks for ARM64 platform"
> > > > +	depends on PCI_ECAM && ARM64 && ACPI
> > > > +	help
> > > > +	  Say y here to enable your platform-specific config access
> that
> > > > +	  is not ECAM compliant.
> > > > +
> > >
> > > ARM64 selects PCI_ECAM for ACPI anyway so we can skip it here.
> >
> > Yes sure
> >
> > >
> > > How about selecting PCI_ECAM_QUIRKS from ARM64 Kconfig:
> >
> > I don't think we should assume that ARM64 platforms should
> > support quirks by default...
> > i.e. from my perspective the quirk module should go in only
> > if strictly required by the platform you're working on.
> >
> > Thoughts?
> >
> > Thanks
> >
> No, same kernel multiple machines is the model, code should go in
> unconditional.

What about selecting it in "arch/arm64/Kconfig.platforms" ?

So it seems more logical (as the quirk is not selected directly by
the ARM64 architecture) and would solve the "same kernel multiple
machine" issue...

Thanks

Gab

> 
> Graeme

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