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| Started by | ho.jia.jie@intel.com |
|---|---|
| First post | 2016-11-14 10:20 +0100 |
| Last post | 2016-11-15 18:10 +0100 |
| Articles | 2 — 2 participants |
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[PATCH] net: ethernet: Fix SGMII unable to switch speed and autonego failure ho.jia.jie@intel.com - 2016-11-14 10:20 +0100
Re: [PATCH] net: ethernet: Fix SGMII unable to switch speed and autonego failure David Miller <davem@redhat.com> - 2016-11-15 18:10 +0100
| From | ho.jia.jie@intel.com |
|---|---|
| Date | 2016-11-14 10:20 +0100 |
| Subject | [PATCH] net: ethernet: Fix SGMII unable to switch speed and autonego failure |
| Message-ID | <sDlAJ-51G-15@gated-at.bofh.it> |
From: Jia Jie Ho <ho.jia.jie@intel.com> TSE PCS SGMII ethernet has an issue where switching speed doesn't work caused by a faulty register macro offset. This fixes the issue. Signed-off-by: Jia Jie Ho <ho.jia.jie@intel.com> --- drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c b/drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c index 2920e2e..489ef14 100644 --- a/drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c +++ b/drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c @@ -63,8 +63,8 @@ #define TSE_PCS_SGMII_LINK_TIMER_0 0x0D40 #define TSE_PCS_SGMII_LINK_TIMER_1 0x0003 #define TSE_PCS_SW_RESET_TIMEOUT 100 -#define TSE_PCS_USE_SGMII_AN_MASK BIT(2) -#define TSE_PCS_USE_SGMII_ENA BIT(1) +#define TSE_PCS_USE_SGMII_AN_MASK BIT(1) +#define TSE_PCS_USE_SGMII_ENA BIT(0) #define SGMII_ADAPTER_CTRL_REG 0x00 #define SGMII_ADAPTER_DISABLE 0x0001 -- 1.8.2.1
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| From | David Miller <davem@redhat.com> |
|---|---|
| Date | 2016-11-15 18:10 +0100 |
| Subject | Re: [PATCH] net: ethernet: Fix SGMII unable to switch speed and autonego failure |
| Message-ID | <sDPp7-7LU-1@gated-at.bofh.it> |
| In reply to | #1521444 |
From: ho.jia.jie@intel.com Date: Mon, 14 Nov 2016 17:06:49 +0800 > From: Jia Jie Ho <ho.jia.jie@intel.com> > > TSE PCS SGMII ethernet has an issue where switching speed doesn't work > caused by a faulty register macro offset. This fixes the issue. > > Signed-off-by: Jia Jie Ho <ho.jia.jie@intel.com> Applied.
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