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| Started by | Florent Revest <florent.revest@free-electrons.com> |
|---|---|
| First post | 2016-08-25 11:50 +0200 |
| Last post | 2016-08-25 11:50 +0200 |
| Articles | 1 — 1 participant |
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[RFC 10/10] sunxi-cedrus: Add device tree binding document Florent Revest <florent.revest@free-electrons.com> - 2016-08-25 11:50 +0200
| From | Florent Revest <florent.revest@free-electrons.com> |
|---|---|
| Date | 2016-08-25 11:50 +0200 |
| Subject | [RFC 10/10] sunxi-cedrus: Add device tree binding document |
| Message-ID | <s9Zsm-7H6-39@gated-at.bofh.it> |
Device Tree bindings for the Allwinner's video engine
Signed-off-by: Florent Revest <florent.revest@free-electrons.com>
---
.../devicetree/bindings/media/sunxi-cedrus.txt | 44 ++++++++++++++++++++++
1 file changed, 44 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/sunxi-cedrus.txt
diff --git a/Documentation/devicetree/bindings/media/sunxi-cedrus.txt b/Documentation/devicetree/bindings/media/sunxi-cedrus.txt
new file mode 100644
index 0000000..26f2e09
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/sunxi-cedrus.txt
@@ -0,0 +1,44 @@
+Device-Tree bindings for SUNXI video engine found in sunXi SoC family
+
+Required properties:
+- compatible : "allwinner,sun5i-a13-video-engine";
+- memory-region : DMA pool for buffers allocation;
+- clocks : list of clock specifiers, corresponding to
+ entries in clock-names property;
+- clock-names : should contain "ahb", "mod" and "ram" entries;
+- resets : phandle for reset;
+- interrupts : should contain VE interrupt number;
+- reg : should contain register base and length of VE.
+
+Example:
+
+reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ ve_reserved: cma {
+ compatible = "shared-dma-pool";
+ reg = <0x43d00000 0x9000000>;
+ no-map;
+ linux,cma-default;
+ };
+};
+
+video-engine {
+ compatible = "allwinner,sun5i-a13-video-engine";
+ memory-region = <&ve_reserved>;
+
+ clocks = <&ahb_gates 32>, <&ccu CLK_VE>,
+ <&dram_gates 0>;
+ clock-names = "ahb", "mod", "ram";
+
+ assigned-clocks = <&ccu CLK_VE>;
+ assigned-clock-rates = <320000000>;
+
+ resets = <&ccu RST_VE>;
+
+ interrupts = <53>;
+
+ reg = <0x01c0e000 4096>;
+};
--
2.7.4
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