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| Started by | Andi Kleen <andi@firstfloor.org> |
|---|---|
| First post | 2016-05-14 03:50 +0200 |
| Last post | 2016-05-14 03:50 +0200 |
| Articles | 1 — 1 participant |
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[PATCH 5/8] perf/x86/intel: Use new topology_max_smt_threads() in HT leak workaround Andi Kleen <andi@firstfloor.org> - 2016-05-14 03:50 +0200
| From | Andi Kleen <andi@firstfloor.org> |
|---|---|
| Date | 2016-05-14 03:50 +0200 |
| Subject | [PATCH 5/8] perf/x86/intel: Use new topology_max_smt_threads() in HT leak workaround |
| Message-ID | <rywSm-7dg-11@gated-at.bofh.it> |
From: Andi Kleen <ak@linux.intel.com>
Now that we have topology_max_smt_threads() use it
to detect the HT workarounds for older CPUs.
v2: Use topology_max_smt_threads()
Signed-off-by: Andi Kleen <ak@linux.intel.com>
---
arch/x86/events/intel/core.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index b337ad7db2b2..12b438435999 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -3991,16 +3991,14 @@ __init int intel_pmu_init(void)
*/
static __init int fixup_ht_bug(void)
{
- int cpu = smp_processor_id();
- int w, c;
+ int c;
/*
* problem not present on this CPU model, nothing to do
*/
if (!(x86_pmu.flags & PMU_FL_EXCL_ENABLED))
return 0;
- w = cpumask_weight(topology_sibling_cpumask(cpu));
- if (w > 1) {
+ if (topology_max_smt_threads() > 1) {
pr_info("PMU erratum BJ122, BV98, HSD29 worked around, HT is on\n");
return 0;
}
--
2.5.5
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