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Groups > linux.kernel > #1399564 > unrolled thread
| Started by | Jon Mason <jon.mason@broadcom.com> |
|---|---|
| First post | 2016-05-12 01:00 +0200 |
| Last post | 2016-05-20 20:50 +0200 |
| Articles | 11 — 4 participants |
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[PATCH 1/2] arm64: dts: NS2: Add all of the UARTs Jon Mason <jon.mason@broadcom.com> - 2016-05-12 01:00 +0200
[PATCH 2/2] arm64: dts: NS2: Add CCI-400 PMU support Jon Mason <jon.mason@broadcom.com> - 2016-05-12 01:00 +0200
Re: [PATCH 2/2] arm64: dts: NS2: Add CCI-400 PMU support Florian Fainelli <f.fainelli@gmail.com> - 2016-05-20 20:50 +0200
Re: [PATCH 1/2] arm64: dts: NS2: Add all of the UARTs Kefeng Wang <wangkefeng.wang@huawei.com> - 2016-05-12 08:20 +0200
Re: [PATCH 1/2] arm64: dts: NS2: Add all of the UARTs Ray Jui <ray.jui@broadcom.com> - 2016-05-12 19:00 +0200
Re: [PATCH 1/2] arm64: dts: NS2: Add all of the UARTs Kefeng Wang <wangkefeng.wang@huawei.com> - 2016-05-13 03:20 +0200
Re: [PATCH 1/2] arm64: dts: NS2: Add all of the UARTs Kefeng Wang <wangkefeng.wang@huawei.com> - 2016-05-13 04:20 +0200
Re: [PATCH 1/2] arm64: dts: NS2: Add all of the UARTs Kefeng Wang <wangkefeng.wang@huawei.com> - 2016-05-16 04:10 +0200
Re: [PATCH 1/2] arm64: dts: NS2: Add all of the UARTs Florian Fainelli <f.fainelli@gmail.com> - 2016-05-17 22:00 +0200
Re: [PATCH 1/2] arm64: dts: NS2: Add all of the UARTs Kefeng Wang <wangkefeng.wang@huawei.com> - 2016-05-18 08:00 +0200
Re: [PATCH 1/2] arm64: dts: NS2: Add all of the UARTs Florian Fainelli <f.fainelli@gmail.com> - 2016-05-20 20:50 +0200
| From | Jon Mason <jon.mason@broadcom.com> |
|---|---|
| Date | 2016-05-12 01:00 +0200 |
| Subject | [PATCH 1/2] arm64: dts: NS2: Add all of the UARTs |
| Message-ID | <rxLgJ-Yk-5@gated-at.bofh.it> |
Add all of the UARTs present on NS2 and enable them in the SVK device
tree file. Also, do some magic to make sure that uart3 is discovered as
ttyS0 (as that is the console UART).
Signed-off-by: Jon Mason <jonmason@broadcom.com>
---
arch/arm64/boot/dts/broadcom/ns2-svk.dts | 16 ++++++++++++++++
arch/arm64/boot/dts/broadcom/ns2.dtsi | 30 ++++++++++++++++++++++++++++++
2 files changed, 46 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
index 7cd3640..b062a44 100644
--- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts
+++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
@@ -40,10 +40,14 @@
aliases {
serial0 = &uart3;
+ serial1 = &uart0;
+ serial2 = &uart1;
+ serial3 = &uart2;
};
chosen {
stdout-path = "serial0:115200n8";
+ bootargs = "earlycon=uart8250,mmio32,0x66130000";
};
memory {
@@ -68,6 +72,18 @@
status = "ok";
};
+&uart0 {
+ status = "ok";
+};
+
+&uart1 {
+ status = "ok";
+};
+
+&uart2 {
+ status = "ok";
+};
+
&uart3 {
status = "ok";
};
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index 788ed8f..c77a9e8 100644
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -357,6 +357,36 @@
status = "disabled";
};
+ uart0: serial@66100000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x66100000 0x100>;
+ interrupts = <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&iprocslow>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
+
+ uart1: serial@66110000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x66110000 0x100>;
+ interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&iprocslow>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
+
+ uart2: serial@66120000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x66120000 0x100>;
+ interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&iprocslow>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
+
uart3: serial@66130000 {
compatible = "snps,dw-apb-uart";
reg = <0x66130000 0x100>;
--
1.9.1
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| From | Jon Mason <jon.mason@broadcom.com> |
|---|---|
| Date | 2016-05-12 01:00 +0200 |
| Subject | [PATCH 2/2] arm64: dts: NS2: Add CCI-400 PMU support |
| Message-ID | <rxLgJ-Yk-11@gated-at.bofh.it> |
| In reply to | #1399564 |
Add support to the Northstar 2 Device tree file for the ARM CCI-400 PMU.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
---
arch/arm64/boot/dts/broadcom/ns2.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index c77a9e8..d1dc812 100644
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -279,6 +279,26 @@
IRQ_TYPE_LEVEL_HIGH)>;
};
+ cci@65590000 {
+ compatible = "arm,cci-400";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x65590000 0x1000>;
+ ranges = <0 0x65590000 0x10000>;
+
+ pmu@9000 {
+ compatible = "arm,cci-400-pmu,r1",
+ "arm,cci-400-pmu";
+ reg = <0x9000 0x4000>;
+ interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
timer0: timer@66030000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x66030000 0x1000>;
--
1.9.1
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| From | Florian Fainelli <f.fainelli@gmail.com> |
|---|---|
| Date | 2016-05-20 20:50 +0200 |
| Subject | Re: [PATCH 2/2] arm64: dts: NS2: Add CCI-400 PMU support |
| Message-ID | <rAXEK-PC-17@gated-at.bofh.it> |
| In reply to | #1399566 |
On 05/11/2016 03:56 PM, Jon Mason wrote: > Add support to the Northstar 2 Device tree file for the ARM CCI-400 PMU. > > Signed-off-by: Jon Mason <jonmason@broadcom.com> Also applied to devicetree-arm64/next, thanks Jon! -- Florian
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| From | Kefeng Wang <wangkefeng.wang@huawei.com> |
|---|---|
| Date | 2016-05-12 08:20 +0200 |
| Message-ID | <rxS8x-8pY-13@gated-at.bofh.it> |
| In reply to | #1399564 |
On 2016/5/12 6:56, Jon Mason wrote:
> Add all of the UARTs present on NS2 and enable them in the SVK device
> tree file. Also, do some magic to make sure that uart3 is discovered as
> ttyS0 (as that is the console UART).
>
> Signed-off-by: Jon Mason <jonmason@broadcom.com>
> ---
> arch/arm64/boot/dts/broadcom/ns2-svk.dts | 16 ++++++++++++++++
> arch/arm64/boot/dts/broadcom/ns2.dtsi | 30 ++++++++++++++++++++++++++++++
> 2 files changed, 46 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> index 7cd3640..b062a44 100644
> --- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> +++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> @@ -40,10 +40,14 @@
>
> aliases {
> serial0 = &uart3;
> + serial1 = &uart0;
> + serial2 = &uart1;
> + serial3 = &uart2;
> };
>
> chosen {
> stdout-path = "serial0:115200n8";
> + bootargs = "earlycon=uart8250,mmio32,0x66130000";
Hi Jon,
I submit a patch[1], with it, we can use earlycon without option to enable early console
for "snps,dw-apb-uart", could you help me to test it, thanks.
BRs,
Kefeng
[1] https://lkml.org/lkml/2016/5/11/34
> };
>
> memory {
> @@ -68,6 +72,18 @@
> status = "ok";
> };
>
> +&uart0 {
> + status = "ok";
> +};
> +
> +&uart1 {
> + status = "ok";
> +};
> +
> +&uart2 {
> + status = "ok";
> +};
> +
> &uart3 {
> status = "ok";
> };
> diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
> index 788ed8f..c77a9e8 100644
> --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
> +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
> @@ -357,6 +357,36 @@
> status = "disabled";
> };
>
> + uart0: serial@66100000 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0x66100000 0x100>;
> + interrupts = <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&iprocslow>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + status = "disabled";
> + };
> +
> + uart1: serial@66110000 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0x66110000 0x100>;
> + interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&iprocslow>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + status = "disabled";
> + };
> +
> + uart2: serial@66120000 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0x66120000 0x100>;
> + interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&iprocslow>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + status = "disabled";
> + };
> +
> uart3: serial@66130000 {
> compatible = "snps,dw-apb-uart";
> reg = <0x66130000 0x100>;
>
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| From | Ray Jui <ray.jui@broadcom.com> |
|---|---|
| Date | 2016-05-12 19:00 +0200 |
| Message-ID | <ry27Y-1jB-19@gated-at.bofh.it> |
| In reply to | #1399683 |
Hi Kefeng,
On 5/12/2016 7:46 AM, Jon Mason wrote:
>
>
> On Thu, May 12, 2016 at 2:16 AM, Kefeng Wang <wangkefeng.wang@huawei.com
> <mailto:wangkefeng.wang@huawei.com>> wrote:
>
>
>
> On 2016/5/12 6:56, Jon Mason wrote:
> > Add all of the UARTs present on NS2 and enable them in the SVK device
> > tree file. Also, do some magic to make sure that uart3 is discovered as
> > ttyS0 (as that is the console UART).
> >
> > Signed-off-by: Jon Mason <jonmason@broadcom.com <mailto:jonmason@broadcom.com>>
> > ---
> > arch/arm64/boot/dts/broadcom/ns2-svk.dts | 16 ++++++++++++++++
> > arch/arm64/boot/dts/broadcom/ns2.dtsi | 30 ++++++++++++++++++++++++++++++
> > 2 files changed, 46 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> > index 7cd3640..b062a44 100644
> > --- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> > +++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> > @@ -40,10 +40,14 @@
> >
> > aliases {
> > serial0 = &uart3;
> > + serial1 = &uart0;
> > + serial2 = &uart1;
> > + serial3 = &uart2;
> > };
> >
> > chosen {
> > stdout-path = "serial0:115200n8";
> > + bootargs = "earlycon=uart8250,mmio32,0x66130000";
>
> Hi Jon,
>
> I submit a patch[1], with it, we can use earlycon without option to
> enable early console
> for "snps,dw-apb-uart", could you help me to test it, thanks.
>
>
> Adding your change and removing the line above does not cause earlycon
> to work for me. Is there any additional changes necessary for this to work?
>
> Thanks,
> Jon
>
"OF_EARLYCON_DECLARE" doesn't seem to have a way to deal with DT
properties? In the case of UART for NS2, it needs mmio32, configured
with DT property "reg-io-width" set to 4. I don't think
"OF_EARLYCON_DECLARE" is parsing that, which is likely the reason why it
doesn't work for devices that required mmio32.
Thanks,
Ray
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| From | Kefeng Wang <wangkefeng.wang@huawei.com> |
|---|---|
| Date | 2016-05-13 03:20 +0200 |
| Message-ID | <ry9VL-13t-5@gated-at.bofh.it> |
| In reply to | #1400239 |
On 2016/5/13 0:52, Ray Jui wrote:
> Hi Kefeng,
>
> On 5/12/2016 7:46 AM, Jon Mason wrote:
>>
>>
>> On Thu, May 12, 2016 at 2:16 AM, Kefeng Wang <wangkefeng.wang@huawei.com
>> <mailto:wangkefeng.wang@huawei.com>> wrote:
>>
>>
>>
>> On 2016/5/12 6:56, Jon Mason wrote:
>> > Add all of the UARTs present on NS2 and enable them in the SVK device
>> > tree file. Also, do some magic to make sure that uart3 is discovered as
>> > ttyS0 (as that is the console UART).
>> >
>> > Signed-off-by: Jon Mason <jonmason@broadcom.com <mailto:jonmason@broadcom.com>>
>> > ---
>> > arch/arm64/boot/dts/broadcom/ns2-svk.dts | 16 ++++++++++++++++
>> > arch/arm64/boot/dts/broadcom/ns2.dtsi | 30 ++++++++++++++++++++++++++++++
>> > 2 files changed, 46 insertions(+)
>> >
>> > diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
>> > index 7cd3640..b062a44 100644
>> > --- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts
>> > +++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
>> > @@ -40,10 +40,14 @@
>> >
>> > aliases {
>> > serial0 = &uart3;
>> > + serial1 = &uart0;
>> > + serial2 = &uart1;
>> > + serial3 = &uart2;
>> > };
>> >
>> > chosen {
>> > stdout-path = "serial0:115200n8";
>> > + bootargs = "earlycon=uart8250,mmio32,0x66130000";
>>
>> Hi Jon,
>>
>> I submit a patch[1], with it, we can use earlycon without option to
>> enable early console
>> for "snps,dw-apb-uart", could you help me to test it, thanks.
>>
>>
>> Adding your change and removing the line above does not cause earlycon
>> to work for me. Is there any additional changes necessary for this to work?
>>
>> Thanks,
>> Jon
>>
>
> "OF_EARLYCON_DECLARE" doesn't seem to have a way to deal with DT properties? In the case of UART for NS2, it needs mmio32, configured with DT property "reg-io-width" set to 4. I don't think "OF_EARLYCON_DECLARE" is parsing that, which is likely the reason why it doesn't work for devices that required mmio32.
>
It should work, I test this in Hisi D02 board, it uses same uart and same configuration.
early_init_dt_scan_chosen_serial()
for (match = __earlycon_table; match < __earlycon_table_end; match++)
......
of_setup_earlycon()
val = of_get_flat_dt_prop(node, "reg-io-width", NULL); // will obtain the reg-io-width and set iotype=mmio32
err = match->setup(&early_console_dev, options); // call early_serial8250_setup
Could you check it again, thanks,
Kefeng
> Thanks,
>
> Ray
>
> .
>
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| From | Kefeng Wang <wangkefeng.wang@huawei.com> |
|---|---|
| Date | 2016-05-13 04:20 +0200 |
| Message-ID | <ryaRQ-22W-7@gated-at.bofh.it> |
| In reply to | #1399683 |
On 2016/5/12 22:46, Jon Mason wrote:
>
>
> On Thu, May 12, 2016 at 2:16 AM, Kefeng Wang <wangkefeng.wang@huawei.com <mailto:wangkefeng.wang@huawei.com>> wrote:
>
>
>
> On 2016/5/12 6:56, Jon Mason wrote:
> > Add all of the UARTs present on NS2 and enable them in the SVK device
> > tree file. Also, do some magic to make sure that uart3 is discovered as
> > ttyS0 (as that is the console UART).
> >
> > Signed-off-by: Jon Mason <jonmason@broadcom.com <mailto:jonmason@broadcom.com>>
> > ---
> > arch/arm64/boot/dts/broadcom/ns2-svk.dts | 16 ++++++++++++++++
> > arch/arm64/boot/dts/broadcom/ns2.dtsi | 30 ++++++++++++++++++++++++++++++
> > 2 files changed, 46 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> > index 7cd3640..b062a44 100644
> > --- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> > +++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> > @@ -40,10 +40,14 @@
> >
> > aliases {
> > serial0 = &uart3;
> > + serial1 = &uart0;
> > + serial2 = &uart1;
> > + serial3 = &uart2;
> > };
> >
> > chosen {
> > stdout-path = "serial0:115200n8";
> > + bootargs = "earlycon=uart8250,mmio32,0x66130000";
>
> Hi Jon,
>
> I submit a patch[1], with it, we can use earlycon without option to enable early console
> for "snps,dw-apb-uart", could you help me to test it, thanks.
>
>
> Adding your change and removing the line above does not cause earlycon to work for me. Is there any additional changes necessary for this to work?
With my patch, the bootargs still need contain earlycon, but no need uart8250,mmio32,0x66130000;
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon";
}
Hope it would work.
BRs,
Kefeng
>
> Thanks,
> Jon
>
>
>
> BRs,
> Kefeng
>
>
> [1] https://lkml.org/lkml/2016/5/11/34
>
> > };
> >
> > memory {
> > @@ -68,6 +72,18 @@
> > status = "ok";
> > };
> >
> > +&uart0 {
> > + status = "ok";
> > +};
> > +
> > +&uart1 {
> > + status = "ok";
> > +};
> > +
> > +&uart2 {
> > + status = "ok";
> > +};
> > +
> > &uart3 {
> > status = "ok";
> > };
> > diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
> > index 788ed8f..c77a9e8 100644
> > --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
> > +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
> > @@ -357,6 +357,36 @@
> > status = "disabled";
> > };
> >
> > + uart0: serial@66100000 {
> > + compatible = "snps,dw-apb-uart";
> > + reg = <0x66100000 0x100>;
> > + interrupts = <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&iprocslow>;
> > + reg-shift = <2>;
> > + reg-io-width = <4>;
> > + status = "disabled";
> > + };
> > +
> > + uart1: serial@66110000 {
> > + compatible = "snps,dw-apb-uart";
> > + reg = <0x66110000 0x100>;
> > + interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&iprocslow>;
> > + reg-shift = <2>;
> > + reg-io-width = <4>;
> > + status = "disabled";
> > + };
> > +
> > + uart2: serial@66120000 {
> > + compatible = "snps,dw-apb-uart";
> > + reg = <0x66120000 0x100>;
> > + interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&iprocslow>;
> > + reg-shift = <2>;
> > + reg-io-width = <4>;
> > + status = "disabled";
> > + };
> > +
> > uart3: serial@66130000 {
> > compatible = "snps,dw-apb-uart";
> > reg = <0x66130000 0x100>;
> >
>
>
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| From | Kefeng Wang <wangkefeng.wang@huawei.com> |
|---|---|
| Date | 2016-05-16 04:10 +0200 |
| Message-ID | <rzg8P-u7-29@gated-at.bofh.it> |
| In reply to | #1400450 |
On 2016/5/14 0:49, Jon Mason wrote:
>
>
> On Thu, May 12, 2016 at 10:09 PM, Kefeng Wang <wangkefeng.wang@huawei.com <mailto:wangkefeng.wang@huawei.com>> wrote:
>
>
>
> On 2016/5/12 22:46, Jon Mason wrote:
> >
> >
> > On Thu, May 12, 2016 at 2:16 AM, Kefeng Wang <wangkefeng.wang@huawei.com <mailto:wangkefeng.wang@huawei.com> <mailto:wangkefeng.wang@huawei.com <mailto:wangkefeng.wang@huawei.com>>> wrote:
> >
> >
> >
> > On 2016/5/12 6:56, Jon Mason wrote:
> > > Add all of the UARTs present on NS2 and enable them in the SVK device
> > > tree file. Also, do some magic to make sure that uart3 is discovered as
> > > ttyS0 (as that is the console UART).
> > >
> > > Signed-off-by: Jon Mason <jonmason@broadcom.com <mailto:jonmason@broadcom.com> <mailto:jonmason@broadcom.com <mailto:jonmason@broadcom.com>>>
> > > ---
> > > arch/arm64/boot/dts/broadcom/ns2-svk.dts | 16 ++++++++++++++++
> > > arch/arm64/boot/dts/broadcom/ns2.dtsi | 30 ++++++++++++++++++++++++++++++
> > > 2 files changed, 46 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> > > index 7cd3640..b062a44 100644
> > > --- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> > > +++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> > > @@ -40,10 +40,14 @@
> > >
> > > aliases {
> > > serial0 = &uart3;
> > > + serial1 = &uart0;
> > > + serial2 = &uart1;
> > > + serial3 = &uart2;
> > > };
> > >
> > > chosen {
> > > stdout-path = "serial0:115200n8";
> > > + bootargs = "earlycon=uart8250,mmio32,0x66130000";
> >
> > Hi Jon,
> >
> > I submit a patch[1], with it, we can use earlycon without option to enable early console
> > for "snps,dw-apb-uart", could you help me to test it, thanks.
> >
> >
> > Adding your change and removing the line above does not cause earlycon to work for me. Is there any additional changes necessary for this to work?
> With my patch, the bootargs still need contain earlycon, but no need uart8250,mmio32,0x66130000;
>
> chosen {
> stdout-path = "serial0:115200n8";
> bootargs = "earlycon";
> }
>
> Hope it would work.
>
>
> I can confirm that with your change and the change to the bootargs you describe above, it works as desired. Was your change already accepted?
>
Great, thanks a lot. it is still being reviewing for now and waiting for response for now.
BRs,
Kefeng
> Thanks,
> Jon
>
>
>
> BRs,
> Kefeng
>
> >
> > Thanks,
> > Jon
> >
> >
> >
> > BRs,
> > Kefeng
> >
> >
> > [1] https://lkml.org/lkml/2016/5/11/34
> >
> > > };
> > >
> > > memory {
> > > @@ -68,6 +72,18 @@
> > > status = "ok";
> > > };
> > >
> > > +&uart0 {
> > > + status = "ok";
> > > +};
> > > +
> > > +&uart1 {
> > > + status = "ok";
> > > +};
> > > +
> > > +&uart2 {
> > > + status = "ok";
> > > +};
> > > +
> > > &uart3 {
> > > status = "ok";
> > > };
> > > diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
> > > index 788ed8f..c77a9e8 100644
> > > --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
> > > +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
> > > @@ -357,6 +357,36 @@
> > > status = "disabled";
> > > };
> > >
> > > + uart0: serial@66100000 {
> > > + compatible = "snps,dw-apb-uart";
> > > + reg = <0x66100000 0x100>;
> > > + interrupts = <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>;
> > > + clocks = <&iprocslow>;
> > > + reg-shift = <2>;
> > > + reg-io-width = <4>;
> > > + status = "disabled";
> > > + };
> > > +
> > > + uart1: serial@66110000 {
> > > + compatible = "snps,dw-apb-uart";
> > > + reg = <0x66110000 0x100>;
> > > + interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>;
> > > + clocks = <&iprocslow>;
> > > + reg-shift = <2>;
> > > + reg-io-width = <4>;
> > > + status = "disabled";
> > > + };
> > > +
> > > + uart2: serial@66120000 {
> > > + compatible = "snps,dw-apb-uart";
> > > + reg = <0x66120000 0x100>;
> > > + interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>;
> > > + clocks = <&iprocslow>;
> > > + reg-shift = <2>;
> > > + reg-io-width = <4>;
> > > + status = "disabled";
> > > + };
> > > +
> > > uart3: serial@66130000 {
> > > compatible = "snps,dw-apb-uart";
> > > reg = <0x66130000 0x100>;
> > >
> >
> >
>
>
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| From | Florian Fainelli <f.fainelli@gmail.com> |
|---|---|
| Date | 2016-05-17 22:00 +0200 |
| Message-ID | <rzTjQ-pn-9@gated-at.bofh.it> |
| In reply to | #1401156 |
On 05/15/2016 06:11 PM, Kefeng Wang wrote: >> I can confirm that with your change and the change to the bootargs you describe above, it works as desired. Was your change already accepted? >> > > Great, thanks a lot. it is still being reviewing for now and waiting for response for now. Then I would be inclined to take Jon's patch as-is, and follow up with an additional patch to the NS2 DTS once yours lands in. -- Florian
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| From | Kefeng Wang <wangkefeng.wang@huawei.com> |
|---|---|
| Date | 2016-05-18 08:00 +0200 |
| Message-ID | <rA2Gu-6mH-5@gated-at.bofh.it> |
| In reply to | #1402563 |
On 2016/5/18 3:56, Florian Fainelli wrote: > On 05/15/2016 06:11 PM, Kefeng Wang wrote: >>> I can confirm that with your change and the change to the bootargs you describe above, it works as desired. Was your change already accepted? >>> >> >> Great, thanks a lot. it is still being reviewing for now and waiting for response for now. > > Then I would be inclined to take Jon's patch as-is, and follow up with > an additional patch to the NS2 DTS once yours lands in. > Sure, please. Kefeng
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| From | Florian Fainelli <f.fainelli@gmail.com> |
|---|---|
| Date | 2016-05-20 20:50 +0200 |
| Message-ID | <rAXEK-PC-13@gated-at.bofh.it> |
| In reply to | #1399564 |
On 05/11/2016 03:56 PM, Jon Mason wrote: > Add all of the UARTs present on NS2 and enable them in the SVK device > tree file. Also, do some magic to make sure that uart3 is discovered as > ttyS0 (as that is the console UART). > > Signed-off-by: Jon Mason <jonmason@broadcom.com> Applied to devicetree-arm64/next, thanks Jon! -- Florian
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