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Groups > linux.kernel > #1397512 > unrolled thread

Using the mailbox subsystem for plain doorbells?

Started byStephen Warren <swarren@wwwdotorg.org>
First post2016-05-10 01:50 +0200
Last post2016-05-10 18:20 +0200
Articles 4 — 2 participants

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  Using the mailbox subsystem for plain doorbells? Stephen Warren <swarren@wwwdotorg.org> - 2016-05-10 01:50 +0200
    Re: Using the mailbox subsystem for plain doorbells? Jassi Brar <jassisinghbrar@gmail.com> - 2016-05-10 05:30 +0200
      Re: Using the mailbox subsystem for plain doorbells? Stephen Warren <swarren@wwwdotorg.org> - 2016-05-10 18:00 +0200
        Re: Using the mailbox subsystem for plain doorbells? Jassi Brar <jassisinghbrar@gmail.com> - 2016-05-10 18:20 +0200

#1397512 — Using the mailbox subsystem for plain doorbells?

FromStephen Warren <swarren@wwwdotorg.org>
Date2016-05-10 01:50 +0200
SubjectUsing the mailbox subsystem for plain doorbells?
Message-ID<rx362-7sX-9@gated-at.bofh.it>
Jassi,

Does the HW described below sound like something that should be 
represented using the Linux kernel's mailbox subsystem, and related DT 
bindings? I think the existing drivers/mailbox/pcc.c is similar, but 
wanted to double-check.

We have some HW that literally just allows a SW-generated interrupt to 
be generated by our main CPU complex to an auxiliary CPU, and likewise a 
different interrupt can be generated in the opposite direction. There's 
no ability to transfer any data; just an IRQ is generated. Our current 
mailbox implementation just handles IRQ generation/reception so struct 
mbox_chan_ops.send_data completely ignores the data parameter, and our 
IRQ handler "receives" hard-coded NULL messages when the IRQ fires. 
Higher level protocol code (using shared memory along with the plain-IRQ 
mbox channels) is outside the mailbox driver.

Does that fit the mailbox subsystem?

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#1397671

FromJassi Brar <jassisinghbrar@gmail.com>
Date2016-05-10 05:30 +0200
Message-ID<rx6wV-2kR-1@gated-at.bofh.it>
In reply to#1397512
On Tue, May 10, 2016 at 5:15 AM, Stephen Warren <swarren@wwwdotorg.org> wrote:
> Jassi,
>
> Does the HW described below sound like something that should be represented
> using the Linux kernel's mailbox subsystem, and related DT bindings? I think
> the existing drivers/mailbox/pcc.c is similar, but wanted to double-check.
>
> We have some HW that literally just allows a SW-generated interrupt to be
> generated by our main CPU complex to an auxiliary CPU, and likewise a
> different interrupt can be generated in the opposite direction. There's no
> ability to transfer any data; just an IRQ is generated. Our current mailbox
> implementation just handles IRQ generation/reception so struct
> mbox_chan_ops.send_data completely ignores the data parameter, and our IRQ
> handler "receives" hard-coded NULL messages when the IRQ fires. Higher level
> protocol code (using shared memory along with the plain-IRQ mbox channels)
> is outside the mailbox driver.
>
> Does that fit the mailbox subsystem?
>
From the sound of it, yes.

Some controllers need a mask/list of destination cpus, to which the
irq is raised, written to some 'data' register. You too probably need
to program the destination "id" in the controller? Maybe that should
be done in send_data().

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#1398267

FromStephen Warren <swarren@wwwdotorg.org>
Date2016-05-10 18:00 +0200
Message-ID<rxieK-5nU-7@gated-at.bofh.it>
In reply to#1397671
On 05/09/2016 09:29 PM, Jassi Brar wrote:
> On Tue, May 10, 2016 at 5:15 AM, Stephen Warren <swarren@wwwdotorg.org> wrote:
>> Jassi,
>>
>> Does the HW described below sound like something that should be represented
>> using the Linux kernel's mailbox subsystem, and related DT bindings? I think
>> the existing drivers/mailbox/pcc.c is similar, but wanted to double-check.
>>
>> We have some HW that literally just allows a SW-generated interrupt to be
>> generated by our main CPU complex to an auxiliary CPU, and likewise a
>> different interrupt can be generated in the opposite direction. There's no
>> ability to transfer any data; just an IRQ is generated. Our current mailbox
>> implementation just handles IRQ generation/reception so struct
>> mbox_chan_ops.send_data completely ignores the data parameter, and our IRQ
>> handler "receives" hard-coded NULL messages when the IRQ fires. Higher level
>> protocol code (using shared memory along with the plain-IRQ mbox channels)
>> is outside the mailbox driver.
>>
>> Does that fit the mailbox subsystem?
>>
>  From the sound of it, yes.

Good to know, thanks.

> Some controllers need a mask/list of destination cpus, to which the
> irq is raised, written to some 'data' register. You too probably need
> to program the destination "id" in the controller? Maybe that should
> be done in send_data().

In this case, each mailbox communicates with a different remote CPU, and 
there's a separate register to communicate with each remote CPU. So, 
send_data() completely ignores the data parameter since everything is 
derived from the mailbox's identity.

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#1398292

FromJassi Brar <jassisinghbrar@gmail.com>
Date2016-05-10 18:20 +0200
Message-ID<rxiy5-5Zu-7@gated-at.bofh.it>
In reply to#1398267
On Tue, May 10, 2016 at 9:26 PM, Stephen Warren <swarren@wwwdotorg.org> wrote:
> On 05/09/2016 09:29 PM, Jassi Brar wrote:
>
>> Some controllers need a mask/list of destination cpus, to which the
>> irq is raised, written to some 'data' register. You too probably need
>> to program the destination "id" in the controller? Maybe that should
>> be done in send_data().
>
>
> In this case, each mailbox communicates with a different remote CPU, and
> there's a separate register to communicate with each remote CPU. So,
> send_data() completely ignores the data parameter since everything is
> derived from the mailbox's identity.
>
Yes, that is ok. For example, mailbox-sti.c does that.

Cheers!

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